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* [WebAssembly] Change int_wasm_memory_size from IntrNoMem to IntrReadMem.Dan Gohman2015-11-142-2/+2
| | | | llvm-svn: 253147
* [X86][SSE] Fixed arch/triple and regenerated results.Simon Pilgrim2015-11-142-21/+75
| | | | | | Tidyup before diffs from new patch. llvm-svn: 253144
* [X86][SSE] Added extra vector truncation testsSimon Pilgrim2015-11-141-0/+201
| | | | | | Baseline comparison to D14588 llvm-svn: 253132
* Don't recompute LCSSA after loop-unrolling when possible.Michael Zolotukhin2015-11-141-0/+119
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: Currently we always recompute LCSSA for outer loops after unrolling an inner loop. That leads to compile time problem when we have big loop nests, and we can solve it by avoiding unnecessary work. For instance, if w eonly do partial unrolling, we don't break LCSSA, so we don't need to rebuild it. Also, if all exits from the inner loop are inside the enclosing loop, then complete unrolling won't break LCSSA either. I replaced unconditional LCSSA recomputation with conditional recomputation + unconditional assert and added several tests, which were failing when I experimented with it. Soon I plan to follow up with a similar patch for recalculation of dominators tree. Reviewers: hfinkel, dexonsmith, bogner, joker.eph, chandlerc Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14526 llvm-svn: 253126
* [ShrinkWrapping] Disable the optimization for functions with sanitize likeQuentin Colombet2015-11-141-0/+40
| | | | | | | | | | attribute. Even if the target supports shrink-wrapping, the prologue and epilogue must not move because a crash can happen anywhere and sanitizers need to be able to unwind from the PC of the crash. llvm-svn: 253116
* [LIR] Add support for creating memcpys from loops with a negative stride.Chad Rosier2015-11-131-2/+29
| | | | | | | | | | | | | | | This allows us to transform the below loop into a memcpy. void test(unsigned *__restrict__ a, unsigned *__restrict__ b) { for (int i = 2047; i >= 0; --i) { a[i] = b[i]; } } This is the memcpy version of r251518, which added support for memset with negative strided loops. llvm-svn: 253091
* [WinEH] Fix ESP management with 32-bit __CxxFrameHandler3Reid Kleckner2015-11-133-8/+6
| | | | | | | | | | | | | | | The C++ EH personality automatically restores ESP from the C++ EH registration node after a catchret. I mistakenly thought it was like SEH, which does not restore ESP. It makes sense for C++ EH to differ from SEH here because SEH does not use funclets for catches, and does not allow catching inside of finally. C++ EH may need to unwind through multiple catch funclets and eventually catchret to some outer funclet. Therefore, the runtime has to keep track of which ESP to use with catchret, rather than having the compiler reload it manually. llvm-svn: 253084
* [safestack] Rewrite isAllocaSafe using SCEV.Evgeniy Stepanov2015-11-134-4/+264
| | | | | | | | | | | | | | | Use ScalarEvolution to calculate memory access bounds. Handle function calls based on readnone/nocapture attributes. Handle memory intrinsics with constant size. This change improves both recall and precision of IsAllocaSafe. See the new tests (ex. BitCastWide) for the kind of code that was wrongly classified as safe. SCEV efficiency seems to be limited by the fact the SafeStack runs late (in CodeGenPrepare), and many loops are unrolled or otherwise not in LCSSA. llvm-svn: 253083
* SamplePGO - Add dump routines for LineLocation, SampleRecord and FunctionSamplesDiego Novillo2015-11-133-12/+12
| | | | llvm-svn: 253071
* [X86][SSE] Combine UNPCKL with vector_shuffle into UNPCKH to save one ↵Cong Hou2015-11-132-15/+9
| | | | | | | | | | | | | | | | | | | instruction for sext from v16i8 to v16i16 and v8i16 to v8i32. This patch is enabling combining UNPCKL with vector_shuffle that moves the upper half of a vector into the lower half, into a UNPCKH instruction. For example: t2: v16i8 = vector_shuffle<8,9,10,11,12,13,14,15,u,u,u,u,u,u,u,u> t1, undef:v16i8 t3: v16i8 = X86ISD::UNPCKL undef:v16i8, t2 will be combined to: t3: v16i8 = X86ISD::UNPCKH undef:v16i8, t1 Differential revision: http://reviews.llvm.org/D14399 llvm-svn: 253067
* dwarfdump: Add support for dumping the table contents of DWP indexesDavid Blaikie2015-11-131-10/+10
| | | | | | | | | | | | | This is a recommit of 252842 which was reverted in 252859. The issue was using %s format specifier for a StringRef - used Format's left_justify(StringRef, int) instead. It'd be nice to have __attribute__((format(..))) on llvm::format, but apparently it's only implemented for c-style variadics, not C++ variadic templates. Perhaps we could fix that & conditionalize the attribute on such... llvm-svn: 253065
* Add missing triple to WinEH test caseReid Kleckner2015-11-131-1/+1
| | | | llvm-svn: 253062
* [WinEH] Make UnwindHelp a fixed stack object allocated after XMM CSRsReid Kleckner2015-11-136-13/+71
| | | | | | | Now the offset of UnwindHelp in our EH tables and the offset that we store to in the prologue agree. llvm-svn: 253059
* ELFYAML: Add support for parsing AMDGPU section attribute flagsTom Stellard2015-11-131-1/+16
| | | | | | | | | | Reviewers: silvas Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14444 llvm-svn: 253052
* [ARM] Replace ARMISD::RBIT with ISD::BITREVERSEJames Molloy2015-11-131-0/+11
| | | | | | ISD::BITREVERSE matches "rbit" completely, so remove ARMISD::RBIT and mark ISD::BITREVERSE as legal, adding a test for lowering. llvm-svn: 253047
* [mips][microMIPS] Implement SHRA[_R].PH, SHRAV[_R].PH, SHRAV[_R].QB, ↵Zlatko Buljan2015-11-138-0/+84
| | | | | | | | SHRAV_R.W, SHRA_R.W, SHRL.PH, SHRL.QB, SHRLV.PH and SHRLV.QB instructions Differential Revision: http://reviews.llvm.org/D14010 llvm-svn: 253041
* [mips][ias] Explicitly disable IAS on asm-large-immediate.ll.Daniel Sanders2015-11-131-1/+2
| | | | | | NFC at the moment but it will prevent a failure when IAS is enabled by default. llvm-svn: 253039
* [mips][ias] Replace invalid assembly insn in test since IAS parses inline ↵Daniel Sanders2015-11-131-2/+2
| | | | | | | | | assembly. This is NFC at the moment but will prevent this test from failing when IAS is the default. llvm-svn: 253033
* [AArch64] Check the expansion of BITREVERSE in regression testJames Molloy2015-11-131-2/+21
| | | | | | | | Something I missed from Hal's review, rightly pointed out by Ben Kramer - we should make sure the expansion is properly checked as it can be easy for bugs to creep in. I've checked the scalar i8 expansion here and the vector i8 expansion in a previous commit. llvm-svn: 253024
* [SDAG] Fix expansion of BITREVERSEJames Molloy2015-11-131-0/+45
| | | | | | | | | | Richard Trieu noted that UBSan detected an overflowing shift, and the obvious fix caused a crash. What was happening was that the shiftee (1U) was indeed too small for the possible range of shifts it had to handle, but also we were using "VT.getSizeInBits()" to get the maximum type bitwidth, but we wanted "VT.getScalarSizeInBits()" to get the vector lane size instead of the entire vector size. Use an APInt for the shift and VT.getScalarSizeInBits(). llvm-svn: 253023
* llvm/test/tools/llvm-profdata/text-format-errors.test: Use prepared version ↵NAKAMURA Takumi2015-11-132-2/+2
| | | | | | | | of the input file, instead of using echo. ...and s/\C9/\xC9/ llvm-svn: 253014
* [llvm-profdata] Add check for text profile formats and improve error ↵Nathan Slingerland2015-11-134-5/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | reporting (2nd try) Summary: This change addresses two possible instances of user error / confusion when merging sampled profile data. Previously any input that didn't match the raw or processed instrumented format would automatically be interpreted as instrumented profile text format data. No error would be reported during the merge. Example: If foo-sampled.profdata and bar-sampled.profdata are binary sampled profiles: Old behavior: $ llvm-profdata merge foo-sampled.profdata bar-sampled.profdata -output foobar-sampled.profdata $ llvm-profdata show -sample foobar-sampled.profdata error: foobar-sampled.profdata:1: Expected 'mangled_name:NUM:NUM', found lprofi This change adds basic checks for valid input data when assuming text input. It also makes error messages related to file format validity more specific about the assumbed profile data type. New behavior: $ llvm-profdata merge foo-sampled.profdata bar-sampled.profdata -o foobar-sampled.profdata error: foo.profdata: Unrecognized instrumentation profile encoding format Perhaps you forgot to use the -sample option? Reviewers: bogner, davidxl, dnovillo Subscribers: davidxl, llvm-commits Differential Revision: http://reviews.llvm.org/D14558 llvm-svn: 253009
* [Hexagon] NFC. Adding a number of packet correctness tests.Colin LeMahieu2015-11-135-0/+88
| | | | llvm-svn: 253000
* [WebAssembly] Inline asm support.Dan Gohman2015-11-131-0/+53
| | | | llvm-svn: 252997
* [Hexagon] Adding relaxation functionality to backend and test.Colin LeMahieu2015-11-132-0/+25
| | | | llvm-svn: 252989
* [WinEH] Find root frame correctly in CLR funcletsJoseph Tremoulet2015-11-131-9/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The value that the CoreCLR personality passes to a funclet for the establisher frame may be the root function's frame or may be the parent funclet's (mostly empty) frame in the case of nested funclets. Each funclet stores a pointer to the root frame in its own (mostly empty) frame, as does the root function itself. All frames allocate this slot at the same offset, measured from the post-prolog stack pointer, so that the same sequence can accept any ancestor as an establisher frame parameter value, and so that a single offset can be reported to the GC, which also looks at this slot. This change allocate the slot when processing function entry, and records its frame index on the WinEHFuncInfo object, then inserts the code to set/copy it during prolog emission. Reviewers: majnemer, AndyAyers, pgavlin, rnk Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14614 llvm-svn: 252983
* [WebAssembly] Introduce a new pseudo-operand for unused expression results.Dan Gohman2015-11-131-0/+9
| | | | llvm-svn: 252975
* X86-FMA3: Implemented commute transformations FMA*_Int instructions.Vyacheslav Klochkov2015-11-132-48/+303
| | | | | | | | | | It made it possible to apply the memory folding optimization for the 2nd operand of FMA*_Int instructions. Reviewer: Quentin Colombet Differential Revision: http://reviews.llvm.org/D14550 llvm-svn: 252973
* [Hexagon] Adding checks for values out of operand range and correct ↵Colin LeMahieu2015-11-122-0/+82
| | | | | | new-value producer usage. llvm-svn: 252969
* [Hexagon] Adding test to make sure labels and register pairs are correctly ↵Colin LeMahieu2015-11-121-0/+26
| | | | | | parsed. llvm-svn: 252968
* specify triple and tighten checks using update_llc_test_checks.pySanjay Patel2015-11-121-61/+62
| | | | llvm-svn: 252962
* Revert "Remove unnecessary call to getAllocatableRegClass"Tom Stellard2015-11-122-3/+3
| | | | | | | | | | | | | This reverts commit r252565. This also includes the revert of the commit mentioned below in order to avoid breaking tests in AMDGPU: Revert "AMDGPU: Set isAllocatable = 0 on VS_32/VS_64" This reverts commit r252674. llvm-svn: 252956
* disabling sancov tests: too many failures on different platforms.Mike Aizatsky2015-11-122-0/+0
| | | | | | Differential Revision: http://reviews.llvm.org/D14624 llvm-svn: 252945
* sancov tests - platform independent separatorsMike Aizatsky2015-11-121-4/+4
| | | | llvm-svn: 252943
* Revert "Fix bug 25440: GVN assertion after coercing loads"Tobias Grosser2015-11-121-66/+0
| | | | | | This reverts 252919 which broke LNT: MultiSource/Applications/SPASS llvm-svn: 252936
* sancov test suiteMike Aizatsky2015-11-128-7/+55
| | | | | | Differential Revision: http://reviews.llvm.org/D14589 llvm-svn: 252933
* [ThinLTO] Update test to be more tolerant of ordering changesTeresa Johnson2015-11-121-40/+40
| | | | | | | | | Update the ThinLTO function importing test to use DAG forms of checks so that it is more tolerant of changes to relative ordering between imported decls/defs. This reduces the number of changes required by the comdat importing patch I am sending for review shortly. llvm-svn: 252932
* reverting r252916 to investigate test failureNathan Slingerland2015-11-123-19/+4
| | | | llvm-svn: 252921
* Fix bug 25440: GVN assertion after coercing loadsWeiming Zhao2015-11-121-0/+66
| | | | | | | | | | | | | | | | Summary: when coercing loads, it inserts some instructions, which have no GV assigned. https://llvm.org/bugs/show_bug.cgi?id=25440 Reviewers: hfinkel, dberlin Subscribers: dberlin, llvm-commits Differential Revision: http://reviews.llvm.org/D14479 llvm-svn: 252919
* [ShrinkWrap] Make sure we do not mess up with EH funclet lowering.Quentin Colombet2015-11-121-1/+3
| | | | | | | | ShrinkWrapping does not understand exception handling constraints for now, so make sure we do not mess with them by aborting on functions that use EH funclets. llvm-svn: 252917
* [llvm-profdata] Add check for text profile formats and improve error reportingNathan Slingerland2015-11-123-4/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This change addresses two possible instances of user error / confusion when merging sampled profile data. Previously any input that didn't match the raw or processed instrumented format would automatically be interpreted as instrumented profile text format data. No error would be reported during the merge. Example: If foo-sampled.profdata and bar-sampled.profdata are binary sampled profiles: Old behavior: $ llvm-profdata merge foo-sampled.profdata bar-sampled.profdata -output foobar-sampled.profdata $ llvm-profdata show -sample foobar-sampled.profdata error: foobar-sampled.profdata:1: Expected 'mangled_name:NUM:NUM', found lprofi This change adds basic checks for valid input data when assuming text input. It also makes error messages related to file format validity more specific about the assumbed profile data type. New behavior: $ llvm-profdata merge foo-sampled.profdata bar-sampled.profdata -o foobar-sampled.profdata error: foo.profdata: Unrecognized instrumentation profile encoding format Perhaps you forgot to use the -sample option? Reviewers: bogner, davidxl, dnovillo Subscribers: davidxl, llvm-commits Differential Revision: http://reviews.llvm.org/D14558 llvm-svn: 252916
* [WebAssembly] Reapply r252858, with svn add for the new file.Dan Gohman2015-11-1229-901/+623
| | | | | | | | | | | | | | | | | | | | | | Switch to MC for instruction printing. This encompasses several changes which are all interconnected: - Use the MC framework for printing almost all instructions. - AsmStrings are now live. - This introduces an indirection between LLVM vregs and WebAssembly registers, and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping. This addresses some basic issues with argument registers and unused registers. - The way ARGUMENT instructions are handled no longer generates redundant get_local+set_local for every argument. This also changes the assembly syntax somewhat; most notably, MC's printing does not use sigils on label names, so those are no longer present, and push/pop now have a sigil to keep them unambiguous. The usage of set_local/get_local/$push/$pop will continue to evolve significantly. This patch is just one step of a larger change. llvm-svn: 252910
* [x86] translating "fp" (floating point) instructions from ↵Michael Zuckerman2015-11-122-0/+28
| | | | | | | | | | | {fadd,fdiv,fmul,fsub,fsubr,fdivr} to {faddp,fdivp,fmulp,fsubp,fsubrp,fdivrp} LLVM Missing the following instructions: fadd\fdiv\fmul\fsub\fsubr\fdivr. GAS and MS supporting this instruction and lowering them in to a faddp\fdivp\fmulp\fsubp\fsubrp\fdivrp instructions. Differential Revision: http://reviews.llvm.org/D14217 llvm-svn: 252908
* Revert r252858: "[WebAssembly] Switch to MC for instruction printing."Hans Wennborg2015-11-1229-623/+901
| | | | | | | | It broke the CMake build: "Cannot find source file: WebAssemblyRegNumbering.cpp" llvm-svn: 252897
* Re-apply "[mips] Use correct frame register for DWARF info when dynamically ↵Vasileios Kalintiris2015-11-122-0/+281
| | | | | | | | | realigning the stack."" r252219 reversed the direction of subprogram -> function edge. Fixed the IR to account for this. llvm-svn: 252895
* [ARM] CMOV->BFI combining: handle both senses of CMPZJames Molloy2015-11-121-0/+11
| | | | | | | | I completely misunderstood what ARMISD::CMPZ means. It's not "compare equal to zero", it's "compare, only setting the zero/Z flag". It can either be equal-to-zero or not-equal-to-zero, and we weren't checking what sense it was. If it's equal-to-zero, we can swap the operands around and pretend like it is not-equal-to-zero, which is both a bug fix and lets us handle more cases. llvm-svn: 252891
* Revert "[ARM] Enable shrink-wrapping by default."Renato Golin2015-11-1211-27/+18
| | | | | | This reverts commit r252825, as it broke ASAN on ARM. Investigating... llvm-svn: 252889
* Implement .reloc (constant offset only) with support for R_MIPS_NONE and ↵Daniel Sanders2015-11-122-0/+64
| | | | | | | | | | | | | | | | R_MIPS_32. Summary: Support for R_MIPS_NONE allows us to parse MIPS16's usage of .reloc. R_MIPS_32 was included to be able to better test the directive. Targets can add their relocations by overriding MCAsmBackend::getFixupKind(). Subscribers: grosbach, rafael, majnemer, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D13659 llvm-svn: 252888
* [mips][microMIPS] Implement LWM16, SB16, SH16, SW16, SWSP and SWM16 instructionsZlatko Buljan2015-11-126-0/+88
| | | | | | Differential Revision: http://reviews.llvm.org/D11406 llvm-svn: 252885
* Revert "[mips] Use correct frame register for DWARF info when dynamically ↵Vasileios Kalintiris2015-11-122-281/+0
| | | | | | | | | realigning the stack." This reverts commit r252882. LLParser complains for invalid field 'function' in DISubprogram. llvm-svn: 252884
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