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* SimplifyCFG: Omit range checks for switch lookup tables when default is ↵Hans Wennborg2014-12-011-0/+29
| | | | | | | | unreachable They would get optimized away later, but we might as well not emit them. llvm-svn: 223051
* SimplifyCFG: don't remove unreachable default switch destinationsHans Wennborg2014-12-012-33/+7
| | | | | | | | | | | | | An unreachable default destination can be exploited by other optimizations, and SDag lowering is now prepared to handle them efficiently. For example, branches to the unreachable destination will be optimized away, such as in the case of range checks for switch lookup tables. On 64-bit Linux, this reduces the size of a clang bootstrap by 80 kB (and Chromium by 30 kB). llvm-svn: 223050
* SelectionDAG switch lowering: Replace unreachable default with most popular ↵Hans Wennborg2014-12-013-6/+58
| | | | | | | | | | | | | case. This can significantly reduce the size of the switch, allowing for more efficient lowering. I also worked with the idea of exploiting unreachable defaults by omitting the range check for jump tables, but always ended up with a non-neglible binary size increase. It might be worth looking into some more. llvm-svn: 223049
* Partial revert of r222986.Rafael Espindola2014-12-011-0/+22
| | | | | | | | | | The explicit set of destination types is not fully redundant when lazy loading since the TypeFinder will not find types used only in function bodies. This keeps the logic to drop the name of mapped types since it still helps with avoiding further renaming. llvm-svn: 223043
* The andi16, addiusp and jraddiusp micromips instructions were missing ↵Vladimir Medic2014-12-013-0/+54
| | | | | | dedicated decoder methods in MipsDisassembler.cpp to properly decode immediate operands. These methods are added together with corresponding tests. llvm-svn: 223006
* [PowerPC] Fix unwind info with dynamic stack realignmentJay Foad2014-12-011-0/+8
| | | | | | | | | | | | | | | | | | | | | | Summary: PowerPC DWARF unwind info defined CFA as SP + offset even in a function where the stack had been dynamically realigned. This clearly doesn't work because the offset from SP to CFA is not a constant. Fix it by defining CFA as BP instead. This was causing the AddressSanitizer null_deref test to fail 50% of the time, depending on whether SP happened to be 32-byte aligned on entry to a particular function or not. Reviewers: willschm, uweigand, hfinkel Reviewed By: hfinkel Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6410 llvm-svn: 222996
* Removed extra whitespace. (Testing commit access). NFC.Sonam Kumari2014-12-011-1/+0
| | | | llvm-svn: 222994
* Add post-decode checking of HVC instruction.Charlie Turner2014-12-011-0/+10
| | | | | | | | | | | | Add checkDecodedInstruction for post-decode checking of instructions, to catch the corner cases like HVC that don't fit into the general pattern. Needed to check for an invalid condition field in instruction encoding despite HVC not taking a predicate. Patch by Matthew Wahab. Change-Id: I48e28de981d7a9e43569594da3c45fb478b4f795 llvm-svn: 222992
* [asan] Change dynamic alloca instrumentation to only consider allocas that ↵Yury Gribov2014-12-011-0/+23
| | | | | | | | are dominating all exits from function. Reviewed in http://reviews.llvm.org/D6412 llvm-svn: 222991
* Add Thumb HVC and ERET virtualisation extension instructions.Charlie Turner2014-12-012-0/+120
| | | | | | | Patch by Matthew Wahab. Change-Id: I131f71c1150d5fa797066a18e09d526c19bf9016 llvm-svn: 222990
* Add ARM ERET and HVC virtualisation extension instructions.Charlie Turner2014-12-012-0/+83
| | | | | | | Patch by Matthew Wahab. Change-Id: Iad75f078fbaa4ecc7d7a4820ad9b3930679cbbbb llvm-svn: 222989
* [stack protector] Set edge weights for newly created basic blocks.Akira Hatanaka2014-12-011-0/+36
| | | | | | | | | This commit fixes a bug in stack protector pass where edge weights were not set when new basic blocks were added to lists of successor basic blocks. Differential Revision: http://reviews.llvm.org/D5766 llvm-svn: 222987
* Change how we keep track of which types are in the dest module.Rafael Espindola2014-12-011-1/+4
| | | | | | | | | | Instead of keeping an explicit set, just drop the names of types we choose to map to some other type. This has the advantage that the name of the unused will not cause the context to rename types on module read. llvm-svn: 222986
* Add a test showing what the linker IdentifiedStructTypes is for.Rafael Espindola2014-12-013-0/+21
| | | | | | Without this it could just be deleted and all tests would pass. llvm-svn: 222985
* Relax an assert a bit to avoid a crash on unreachable code.Rafael Espindola2014-12-011-0/+20
| | | | | | Patch by Duncan Exon Smith with a small tweak by me. llvm-svn: 222984
* [PowerPC] Add asm support for cache-inhibited ld/st instructionsHal Finkel2014-11-302-0/+44
| | | | | | | | | Add assembler support for the fixed-point cache-inhibited load/store instructions. These are hypervisor-level only, so don't get too excited ;) Fixes PR21650. llvm-svn: 222976
* Switch lowering: Fix broken 'Figure out which block is next' codeHans Wennborg2014-11-292-2/+17
| | | | | | | This doesn't seem to have worked in a long time, but other optimizations would clean it up. llvm-svn: 222961
* [mips][microMIPS] Implement NOP aliasesJozef Kolek2014-11-295-10/+22
| | | | | | | | | This patch implements microMIPS 16-bit (MOVE16 $0, $0) and 32-bit (SLL $0, $0, 0) NOP aliases. http://reviews.llvm.org/D6440 llvm-svn: 222953
* DebugIR: Delete -debug-irDuncan P. N. Exon Smith2014-11-297-373/+0
| | | | llvm-svn: 222945
* R600/SI: Fix assertion on sign extend of 3 vectorsMatt Arsenault2014-11-281-2/+47
| | | | | | | This was trying to create an MVT with 3x vectors which created an invalid EVT llvm-svn: 222942
* Revert "Masked Vector Load and Store Intrinsics."Duncan P. N. Exon Smith2014-11-285-407/+0
| | | | | | | | | | | This reverts commit r222632 (and follow-up r222636), which caused a host of LNT failures on an internal bot. I'll respond to the commit on the list with a reproduction of one of the failures. Conflicts: lib/Target/X86/X86TargetTransformInfo.cpp llvm-svn: 222936
* InstCombine: FoldOrOfICmps harderDavid Majnemer2014-11-281-0/+10
| | | | | | | | | | | | We may be in a situation where the icmps might not be near each other in a tree of or instructions. Try to dig out related compare instructions and see if they combine. N.B. This won't fire on deep trees of compares because rewritting the tree might end up creating a net increase of IR. We may have to resort to something more sophisticated if this is a real problem. llvm-svn: 222928
* [LICM] Store sink and indirectbr instructionsBruno Cardoso Lopes2014-11-281-0/+45
| | | | | | | | | | | | | | Loop simplify skips exit-block insertion when exits contain indirectbr instructions. This leads to an assertion in LICM when trying to sink stores out of non-dedicated loop exits containing indirectbr instructions. This patch fix this issue by re-checking for dedicated exits in LICM prior to store sink attempts. Differential Revision: http://reviews.llvm.org/D6414 rdar://problem/18943047 llvm-svn: 222927
* [SwitchLowering] Handle multiple destinations on condensed case stmtsBruno Cardoso Lopes2014-11-281-2/+32
| | | | | | | | | | | | | | Switch cases statements with sequential values that branch to the same destination BB may often be handled together in a single new source BB. In this scenario we need to remove remaining incoming values from PHI instructions in the destination BB, as to match the number of source branches. Differential Revision: http://reviews.llvm.org/D6415 rdar://problem/19040894 llvm-svn: 222926
* Enable FeatureFastUAMem for btver2Sanjay Patel2014-11-281-18/+23
| | | | | | | | | | | | | Allow unaligned 16-byte memop codegen for btver2. No functional changes for any other subtargets. Replace the existing supposed small memcpy test with an actual test of a small memcpy. The previous test wasn't using FileCheck either. This patch should allow us to close PR21541 ( http://llvm.org/bugs/show_bug.cgi?id=21541 ). Differential Revision: http://reviews.llvm.org/D6360 llvm-svn: 222925
* Add back r222727 with a fix.Rafael Espindola2014-11-282-0/+22
| | | | | | | | | | | | | | | | | | | | | The original patch would fail when: * A dst opaque type (%A) is matched with a src type (%A). * A src opaque (%E) type is then speculatively matched with %A and the speculation fails afterward. * When rolling back the speculation we would cancel the source %A to dest %A mapping. The fix is to keep an explicit list of which resolutions are speculative. Original message: Fix overly aggressive type merging. If we find out that two types are *not* isomorphic, we learn nothing about opaque sub types in both the source and destination. llvm-svn: 222923
* Add a testcase reduced from clang lto bootstrap on OS X.Rafael Espindola2014-11-282-0/+34
| | | | llvm-svn: 222921
* Fix wrong encoding of MRSBanked.Charlie Turner2014-11-282-66/+66
| | | | | | | Patch by Matthew Wahab. Change-Id: Ia2a001ca2760028ea360fe77b56f203a219eefbc llvm-svn: 222920
* [msan] Fix origin propagation for select of floats.Evgeniy Stepanov2014-11-281-0/+14
| | | | | | | | | | MSan does not assign origin for instrumentation temps (i.e. the ones that do not come from the application code), but "select" instrumentation erroneously tried to use one of those. https://code.google.com/p/memory-sanitizer/issues/detail?id=78 llvm-svn: 222918
* Test all <build attribute, value> pairs.Charlie Turner2014-11-2822-287/+1148
| | | | | | | | | | Add more tests to make sure the encoding/decoding of build attributes works correctly for all permissible values of build attributes. For cases where there are an infinite number of such values, a representative subset has been settled for. Change-Id: I2643c9624c211b2d56405306e16eec2d487bc5d6 llvm-svn: 222917
* AArch64: treat [N x Ty] as a block during procedure calls.Tim Northover2014-11-272-1/+93
| | | | | | | | | | | | | | The AAPCS treats small structs and homogeneous floating (or vector) aggregates specially, and guarantees they either get passed as a contiguous block of registers, or prevent any future use of those registers and get passed on the stack. This concept can fit quite neatly into LLVM's own type system, mapping an HFA to [N x float] and so on, and small structs to [N x i64]. Doing so allows front-ends to emit AAPCS compliant code without having to duplicate the register counting logic. llvm-svn: 222903
* [mips][microMIPS] Implement SWM16 and LWM16 instructionsZoran Jovanovic2014-11-272-0/+15
| | | | | | Differential Revision: http://reviews.llvm.org/D5579 llvm-svn: 222901
* [mips][microMIPS] Implement BREAK16 and SDBBP16 instructionsJozef Kolek2014-11-271-0/+6
| | | | | | | | Patch by Radovan Obradovic. Differential Revision: http://reviews.llvm.org/D5048 llvm-svn: 222900
* [mips] Add synci instruction.Daniel Sanders2014-11-275-2/+7
| | | | | | | | | | | | | | Patch by Amaury Pouly Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6421 llvm-svn: 222899
* Widen ELFYAML relocation type to 32 bitsWill Newton2014-11-271-1/+9
| | | | | | | The current 8 bits is sufficient for ELF32 targets but ELF64 requires 32 bits. Add a test for AArch64 that exposes the issue. llvm-svn: 222898
* Commit back the correct bits of r222760 (was r222538).Rafael Espindola2014-11-271-0/+27
| | | | | | | | | | | | | | | | | I also added a test. Original message: Allow FDE references outside the +/-2GB range supported by PC relative offsets for code models other than small/medium. For JIT application, memory layout is less controlled and can result in truncations otherwise. Patch from Akos Kiss. Differential Revision: http://reviews.llvm.org/D6079 llvm-svn: 222897
* Revert "Reapply 222538 and update tests to explicitly request small code ↵Rafael Espindola2014-11-2720-60/+20
| | | | | | | | | | | | | | | | model and PIC:" This reverts commit r222760. It changed our behaviour on PIC so we don't match gas anymore. It also included lots of unnecessary changes to tests. If those changes are desirable, there should be an independent discussion as they are out of scope for that patch. I will recommit the other bits. llvm-svn: 222896
* Revert "Fix overly aggressive type merging."Duncan P. N. Exon Smith2014-11-272-22/+0
| | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit r222727, which causes LTO bootstrap failures. Last passing @ r222698: http://lab.llvm.org:8080/green/job/clang-Rlto_master_build/532/ First failing @ r222843: http://lab.llvm.org:8080/green/job/clang-Rlto_master_build/533/ Internal bootstraps pointed at a much narrower range: r222725 is passing, and r222731 is failing. LTO crashes while handling libclang.dylib: http://lab.llvm.org:8080/green/job/clang-Rlto_master_build/533/consoleFull#-158682280549ba4694-19c4-4d7e-bec5-911270d8a58c GEP is not of right type for indices! %InfoObj.i.i = getelementptr inbounds %"class.llvm::OnDiskIterableChainedHashTable"* %.lcssa, i64 0, i32 0, i32 4, !dbg !123627 %"class.clang::serialization::reader::ASTIdentifierLookupTrait" = type { %"class.clang::ASTReader.31859"*, %"class.clang::serialization::ModuleFile.31870"*, %"class.clang::IdentifierInfo"* }LLVM ERROR: Broken function found, compilation aborted! clang: error: linker command failed with exit code 1 (use -v to see invocation) Looks like the new algorithm doesn't merge types aggressively enough. llvm-svn: 222895
* reinstate r222872: Peephole optimization in switch table lookup: reuse the ↵Erik Eckstein2014-11-271-0/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | guarding table comparison if possible. Fixed missing dominance check. Original commit message: This optimization tries to reuse the generated compare instruction, if there is a comparison against the default value after the switch. Example: if (idx < tablesize) r = table[idx]; // table does not contain default_value else r = default_value; if (r != default_value) ... Is optimized to: cond = idx < tablesize; if (cond) r = table[idx]; else r = default_value; if (cond) ... Jump threading will then eliminate the second if(cond). llvm-svn: 222891
* [msan] Remove indirect call wrapping code.Evgeniy Stepanov2014-11-272-81/+0
| | | | | | This functionality was only used in MSanDR, which is deprecated. llvm-svn: 222889
* [mips][microMIPS] Implement disassembler support for 16-bit instructions ↵Jozef Kolek2014-11-272-0/+36
| | | | | | | | LI16, ADDIUR1SP, ADDIUR2 and ADDIUS5 Differential Revision: http://reviews.llvm.org/D6419 llvm-svn: 222887
* Stop uppercasing build attribute data.Charlie Turner2014-11-277-15/+14
| | | | | | | | | | | | | | | | | | | | | | | | The string data for string-valued build attributes were being unconditionally uppercased. There is no mention in the ARM ABI addenda about case conventions, so it's technically implementation defined as to whether the data are capitialised in some way or not. However, there are good reasons not to captialise the data. * It's less work. * Some vendors may legitimately have case-sensitive checks for these attributes which would fail on LLVM generated object files. * There could be locale issues with uppercasing. The original reasons for uppercasing appear to have stemmed from an old codesourcery toolchain behaviour, see http://comments.gmane.org/gmane.comp.compilers.llvm.cvs/87133 This patch makes the object file emitted no longer captialise string data, it encodes as seen in the assembly source. Change-Id: Ibe20dd6e60d2773d57ff72a78470839033aa5538 llvm-svn: 222882
* Use FileCheck instead of grep. Change by Ankur Garg.Suyog Sarda2014-11-272-5/+14
| | | | | | Differential Revision: http://reviews.llvm.org/D6430 llvm-svn: 222879
* Revert "Peephole optimization in switch table lookup: reuse the guarding ↵Erik Eckstein2014-11-271-94/+0
| | | | | | | | table comparison if possible." It is breaking the clang bootstrag. llvm-svn: 222877
* Use FileCheck instead of grep. Change by Sonam.Suyog Sarda2014-11-272-4/+7
| | | | | | Differential Revision: http://reviews.llvm.org/D6432 llvm-svn: 222876
* Peephole optimization in switch table lookup: reuse the guarding table ↵Erik Eckstein2014-11-271-0/+94
| | | | | | | | | | | | | | | | | | | | | | | | | comparison if possible. This optimization tries to reuse the generated compare instruction, if there is a comparison against the default value after the switch. Example: if (idx < tablesize) r = table[idx]; // table does not contain default_value else r = default_value; if (r != default_value) ... Is optimized to: cond = idx < tablesize; if (cond) r = table[idx]; else r = default_value; if (cond) ... \endcode Jump threading will then eliminate the second if(cond). llvm-svn: 222872
* InstCombine: Restore optimizations lost in r210006David Majnemer2014-11-271-0/+53
| | | | | | | | This restores our ability to optimize: (X & C) == 0 ? X ^ C : X into X | C (X & C) != 0 ? X ^ C : X into X & ~C llvm-svn: 222871
* InstSimplify: Restore optimizations lost in r210006David Majnemer2014-11-272-10/+85
| | | | | | | | | | This restores our ability to optimize: (X & C) ? X & ~C : X into X & ~C (X & C) ? X : X & ~C into X (X & C) ? X | C : X into X (X & C) ? X : X | C into X | C llvm-svn: 222868
* Revert "Added inst combine transforms for single bit tests from Chris's note"David Majnemer2014-11-261-105/+10
| | | | | | | | | | | This reverts commit r210006, it miscompiled libapr which is used in who knows how many projects. A test has been added to ensure that we don't regress again. I'll work on a rewrite of what the optimization was trying to do later. llvm-svn: 222856
* [Hexagon] Adding cmp* immediate form instructions.Colin LeMahieu2014-11-263-0/+30
| | | | llvm-svn: 222849
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