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* SelectionDAG: Lower some range metadata to AssertZextMatt Arsenault2016-02-082-0/+90
| | | | | | | | | | If a range has a lower bound of 0, add an AssertZext from the nearest floor power of two. This allows operations with some workitem intrinsics with known maximum ranges to use fast 24-bit multiplies. llvm-svn: 260109
* [AVX512][PROLQ][PROLD] Change imm8 to intMichael Zuckerman2016-02-082-30/+30
| | | | | | Differential Revision: http://reviews.llvm.org/D16983 llvm-svn: 260101
* Revert r260086 and r260085. They have broken the memorySilviu Baranga2016-02-082-296/+6
| | | | | | sanitizer bots. llvm-svn: 260087
* [LoopVersioning] Don't assert when there are no memchecksSilviu Baranga2016-02-081-10/+10
| | | | | | | | | | | | We shouldn't assert when there are no memchecks, since we can have SCEV checks. There is already an assert covering the case where there are no SCEV checks or memchecks. This also changes the LAA pointer wrapping versioning test to use the loop versioning pass (this was how I managed to trigger the assert in the loop versioning pass). llvm-svn: 260086
* [SCEV][LAA] Add no wrap SCEV predicates and use use them to improve strided ↵Silviu Baranga2016-02-082-6/+296
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | pointer detection Summary: This change adds no wrap SCEV predicates with: - support for runtime checking - support for expression rewriting: (sext ({x,+,y}) -> {sext(x),+,sext(y)} (zext ({x,+,y}) -> {zext(x),+,sext(y)} Note that we are sign extending the increment of the SCEV, even for the zext case. This is needed to cover the fairly common case where y would be a (small) negative integer. In order to do this, this change adds two new flags: nusw and nssw that are applicable to AddRecExprs and permit the transformations above. We also change isStridedPtr in LAA to be able to make use of these predicates. With this feature we should now always be able to work around overflow issues in the dependence analysis. Reviewers: mzolotukhin, sanjoy, anemet Subscribers: mzolotukhin, sanjoy, llvm-commits, rengolin, jmolloy, hfinkel Differential Revision: http://reviews.llvm.org/D15412 llvm-svn: 260085
* [asan] Introduce new hidden -asan-use-private-alias option.Maxim Ostapenko2016-02-081-0/+23
| | | | | | | | | | | | | | | | As discussed in https://github.com/google/sanitizers/issues/398, with current implementation of poisoning globals we can have some CHECK failures or false positives in case of mixing instrumented and non-instrumented code due to ASan poisons innocent globals from non-sanitized binary/library. We can use private aliases to avoid such errors. In addition, to preserve ODR violation detection, we introduce new __odr_asan_gen_XXX symbol for each instrumented global that indicates if this global was already registered. To detect ODR violation in runtime, we should only check the value of indicator and report an error if it isn't equal to zero. Differential Revision: http://reviews.llvm.org/D15642 llvm-svn: 260075
* [X86] Change FeatureIFMA string to 'avx512ifma'. Matches gcc and fixes PR26461.Craig Topper2016-02-084-4/+4
| | | | llvm-svn: 260069
* Disable llvm/test/tools/llvm-profdata/value-prof.proftext on win32 for now. ↵NAKAMURA Takumi2016-02-071-0/+2
| | | | | | Investigating. llvm-svn: 260064
* [X86][SSE] Resolve target shuffle inputs to sentinels to permit more combinesSimon Pilgrim2016-02-072-9/+6
| | | | | | | | | | | | The combineX86ShufflesRecursively only supports unary shuffles, but was missing the opportunity to combine binary shuffles with a zero / undef second input. This patch resolves target shuffle inputs, converting the shuffle mask elements to SM_SentinelUndef/SM_SentinelZero where possible. It then resolves the updated mask to check if we have created a faux unary shuffle. Additionally, we now attempt to recursively call combineX86ShufflesRecursively for all input operands (we used to just recurse for unary integer shuffles and unary unpacks) - it safely returns early if its not a target shuffle. Differential Revision: http://reviews.llvm.org/D16683 llvm-svn: 260063
* [X86][SSE] Regenerate PSHUFB shuffle mask comments testsSimon Pilgrim2016-02-071-11/+32
| | | | llvm-svn: 260061
* Make check line consistentDaniel Berlin2016-02-071-0/+29
| | | | llvm-svn: 260055
* [X86][SSE] Added support for MOVHPD/MOVLPD + MOVHPS/MOVLPS shuffle decoding.Simon Pilgrim2016-02-077-40/+66
| | | | llvm-svn: 260034
* [X86][AVX512] add intrinsics of Scalar FP to integer conversion with ↵Asaf Badouh2016-02-071-4/+146
| | | | | | | | rounding mode Differential Revision: http://reviews.llvm.org/D16629 llvm-svn: 260033
* AVX512: VPBROADCASTB/W/D/Q from GPR intrinsics implementation.Igor Breger2016-02-077-50/+363
| | | | | | Differential Revision: http://reviews.llvm.org/D16813 llvm-svn: 260024
* [X86][AVX2] Regenerated broadcast domain testsSimon Pilgrim2016-02-061-44/+54
| | | | llvm-svn: 260010
* [X86][SSE] Add tests for MOVHLPS/MOVLHPS shuffle lowering.Simon Pilgrim2016-02-062-0/+46
| | | | | | As raised in PR26491, we don't make use of these instructions at the moment. llvm-svn: 260008
* [X86][AVX512] Added support for VPMOVZX shuffle decoding.Simon Pilgrim2016-02-067-109/+135
| | | | llvm-svn: 260007
* [NVPTX] Mark nvvm synchronizing intrinsics as convergent.Justin Lebar2016-02-061-2/+2
| | | | | | | | | | | | | | | Summary: This is the attribute purpose-made for e.g. __syncthreads. It appears that NoDuplicate may not be sufficient to prevent Sink from touching a call to __syncthreads. Reviewers: jingyue, hfinkel Subscribers: llvm-commits, jholewinski, jhen, rnk, tra, majnemer Differential Revision: http://reviews.llvm.org/D16941 llvm-svn: 260005
* [X86][AVX512] Fixed prefix ordering for lzcnt tests.Simon Pilgrim2016-02-063-159/+117
| | | | | | Let AVX512 targets share the same CHECKs. llvm-svn: 260000
* [X86][SSE] Regenerate vector shift testsSimon Pilgrim2016-02-066-6/+6
| | | | llvm-svn: 259999
* [ThinLTO] Include linkage type in function summaryTeresa Johnson2016-02-062-2/+63
| | | | | | | | | | | | | | | | Summary: Adds the linkage type to both the per-module and combined function summaries, which subsumes the current islocal bit. This will eventually be used to optimized linkage types based on global summary-based analysis. Reviewers: joker.eph Subscribers: joker.eph, davidxl, llvm-commits Differential Revision: http://reviews.llvm.org/D16943 llvm-svn: 259993
* line endings fixSimon Pilgrim2016-02-061-45/+45
| | | | llvm-svn: 259992
* [X86][SSE] Don't replace an existing 32-bit load with its duplicateSimon Pilgrim2016-02-061-3/+45
| | | | | | | | If we are already loading a single 32-bit float/integer then just reuse it. Fix for regression in D16729 llvm-svn: 259991
* Corrected tests for Loop Versioning LICM, by adding “REQUIRES: asserts”.Ashutosh Nema2016-02-063-0/+3
| | | | | | Earlier they were failing under no-assert build. llvm-svn: 259989
* New Loop Versioning LICM PassAshutosh Nema2016-02-063-0/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When alias analysis is uncertain about the aliasing between any two accesses, it will return MayAlias. This uncertainty from alias analysis restricts LICM from proceeding further. In cases where alias analysis is uncertain we might use loop versioning as an alternative. Loop Versioning will create a version of the loop with aggressive aliasing assumptions in addition to the original with conservative (default) aliasing assumptions. The version of the loop making aggressive aliasing assumptions will have all the memory accesses marked as no-alias. These two versions of loop will be preceded by a memory runtime check. This runtime check consists of bound checks for all unique memory accessed in loop, and it ensures the lack of memory aliasing. The result of the runtime check determines which of the loop versions is executed: If the runtime check detects any memory aliasing, then the original loop is executed. Otherwise, the version with aggressive aliasing assumptions is used. The pass is off by default and can be enabled with command line option -enable-loop-versioning-licm. Reviewers: hfinkel, anemet, chatur01, reames Subscribers: MatzeB, grosser, joker.eph, sanjoy, javed.absar, sbaranga, llvm-commits Differential Revision: http://reviews.llvm.org/D9151 llvm-svn: 259986
* [llvm-dwp] Merge cu_index from DWPsDavid Blaikie2016-02-063-0/+48
| | | | | | This is almost feature complete - just missing tu_index merging now. llvm-svn: 259971
* Make the OCaml tests temporarily unsupported until they can be updated.Eric Christopher2016-02-051-0/+3
| | | | llvm-svn: 259954
* AMDGPU: Account for LDS alignmentMatt Arsenault2016-02-051-0/+268
| | | | | | | | | | | | | The current situation isn't great, because the amount of padding requires is determined by the inverse order of the first encountered use. We should eventually somehow sort these to minimize wasted space. Another problem is the alignment of kernel arguments isn't respected. The group_segment_alignment is always emitted as the default 16, and typed arguments with higher alignments or an explicitly set alignment are also ignored. llvm-svn: 259912
* AMDGPU: Preserve alignments on new created globalsMatt Arsenault2016-02-052-5/+31
| | | | | | | Also switch to internal linkage, and include the name of the function in the name. llvm-svn: 259911
* Fix echo.ll test failing due to DOS line endingsReid Kleckner2016-02-051-1/+1
| | | | llvm-svn: 259896
* Some stackslots are allocated to vregs which have no real reference.Wei Mi2016-02-051-0/+246
| | | | | | | | | | | | | | LiveRangeEdit::eliminateDeadDef is used to remove dead define instructions after rematerialization. To remove a VNI for a vreg from its LiveInterval, LiveIntervals::removeVRegDefAt is used. However, after non-PHI VNIs are all removed, PHI VNI are still left in the LiveInterval. Such unused vregs will be kept in RegsToSpill[] at the end of InlineSpiller::reMaterializeAll and spiller will allocate stackslot for them. The fix is to get rid of unused reg by checking whether it has non-dbg reference instead of whether it has non-empty interval. llvm-svn: 259895
* [WebAssembly] Update the select instructions' operand orders to match the spec.Dan Gohman2016-02-051-12/+12
| | | | llvm-svn: 259893
* Add the missing test case for PR26193Nemanja Ivanovic2016-02-051-0/+9
| | | | llvm-svn: 259888
* Revert "[AArch64] Improve load/store optimizer to handle LDUR + LDR (take 3)."Renato Golin2016-02-051-105/+0
| | | | | | This reverts commit r259812 as it broke AArch64 self-hosting. llvm-svn: 259881
* [MC] Add support for encoding CodeView variable definition rangesDavid Majnemer2016-02-052-2/+99
| | | | | | | | | | | | | | | | | | | CodeView, like most other debug formats, represents the live range of a variable so that debuggers might print them out. They use a variety of records to represent how a particular variable might be available (in a register, in a frame pointer, etc.) along with a set of ranges where this debug information is relevant. However, the format only allows us to use ranges which are limited to a maximum of 0xF000 in size. This means that we need to split our debug information into chunks of 0xF000. Because the layout of code is not known until *very* late, we must use a new fragment to record the information we need until we can know *exactly* what the range is. llvm-svn: 259868
* Add various binary operations in the LLVM C API echo testAmaury Sechet2016-02-051-3/+15
| | | | | | | | | | | | Summary: This diff increase the tested surface of the C API. Reviewers: bogner, chandlerc, echristo, dblaikie, joker.eph, Wallbraker Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D16910 llvm-svn: 259863
* [LoopLoadElim] Don't allow versioning when optForSizeAdam Nemet2016-02-051-0/+76
| | | | | | This was requested in the review of D16300. llvm-svn: 259861
* Fix typo in commentAdam Nemet2016-02-051-1/+1
| | | | llvm-svn: 259860
* Add a test for MemorySSA. NFC.George Burgess IV2016-02-051-0/+24
| | | | | | | We don't currently have many tests that deal with operations on multiple local MemoryLocations. This new test helps out a bit in that regard. llvm-svn: 259854
* Improve testing for the C APIAmaury Sechet2016-02-041-0/+32
| | | | | | | | | | | | | | | | | | | Summary: This basically add an echo test case in C. The support is limited right now, but full support would just be too much to review at once. The echo test case simply get a module as input and try to output the same exact module. This allow to check the both reading and writing API are working as expected. I want to improve this test over time to support more and more of the API, in order to improve coverage (coverage is quite poor right now). Test Plan: Run the test. Reviewers: chandlerc, bogner Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10725 llvm-svn: 259844
* Fix for PR 26356Nemanja Ivanovic2016-02-041-0/+136
| | | | | | | | | Using the load immediate only when the immediate (whether signed or unsigned) can fit in a 16-bit signed field. Namely, from -32768 to 32767 for signed and 0 to 65535 for unsigned. This patch also ensures that we sign-extend under the right conditions. llvm-svn: 259840
* Provide a test case for rl259798Nemanja Ivanovic2016-02-041-0/+10
| | | | llvm-svn: 259835
* [X86][SSE] Select domain for 32/64-bit partial loads for ↵Simon Pilgrim2016-02-046-70/+77
| | | | | | | | | | EltsFromConsecutiveLoads Choose between MOVD/MOVSS and MOVQ/MOVSD depending on the target vector type. This has a lot fewer test changes than trying to add this to X86InstrInfo::setExecutionDomain..... llvm-svn: 259816
* [AArch64] Improve load/store optimizer to handle LDUR + LDR (take 3).Chad Rosier2016-02-041-0/+105
| | | | | | | | | | | | | | | This patch allows the mixing of scaled and unscaled load/stores to form load/store pairs. PR24465 http://reviews.llvm.org/D12116 Many thanks to Ahmed and Michael for fixes and code review. This is a reapplication of r246769 and r259790. The tramp3d failure was caused by an incorrect refactoring in the patch. Specifically, we weren't always properly clearing the SExtIdx flag. llvm-svn: 259812
* [AArch64] Multiply extended 32-bit ints with `[U|S]MADDL'Silviu Baranga2016-02-041-0/+52
| | | | | | | | | | | | | | | | | | | | | | | During instruction selection, the AArch64 backend can recognise the following pattern and generate an [U|S]MADDL instruction, i.e. a multiply of two 32-bit operands with a 64-bit result: (mul (sext i32), (sext i32)) However, when one of the operands is constant, the sign extension gets folded into the constant in SelectionDAG::getNode(). This means that the instruction selection sees this: (mul (sext i32), i64) ...which doesn't match the pattern. Sign-extension and 64-bit multiply instructions are generated, which are slower than one 32-bit multiply. Add a pattern to match this and generate the correct instruction, for both signed and unsigned multiplies. Patch by Chris Diamand! llvm-svn: 259800
* The canonical way to XFAIL a test for all targets is XFAIL: *, not XFAIL:Benjamin Kramer2016-02-042-2/+2
| | | | | | | | Fix the lit bug that enabled this "feature" (empty triple is substring of all possible target triples) and change the two outliers to use the documented * syntax. llvm-svn: 259799
* [PPC] Move PPC test to a PPC-specific dirRenato Golin2016-02-041-0/+0
| | | | llvm-svn: 259797
* [X86][SSE] Add general 32-bit LOAD + VZEXT_MOVL support to ↵Simon Pilgrim2016-02-043-133/+31
| | | | | | | | | | EltsFromConsecutiveLoads This patch adds support for consecutive (load/undef elements) 32-bit loads, followed by trailing undef/zero elements to be combined to a single MOVD load. Differential Revision: http://reviews.llvm.org/D16729 llvm-svn: 259796
* Revert "[AArch64] Improve load/store optimizer to handle LDUR + LDR."Chad Rosier2016-02-041-105/+0
| | | | | | This reverts commit r259790. tramp3d-v4 is still having problems. llvm-svn: 259795
* [X86][SSE] Added i686 target tests to make sure we are correctly loading ↵Simon Pilgrim2016-02-043-0/+504
| | | | | | consecutive entries as 64-bit integers llvm-svn: 259794
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