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* Missing test from r216989Renato Golin2014-09-021-0/+34
| | | | llvm-svn: 216990
* Only emit movw on ARMv6T2+Renato Golin2014-09-021-1/+1
| | | | | | | | Fix PR18364. Patch by Dimitry Andric. llvm-svn: 216989
* [FastISel][AArch64] Use the target-dependent selection code for shifts first.Juergen Ributzka2014-09-022-23/+12
| | | | | | | | | | | | This uses the target-dependent selection code for shifts first, which allows us to create better code for shifts with immediates and sign-/zero-extend folding. Vector type are not handled yet and the code falls back to target-independent instruction selection for these cases. This fixes rdar://problem/17907920. llvm-svn: 216985
* Nuke MCAnalysis.Sean Silva2014-09-024-251/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code is buggy and barely tested. It is also mostly boilerplate. (This includes MCObjectDisassembler, which is the interface to that functionality) Following an IRC discussion with Jim Grosbach, it seems sensible to just nuke the whole lot of functionality, and dig it up from VCS if necessary (I hope not!). All of this stuff appears to have been added in a huge patch dump (look at the timeframe surrounding e.g. r182628) where almost every patch seemed to be untested and not reviewed before being committed. Post-review responses to the patches were never addressed. I don't think any of it would have passed pre-commit review. I doubt anyone is depending on this, since this code appears to be extremely buggy. In limited testing that Michael Spencer and I did, we couldn't find a single real-world object file that wouldn't crash the CFG reconstruction stuff. The symbolizer stuff has O(n^2) behavior and so is not much use to anyone anyway. It seemed simpler to remove them as a whole. Most of this code is boilerplate, which is the only way it was able to scrape by 60% coverage. HEADSUP: Modules folks, some files I nuked were referenced from include/llvm/module.modulemap; I just deleted the references. Hopefully that is the right fix (one was a FIXME though!). llvm-svn: 216983
* Reinstate "Nuke the old JIT."Eric Christopher2014-09-02108-129/+87
| | | | | | | | Approved by Jim Grosbach, Lang Hames, Rafael Espindola. This reinstates commits r215111, 215115, 215116, 215117, 215136. llvm-svn: 216982
* [X86] Allow atomic operations using immediates to avoid using a registerRobin Morisset2014-09-021-0/+502
| | | | | | | | | | | | | | | | The only valid lowering of atomic stores in the X86 backend was mov from register to memory. As a result, storing an immediate required a useless copy of the immediate in a register. Now these can be compiled as a simple mov. Similarily, adding/and-ing/or-ing/xor-ing an immediate to an atomic location (but through an atomic_store/atomic_load, not a fetch_whatever intrinsic) can now make use of an 'add $imm, x(%rip)' instead of using a register. And the same applies to inc/dec. This second point matches the first issue identified in http://llvm.org/bugs/show_bug.cgi?id=17281 llvm-svn: 216980
* [asan] Assign a low branch weight to ASan's slow path, patch by Jonas ↵Kostya Serebryany2014-09-021-1/+3
| | | | | | Wagner. This speeds up asan (at least on SPEC) by 1%-5% or more. Also fix lint in dfsan. llvm-svn: 216972
* R600/SI: Relax some ordering in tests.Matt Arsenault2014-09-024-26/+31
| | | | | | This will help with enabling misched llvm-svn: 216971
* Add a CFL Alias Analysis implementationHal Finkel2014-09-028-0/+210
| | | | | | | | | | | | | | | | This provides an implementation of CFL alias analysis (including some supporting data structures). Currently, we don't have any extremely fancy features, sans some interprocedural analysis (i.e. no field sensitivity, etc.), and we do best sitting behind BasicAA + TBAA. In such a configuration, we take ~0.6-0.8% of total compile time, and give ~7-8% NoAlias responses to queries TBAA and BasicAA couldn't answer when bootstrapping LLVM. In testing this on other projects, we've seen up to 10.5% of queries dropped by BasicAA+TBAA answered with NoAlias by this algorithm. Patch by George Burgess IV (with minor modifications by me -- mostly adapting some BasicAA tests), thanks! llvm-svn: 216970
* Generate extract for in-tree uses if the use is scalar operand in vectorized ↵Yi Jiang2014-09-021-0/+70
| | | | | | instruction. radar://18144665 llvm-svn: 216946
* R600/SI: Fix hardcoded register numbers in testMatt Arsenault2014-09-021-1/+1
| | | | llvm-svn: 216944
* R600/SI: Add failing testcase.Matt Arsenault2014-09-021-0/+43
| | | | | | | This is broken when 64-bit add is only partially moved to the VALU. llvm-svn: 216933
* Fix interference caused by fmul 2, x -> fadd x, xMatt Arsenault2014-09-022-40/+96
| | | | | | | | If an fmul was introduced by lowering, it wouldn't be folded into a multiply by a constant since the earlier combine would have replaced the fmul with the fadd. llvm-svn: 216932
* Fix crash when looking up the addrspace of GEPs with vector typesMatt Arsenault2014-09-021-0/+12
| | | | | | Patch by Björn Steinbrink llvm-svn: 216930
* CodeGen: Handle va_start in the entry blockReid Kleckner2014-09-021-0/+19
| | | | | | | | | Also fix a small copy-paste bug in X86ISelLowering where Chain should have been used in place of DAG.getEntryToken(). Fixes PR20828. llvm-svn: 216929
* Revert: [APFloat] Fixed a bug in method 'fusedMultiplyAdd'.Andrea Di Biagio2014-09-021-119/+0
| | | | | | | This reverts revision 216913; the new test added at revision 216913 caused regression failures on a couple of buildbots. llvm-svn: 216914
* [APFloat] Fixed a bug in method 'fusedMultiplyAdd'.Andrea Di Biagio2014-09-021-0/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | When folding a fused multiply-add builtin call, make sure that we propagate the correct result in the case where the addend is zero, and the two other operands are finite non-zero. Example: define double @test() { %1 = call double @llvm.fma.f64(double 7.0, double 8.0, double 0.0) ret double %1 } Before this patch, the instruction simplifier wrongly folded the builtin call in function @test to constant 'double 7.0'. With this patch, method 'fusedMultiplyAdd' correctly evaluates the multiply and propagates the expected result (i.e. 56.0). Added test fold-builtin-fma.ll with the reproducible from PR20832 plus extra test cases to verify the behavior of method 'fusedMultiplyAdd' in the presence of NaN/Inf operands. This fixes PR20832. Differential Revision: http://reviews.llvm.org/D5152 llvm-svn: 216913
* LICM: Don't crash when an instruction is used by an unreachable BBDavid Majnemer2014-09-021-0/+22
| | | | | | | | | | | | | | | | | | | Summary: BBs might contain non-LCSSA'd values after the LCSSA pass is run if they are unreachable from the entry block. Normally, the users of the instruction would be PHIs but the unreachable BBs have normal users; rewrite their uses to be undef values. An alternative fix could involve fixing this at LCSSA but that would require this invariant to hold after subsequent transforms. If a BB created an unreachable block, they would be in violation of this. This fixes PR19798. Differential Revision: http://reviews.llvm.org/D5146 llvm-svn: 216911
* Enable splitting indexing from loads with TargetConstantsHal Finkel2014-09-021-0/+82
| | | | | | | | | | | | When I recommitted r208640 (in r216898) I added an exclusion for TargetConstant offsets, as there is no guarantee that a backend can handle them on generic ADDs (even if it generates them during address-mode matching) -- and, specifically, applying this transformation directly with TargetConstants caused a self-hosting failure on PPC64. Ignoring all TargetConstants, however, is less than ideal. Instead, for non-opaque constants, we can convert them into regular constants for use with the generated ADD (or SUB). llvm-svn: 216908
* Replace -use-init-array with -use-ctors.Rafael Espindola2014-09-024-6/+6
| | | | | | | | | | | | | We have been using .init-array for most systems for quiet some time, but tools like llc are still defaulting to .ctors because the old option was never changed. This patch makes llc default to .init-array and changes the option to be -use-ctors. Clang is not affected by this. It has its own fancier logic. llvm-svn: 216905
* Merge Extend and Shift into a UBFXDavid Xu2014-09-021-0/+28
| | | | llvm-svn: 216899
* Revert "Revert '[DAGCombiner] Split up an indexed load if only the base ↵Hal Finkel2014-09-021-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pointer value is live'" I reverted r208640 in r209747 because r208640 broke self-hosting on PPC64. The underlying cause of the failure is that pre-inc loads with increments represented by ISD::TargetConstants were being transformed into ISD:::ADDs with ISD::TargetConstant operands. PPC doesn't have a pattern for those, and so they were selected as invalid r+r adds. This recommits r208640, rebased and with an exclusion for ISD::TargetConstant increments. This behavior seems correct, although in the future we might want to ask the target to split out the indexing that uses ISD::TargetConstants. Unfortunately, I don't yet have small test case where the relevant invalid 'add' instruction is not itself dead (and thus eliminated by DeadMachineInstructionElim -- sometimes bugpoint is too good at removing things) Original commit message (by Adam Nemet): Right now the load may not get DCE'd because of the side-effect of updating the base pointer. This can happen if we lower a read-modify-write of an illegal larger type (e.g. i48) such that the modification only affects one of the subparts (the lower i32 part but not the higher i16 part). See the testcase. In order to spot the dead load we need to revisit it when SimplifyDemandedBits decided that the value of the load is masked off. This is the CommitTargetLoweringOpt piece. I checked compile time with ARM64 by sending SPEC bitcode files through llc. No measurable change. Fixes <rdar://problem/16031651> llvm-svn: 216898
* SROA: Don't insert instructions before a PHIDavid Majnemer2014-09-011-0/+34
| | | | | | | | | | | | | | | SROA may decide that it needs to insert a bitcast and would set it's insertion point before a PHI. This will create an invalid module right quick. Instead, choose the first insertion point in the basic block that holds our PHI. This fixes PR20822. Differential Revision: http://reviews.llvm.org/D5141 llvm-svn: 216891
* Revert "Revert two GEP-related InstCombine commits"David Majnemer2014-09-011-0/+73
| | | | | | | | | | | | | | This reverts commit r216698 which reverted r216523 and r216598. We would attempt to perform the transformation even if the match() failed because, as a side effect, it would set V. This would trick us into believing that we correctly found a place to correctly apply the transform. An additional test case was added to getelementptr.ll so that we might not regress in the future. llvm-svn: 216890
* Add a convenience method to copy wrapping, exact, and fast-math flags (NFC).Sanjay Patel2014-09-011-0/+24
| | | | | | | | | | | | | | The loop vectorizer preserves wrapping, exact, and fast-math properties of scalar instructions. This patch adds a convenience method to make that operation easier because we need to do this in the loop vectorizer, SLP vectorizer, and possibly other places. Although this is a 'no functional change' patch, I've added a testcase to verify that the exact flag is preserved by the loop vectorizer. The wrapping and fast-math flags are already checked in existing testcases. Differential Revision: http://reviews.llvm.org/D5138 llvm-svn: 216886
* Fix a typo in comments in r216862, NFCJingyue Wu2014-09-011-1/+1
| | | | | | PR20766 -> PR20776. Thanks Roman Divacky for the catch! llvm-svn: 216883
* [ARM] Add Thumb-2 code size optimization regression test for EOR.Tilmann Scheller2014-09-011-0/+9
| | | | llvm-svn: 216881
* ARM] Add Thumb-2 code size optimization regression test for BIC.Tilmann Scheller2014-09-011-0/+10
| | | | llvm-svn: 216880
* [asan-assembly-instrumentation] Prologue and epilogue are moved out from ↵Yuri Gorshenin2014-09-012-23/+49
| | | | | | | | | | | | InstrumentMemOperand(). Reviewers: eugenis Subscribers: llvm-commits Differential revision: http://reviews.llvm.org/D4923 llvm-svn: 216879
* Thumb2 M-class MSR instruction support changesRenato Golin2014-09-014-40/+86
| | | | | | | | | | | | This patch implements a few changes related to the Thumb2 M-class MSR instruction: * better handling of unpredictable encodings, * recognition of the _g and _nzcvqg variants by the asm parser only if the DSP extension is available, preferred output of MSR APSR moves with the _<bits> suffix for v7-M. Patch by Petr Pavlu. llvm-svn: 216874
* Revert "[asan-assembly-instrumentation] Prologue and epilogue are moved out ↵Yuri Gorshenin2014-09-012-49/+23
| | | | | | | | from InstrumentMemOperand()." This reverts commit 895aa397038b8de86d83ac0997a70949a486e112. llvm-svn: 216872
* Fix a really bad miscompile introduced in r216865 - the else-if logicChandler Carruth2014-09-011-9/+36
| | | | | | | | | | | | | | | | | | chain became completely broken here as *all* intrinsic users ended up being skipped, and the ones that seemed to be singled out were actually the exact wrong set. This is a great example of why long else-if chains can be easily confusing. Switch the entire code to use early exits and early continues to have simpler (and more importantly, correct) logic here, as well as fixing the reversed logic for detecting and continuing on lifetime intrinsics. I've also significantly cleaned up the test case and added another test case demonstrating an example where the optimization is not (trivially) safe to perform. llvm-svn: 216871
* Small refactor on VectorizerHint for deduplicationRenato Golin2014-09-011-0/+30
| | | | | | | | | | | | | | | | | | | | Previously, the hint mechanism relied on clean up passes to remove redundant metadata, which still showed up if running opt at low levels of optimization. That also has shown that multiple nodes of the same type, but with different values could still coexist, even if temporary, and cause confusion if the next pass got the wrong value. This patch makes sure that, if metadata already exists in a loop, the hint mechanism will never append a new node, but always replace the existing one. It also enhances the algorithm to cope with more metadata types in the future by just adding a new type, not a lot of code. Re-applying again due to MSVC 2013 being minimum requirement, and this patch having C++11 that MSVC 2012 didn't support. Fixes PR20655. llvm-svn: 216870
* [asan-assembly-instrumentation] Prologue and epilogue are moved out from ↵Yuri Gorshenin2014-09-012-23/+49
| | | | | | InstrumentMemOperand(). llvm-svn: 216869
* Feed AA to the inliner and use AA->getModRefBehavior in AddAliasScopeMetadataHal Finkel2014-09-011-1/+1
| | | | | | | | | | | | This feeds AA through the IFI structure into the inliner so that AddAliasScopeMetadata can use AA->getModRefBehavior to figure out which functions only access their arguments (instead of just hard-coding some knowledge of memory intrinsics). Most of the information is only available from BasicAA; this is important for preserving alias scoping information for target-specific intrinsics when doing the noalias parameter attribute to metadata conversion. llvm-svn: 216866
* Ignore lifetime intrinsics in use list for MemCpyOptimizer. Patch by Luqman ↵Nick Lewycky2014-09-011-0/+28
| | | | | | Aden, review by Hal Finkel. llvm-svn: 216865
* Fix AddAliasScopeMetadata again - alias.scope must be a complete descriptionHal Finkel2014-09-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | I thought that I had fixed this problem in r216818, but I did not do a very good job. The underlying issue is that when we add alias.scope metadata we are asserting that this metadata completely describes the aliasing relationships within the current aliasing scope domain, and so in the context of translating noalias argument attributes, the pointers must all be based on noalias arguments (as underlying objects) and have no other kind of underlying object. In r216818 excluding appropriate accesses from getting alias.scope metadata is done by looking for underlying objects that are not identified function-local objects -- but that's wrong because allocas, etc. are also function-local objects and we need to explicitly check that all underlying objects are the noalias arguments for which we're adding metadata aliasing scopes. This fixes the underlying-object check for adding alias.scope metadata, and does some refactoring of the related capture-checking eligibility logic (and adds more comments; hopefully making everything a bit clearer). Fixes self-hosting on x86_64 with -mllvm -enable-noalias-to-md-conversion (the feature is still disabled by default). llvm-svn: 216863
* [MachineSink] Use the real post dominator treeJingyue Wu2014-09-013-7/+50
| | | | | | | | | | | | | | | | | | | | | | | Summary: Fixes a FIXME in MachineSinking. Instead of using the simple heuristics in isPostDominatedBy, use the real MachinePostDominatorTree. The old heuristics caused instructions to sink unnecessarily, and might create register pressure. Test Plan: Added a NVPTX codegen test to verify that our change is in effect. It also shows the unnecessary register pressure caused by over-sinking. Updated affected tests in AArch64 and X86. Reviewers: eliben, meheff, Jiangning Reviewed By: Jiangning Subscribers: jholewinski, aemerson, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D4814 llvm-svn: 216862
* DebugInfo: Elide lexical scopes which only contain other (inline or lexical) ↵David Blaikie2014-08-314-23/+7
| | | | | | | | | | | | | | | | | | | | | scopes. DW_TAG_lexical_scopes inform debuggers about the instruction range for which a given variable (or imported declaration/module/etc) is valid. If the scope doesn't itself contain any such entities, it's a waste of space and should be omitted. We were correctly doing this for entirely empty leaves, but not for intermediate nodes. Reduces total (not just debug sections) .o file size for a bootstrap -gmlt LLVM by 22% and bootstrap -gmlt clang executable by 13%. The wins for a full -g build will be less as a % (and in absolute terms), but should still be substantial - with some of that win being fewer relocations, thus more substantiall reducing link times than fewer bytes alone would have. llvm-svn: 216861
* [PATCH][Interpreter] Add missing FP intrinsic lowering.Josh Klontz2014-08-301-0/+16
| | | | | | | | | | | | | | | | | Summary: This extends the work done in [1], adding missing intrinsic lowering for floor, trunc, round and copysign. [1] http://comments.gmane.org/gmane.comp.compilers.llvm.cvs/199372 Test Plan: Extended `test/ExecutionEngine/Interpreter/intrinsics.ll` to test the additional missing intrinsics. All tests pass. Reviewers: dexonsmith Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5120 llvm-svn: 216827
* Teach llvm-bcanalyzer to use one stream's BLOCKINFO to read another stream.Jordan Rose2014-08-305-0/+34
| | | | | | | | | | | This allows streams that only use BLOCKINFO for debugging purposes to omit the block entirely. As long as another stream is available with the correct BLOCKINFO, the first stream can still be analyzed and dumped. As part of this commit, BitstreamReader gets a move constructor and move assignment operator, as well as a takeBlockInfo method. llvm-svn: 216826
* Fix AddAliasScopeMetadata to not add scopes when deriving from unknown pointersHal Finkel2014-08-301-5/+5
| | | | | | | | | | | | | | | | | | | | | | | The previous implementation of AddAliasScopeMetadata, which adds noalias metadata to preserve noalias parameter attribute information when inlining had a flaw: it would add alias.scope metadata to accesses which might have been derived from pointers other than noalias function parameters. This was incorrect because even some access known not to alias with all noalias function parameters could easily alias with an access derived from some other pointer. Instead, when deriving from some unknown pointer, we cannot add alias.scope metadata at all. This fixes a miscompile of the test-suite's tramp3d-v4. Furthermore, we cannot add alias.scope to functions unless we know they access only argument-derived pointers (currently, we know this only for memory intrinsics). Also, we fix a theoretical problem with using the NoCapture attribute to skip the capture check. This is incorrect (as explained in the comment added), but would not matter in any code generated by Clang because we get only inferred nocapture attributes in Clang-generated IR. This functionality is not yet enabled by default. llvm-svn: 216818
* InstCombine: Try harder to combine icmp instructionsDavid Majnemer2014-08-301-1/+13
| | | | | | | | | | | | | consider: (and (icmp X, Y), (and Z, (icmp A, B))) It may be possible to combine (icmp X, Y) with (icmp A, B). If we successfully combine, create an 'and' instruction with Z. This fixes PR20814. N.B. There is room for improvement after this change but I'm not convinced it's worth chasing yet. llvm-svn: 216814
* Revert r216805 "[MachineCombiner][AArch64] Use the correct register class ↵Juergen Ributzka2014-08-301-20/+0
| | | | | | | | for MADD, SUB, and OR." I think this broke the build bot. Reverting it for now until I have time to take a closer look. llvm-svn: 216813
* Object/llvm-objdump: allow dumping of mach-o exports trieNick Kledzik2014-08-302-0/+11
| | | | | | | | | | | | | | | | | | MachOObjectFile in lib/Object currently has no support for parsing the rebase, binding, and export information from the LC_DYLD_INFO load command in final linked mach-o images. This patch adds support for parsing the exports trie data structure. It also adds an option to llvm-objdump to dump that export info. I did the exports parsing first because it is the hardest. The information is encoded in a trie structure, but the standard ObjectFile way to inspect content is through iterators. So I needed to make an iterator that would do a non-recursive walk through the trie and maintain the concatenation of edges needed for the current string prefix. I plan to add similar support in MachOObjectFile and llvm-objdump to parse/display the rebasing and binding info too. llvm-svn: 216808
* [MachineCombiner][AArch64] Use the correct register class for MADD, SUB, and OR.Juergen Ributzka2014-08-291-0/+20
| | | | | | | | | | Select the correct register class for the various instructions that are generated when combining instructions and constrain the registers to the appropriate register class. This fixes rdar://problem/18183707. llvm-svn: 216805
* [FastISel][AArch64] Use the correct register class for branches.Juergen Ributzka2014-08-291-0/+15
| | | | | | | | Also constrain the register class for branches. This fixes rdar://problem/18181496. llvm-svn: 216804
* [MachineSinking] Clear kill flag of all operands at all their uses.Juergen Ributzka2014-08-291-0/+27
| | | | | | | | | | | | | | | | | | | | | | | When sinking an instruction it might be moved past the original last use of one of its operands. This last use has the kill flag set and the verifier will obviously complain about this. Before Machine Sinking (AArch64): %vreg3<def> = ASRVXr %vreg1, %vreg2<kill> %XZR<def> = SUBSXrs %vreg4, %vreg1<kill>, 160, %NZCV<imp-def> ... After Machine Sinking: %XZR<def> = SUBSXrs %vreg4, %vreg1<kill>, 160, %NZCV<imp-def> ... %vreg3<def> = ASRVXr %vreg1, %vreg2<kill> This fix clears all the kill flags in all instruction that use the same operands as the instruction that is being sunk. This fixes rdar://problem/18180996. llvm-svn: 216803
* Debug info: Add a new explicit DIDescriptor flag for the "public" accessAdrian Prantl2014-08-295-11/+161
| | | | | | | | | | specifier and change the default behavior to only emit the DW_AT_accessibility(public) attribute when the isPublic() is explicitly set. rdar://problem/18154959 llvm-svn: 216799
* Next bit of support for llvm-objdump’s -private-headers for Mach-O files.Kevin Enderby2014-08-291-0/+92
| | | | | | | This adds the printing of the LC_SEGMENT load command and sections, LC_SYMTAB and LC_DYSYMTAB load commands. llvm-svn: 216795
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