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* Adding simple cast cost to ARMRenato Golin2013-01-291-0/+114
| | | | | | | | | | | Changing ARMBaseTargetMachine to return ARMTargetLowering intead of the generic one (similar to x86 code). Tests showing which instructions were added to cast when necessary or cost zero when not. Downcast to 16 bits are not lowered in NEON, so costs are not there yet. llvm-svn: 173849
* [MC][COFF] Delay handling symbol aliases when writingMichael J. Spencer2013-01-291-0/+11
| | | | | | Fixes PR14447 and PR9034. Patch by Nico Rieck! llvm-svn: 173839
* LoopVectorize: convert TinyTripCountVectorThreshold constantPekka Jaaskelainen2013-01-291-0/+28
| | | | | | to a command line switch. llvm-svn: 173837
* Support artificial parameters in function types.David Blaikie2013-01-291-3/+9
| | | | | | | Provides the functionality for Clang change r172911 - I just had this still lying around. llvm-svn: 173820
* Fix 64-bit atomic operations in Thumb mode.Tim Northover2013-01-291-0/+147
| | | | | | | | The ARM and Thumb variants of LDREXD and STREXD have different constraints and take different operands. Previously the code expanding atomic operations didn't take this into account and asserted in Thumb mode. llvm-svn: 173780
* Merge SSE and AVX shuffle instructions in the comment printer.Craig Topper2013-01-291-0/+225
| | | | llvm-svn: 173777
* Convert getAttributes() to return an AttributeSetNode.Bill Wendling2013-01-292-12/+12
| | | | | | | The AttributeSetNode contains all of the attributes. This removes one (hopefully last) use of the Attribute class as a container of multiple attributes. llvm-svn: 173761
* Add support for source and line information to IntelJITEventListener for ↵Andrew Kaylor2013-01-282-302/+301
| | | | | | object emitted by MCJIT. llvm-svn: 173712
* This patch addresses bug 15031.Bill Schmidt2013-01-281-0/+370
| | | | | | | | | | | | | | | | | | | | | | The common code in the post-RA scheduler to break anti-dependencies on the critical path contained a flaw. In the reported case, an anti-dependency between the overlapping registers %X4 and %R4 exists: %X29<def> = OR8 %X4, %X4 %R4<def>, %X3<def,dead,tied3> = LBZU 1, %X3<kill,tied1> The unpatched code breaks the dependency by replacing %R4 and its uses with %R3, the first register on the available list. However, %R3 and %X3 overlap, so this creates two overlapping definitions on the same instruction. The fix is straightforward, preventing selection of a register that overlaps any other defined register on the same instruction. The test case is reduced from the bug report, and verifies that we no longer produce "lbzu 3, 1(3)" when breaking this anti-dependency. llvm-svn: 173706
* [msan] Mostly disable msan-handle-icmp-exact.Evgeniy Stepanov2013-01-281-20/+11
| | | | | | | | It is way too slow. Change the default option value to 0. Always do exact shadow propagation for unsigned ICmp with constants, it is cheap (under 1% cpu time) and required for correctness. llvm-svn: 173682
* Fix 256-bit PALIGNR comment decoding to understand that it works on ↵Craig Topper2013-01-281-0/+15
| | | | | | independent 256-bit lanes. llvm-svn: 173674
* [XCore] Add missing l2rus instructions.Richard Osborne2013-01-271-0/+6
| | | | | | | These instructions are not targeted by the compiler but they are needed for the MC layer. llvm-svn: 173634
* [XCore] Add missing l2r instructions.Richard Osborne2013-01-271-0/+12
| | | | | | | These instructions are not targeted by the compiler but they are needed for the MC layer. llvm-svn: 173629
* [XCore] Add missing 1r instructions.Richard Osborne2013-01-271-0/+27
| | | | | | | These instructions are not targeted by the compiler but they are needed for the MC layer. llvm-svn: 173624
* [XCore] Add missing 0r instructions.Richard Osborne2013-01-271-0/+51
| | | | | | | These instructions are not targeted by the compiler but they are needed for the MC layer. llvm-svn: 173623
* When the legalizer is splitting vector shifts, the result may not have the ↵Benjamin Kramer2013-01-271-0/+11
| | | | | | | | | | | | | | | right shift amount type. Fix that by adding a cast to the shift expander. This came up with vector shifts on sse-less X86 CPUs. <2 x i64> = shl <2 x i64> <2 x i64> -> i64,i64 = shl i64 i64; shl i64 i64 -> i32,i32,i32,i32 = shl_parts i32 i32 i64; shl_parts i32 i32 i64 Now we cast the last two i64s to the right type. Fixes the crash in PR14668. llvm-svn: 173615
* Re-revert r173342, without losing the compile time improvements, flatChandler Carruth2013-01-271-115/+0
| | | | | | out bug fixes, or functionality preserving refactorings. llvm-svn: 173610
* PR14566: Debug Info: Removing top level lexical blocksDavid Blaikie2013-01-263-31/+82
| | | | | | | | | | This adds support for LLVM to accept metadata that doesn't include a top level lexical block in a function. Specifically LLVM couldn't handle this when there were file changes relating to these blocks. I've updated a few test cases to ensure other functionality (such as inlining) isn't affected by this change, but haven't pervasively updated all the test cases. llvm-svn: 173592
* X86: Decode PALIGN operands so I don't have to do it in my head.Benjamin Kramer2013-01-261-0/+31
| | | | llvm-svn: 173572
* X86: Do splat promotion later, so the optimizer can chew on it first.Benjamin Kramer2013-01-262-17/+7
| | | | | | | | | | | | This catches many cases where we can emit a more efficient shuffle for a specific mask or when the mask contains undefs. Once the splat is lowered to unpacks we can't do that anymore. There is a possibility of moving the promotion after pshufb matching, but I'm not sure if pshufb with a mask loaded from memory is faster than 3 shuffles, so I avoided that for now. llvm-svn: 173569
* FileCheckize and merge some tests.Benjamin Kramer2013-01-264-127/+227
| | | | llvm-svn: 173568
* Add DIContext::getLineInfoForAddressRange() function and test. This ↵Andrew Kaylor2013-01-262-6/+40
| | | | | | function allows a caller to obtain a table of line information for a function using the function's address and size. llvm-svn: 173537
* llvm/test/CMakeLists.txt: Add a dependency to llvm-rtdyld in check-llvm.NAKAMURA Takumi2013-01-251-0/+1
| | | | llvm-svn: 173528
* Initial implementation of PPCTargetTransformInfoHal Finkel2013-01-252-0/+40
| | | | | | | | | | This provides a place to add customized operation cost information and control some other target-specific IR-level transformations. The only non-trivial logic in this checkin assigns a higher cost to unaligned loads and stores (covered by the included test case). llvm-svn: 173520
* Add support for applying in-memory relocations to the .debug_line section ↵Andrew Kaylor2013-01-252-0/+15
| | | | | | and, in the case of ELF files, using symbol addresses when available for relocations to the .debug_info section. Also extending the llvm-rtdyld tool to add the ability to dump line number information for testing purposes. llvm-svn: 173517
* XFAIL close-stderr on win32Reid Kleckner2013-01-251-0/+3
| | | | | | | | The test runner does not rewrite instances of /dev/null inside the quoted sh command. /dev/null does not exist, so opt will fail to open it, and return a non-zero exit code. llvm-svn: 173509
* Set the +x bit on two batch scriptsReid Kleckner2013-01-252-0/+0
| | | | | | | | Cygwin git-svn will faithfully forward the svn properties all the way down to the NTFS executable permission. Without the +x bit, tests using these scripts fail with "Access Denied". llvm-svn: 173508
* FileCheck-ify some grep testsReid Kleckner2013-01-253-7/+10
| | | | | | | | These tests in particular try to use escaped square brackets as an argument to grep, which is failing for me with native win32 python. It appears the backslash is being lost near the CreateProcess*() call. llvm-svn: 173506
* In this patch, we teach X86_64TargetMachine that it has a ILP32Eli Bendersky2013-01-252-4/+43
| | | | | | | | | | | | | | | | | | | | | (defined by the x32 ABI) mode, in which case its pointers are 32-bits in size. This knowledge is also added to X86RegisterInfo that now returns the appropriate registers in getPointerRegClass. There are many outcomes to this change. In order to keep the patches separate and manageable, we start by focusing on some simple testable cases. The patch adds a test with passing a pointer to a function - focusing on the difference between the two data models for x86-64. Another test is added for handling of 'sret' arguments (and functionality is added in X86ISelLowering to make it work). A note on naming: the "x32 ABI" document refers to the AMD64 architecture (in LLVM it's distinguished by being is64Bits() in the x86 subtarget) with two variations: the LP64 (default) data model, and the ILP32 data model. This patch adds predicates to the subtarget which are consistent with this naming scheme. llvm-svn: 173503
* Add back a RUN line removed by mistake by a previous commitEli Bendersky2013-01-251-0/+1
| | | | llvm-svn: 173502
* Add instruction encodings / disassembly support for l4r instructions.Richard Osborne2013-01-251-0/+11
| | | | llvm-svn: 173501
* Now that llvm-dwarfdump supports flags to specify which DWARF section to dump,Eli Bendersky2013-01-2541-45/+44
| | | | | | | use them in tests that run llvm-dwarfdump. This is in order to make tests as specific as possible. llvm-svn: 173498
* Improve the !add TableGen test case.Hal Finkel2013-01-251-0/+3
| | | | | | Suggested by Sean Silva. llvm-svn: 173481
* Add command-line flags for DWARF dumping.Eli Bendersky2013-01-251-0/+13
| | | | | | | Flags for dumping specific DWARF sections added in lib/DebugInfo and llvm-dwarfdump. llvm-svn: 173480
* Add instruction encodings / disassembly support for l5r instructions.Richard Osborne2013-01-251-0/+11
| | | | llvm-svn: 173479
* [msan] Implement exact shadow propagation for relational ICmp.Evgeniy Stepanov2013-01-251-3/+31
| | | | | | | | Only for integers, pointers, and vectors of those. No floats. Instrumentation seems very heavy, and may need to be replaced with some approximation in the future. llvm-svn: 173452
* Add an addition operator to TableGenHal Finkel2013-01-251-0/+15
| | | | | | | This adds an !add(a, b) operator to tablegen; this will be used to cleanup the PPC register definitions. llvm-svn: 173445
* Fixed the condition codes for the atomic64 min/umin code generation on ARM. ↵Silviu Baranga2013-01-251-2/+2
| | | | | | If the sutraction of the higher 32 bit parts gives a 0 result, we need to do the store operation. llvm-svn: 173437
* MIsched: Improve the interface to SchedDFS analysis (subtrees).Andrew Trick2013-01-251-3/+0
| | | | | | | Allow the strategy to select SchedDFS. Allow the results of SchedDFS to affect initialization of the scheduler state. llvm-svn: 173425
* Switch this code away from Value::isUsedInBasicBlock. That code eitherChandler Carruth2013-01-251-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | loops over instructions in the basic block or the use-def list of the value, neither of which are really efficient when repeatedly querying about values in the same basic block. What's more, we already know that the CondBB is small, and so we can do a much more efficient test by counting the uses in CondBB, and seeing if those account for all of the uses. Finally, we shouldn't blanket fail on any such instruction, instead we should conservatively assume that those instructions are part of the cost. Note that this actually fixes a bug in the pass because isUsedInBasicBlock has a really terrible bug in it. I'll fix that in my next commit, but the fix for it would make this code suddenly take the compile time hit I thought it already was taking, so I wanted to go ahead and migrate this code to a faster & better pattern. The bug in isUsedInBasicBlock was also causing other tests to test the wrong thing entirely: for example we weren't actually disabling speculation for floating point operations as intended (and tested), but the test passed because we failed to speculate them due to the isUsedInBasicBlock failure. llvm-svn: 173417
* MISched: Add SchedDFSResult to ScheduleDAGMI to formalize theAndrew Trick2013-01-251-0/+3
| | | | | | interface and allow other strategies to select it. llvm-svn: 173413
* This patch implements parsing the .wordJack Carter2013-01-251-1/+4
| | | | | | | | directive for the Mips assembler. Contributer: Vladimir Medic llvm-svn: 173407
* [mips] Set flag neverHasSideEffects flag on some of the floating point ↵Akira Hatanaka2013-01-251-0/+13
| | | | | | instructions. llvm-svn: 173401
* Reapply chandlerc's r173342 now that the miscompile it was triggering is fixed.Benjamin Kramer2013-01-241-0/+29
| | | | | | | | | | | | | | | | | | | | Original commit message: Plug TTI into the speculation logic, giving it a real cost interface that can be specialized by targets. The goal here is not to be more aggressive, but to just be more accurate with very obvious cases. There are instructions which are known to be truly free and which were not being modeled as such in this code -- see the regression test which is distilled from an inner loop of zlib. Everywhere the TTI cost model is insufficiently conservative I've added explicit checks with FIXME comments to go add proper modelling of these cost factors. If this causes regressions, the likely solution is to make TTI even more conservative in its cost estimates, but test cases will help here. llvm-svn: 173357
* ConstantFolding: Add a missing folding that leads to a miscompile.Benjamin Kramer2013-01-242-1/+37
| | | | | | | | | | We use constant folding to see if an intrinsic evaluates to the same value as a constant that we know. If we don't take the undefinedness into account we get a value that doesn't match the actual implementation, and miscompiled code. This was uncovered by Chandler's simplifycfg changes. llvm-svn: 173356
* Revert r173342 temporarily. It appears to cause a very late miscompileChandler Carruth2013-01-241-29/+0
| | | | | | of stage2 in a bootstrap. Still investigating.... llvm-svn: 173343
* Plug TTI into the speculation logic, giving it a real cost interfaceChandler Carruth2013-01-241-0/+29
| | | | | | | | | | | | | | | | | | that can be specialized by targets. The goal here is not to be more aggressive, but to just be more accurate with very obvious cases. There are instructions which are known to be truly free and which were not being modeled as such in this code -- see the regression test which is distilled from an inner loop of zlib. Everywhere the TTI cost model is insufficiently conservative I've added explicit checks with FIXME comments to go add proper modelling of these cost factors. If this causes regressions, the likely solution is to make TTI even more conservative in its cost estimates, but test cases will help here. llvm-svn: 173342
* Address a large chunk of this FIXME by accumulating the cost forChandler Carruth2013-01-241-0/+42
| | | | | | | unfolded constant expressions rather than checking each one independently. llvm-svn: 173341
* Switch the constant expression speculation cost evaluation away fromChandler Carruth2013-01-241-0/+22
| | | | | | | | | | | | | | | | | | | | a cost fuction that seems both a bit ad-hoc and also poorly suited to evaluating constant expressions. Notably, it is missing any support for trivial expressions such as 'inttoptr'. I could fix this routine, but it isn't clear to me all of the constraints its other users are operating under. The core protection that seems relevant here is avoiding the formation of a select instruction wich a further chain of select operations in a constant expression operand. Just explicitly encode that constraint. Also, update the comments and organization here to make it clear where this needs to go -- this should be driven off of real cost measurements which take into account the number of constants expressions and the depth of the constant expression tree. llvm-svn: 173340
* [asan] adaptive redzones for globals (the larger the global the larger is ↵Kostya Serebryany2013-01-241-0/+57
| | | | | | the redzone) llvm-svn: 173335
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