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* Use MainCU if it is available.Devang Patel2009-06-161-0/+275
| | | | llvm-svn: 73457
* Update this test to use fmul instead of mul.Dan Gohman2009-06-151-1/+1
| | | | llvm-svn: 73436
* Support vector casts in more places, fixing a variety of assertionDan Gohman2009-06-152-0/+92
| | | | | | | | | | | | | | | failures. To support this, add some utility functions to Type to help support vector/scalar-independent code. Change ConstantInt::get and ConstantFP::get to support vector types, and add an overload to ConstantInt::get that uses a static IntegerType type, for convenience. Introduce a new getConstant method for ScalarEvolution, to simplify common use cases. llvm-svn: 73431
* Gracefully handle imbalanced inline function begin and end markers.Devang Patel2009-06-151-0/+77
| | | | llvm-svn: 73426
* ifcvt should ignore cfg where true and false successors are the same.Evan Cheng2009-06-151-0/+12
| | | | llvm-svn: 73423
* Fix the crash in this test. This is basically the sameDale Johannesen2009-06-151-0/+557
| | | | | | | | problem addressed in 31284, but the patch there only addressed the case where an invoke is the first thing in a block. llvm-svn: 73416
* This test is failing. Revert for now.Bill Wendling2009-06-151-89/+0
| | | | llvm-svn: 73404
* Add another testcase for r71478.Bill Wendling2009-06-151-0/+89
| | | | llvm-svn: 73399
* CheckTailCallReturnConstraints is missing a check on theArnold Schwaighofer2009-06-151-0/+14
| | | | | | | | | incomming chain of the RETURN node. The incomming chain must be the outgoing chain of the CALL node. This causes the backend to identify tail calls that are not tail calls. This patch fixes this. llvm-svn: 73387
* Part 1.Evan Cheng2009-06-151-0/+14
| | | | | | | | | | | | | | | | | | | | | - Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent. - Allow targets to specify alternative register allocation orders based on allocation hint. Part 2. - Use the register allocation hint system to implement more aggressive load / store multiple formation. - Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g. v1025 = LDR v1024, 0 v1026 = LDR v1024, 0 => v1025,v1026 = LDRD v1024, 0 If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair. - Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions. This is work in progress, not yet enabled. llvm-svn: 73381
* fix testcase to properly check for the patch in r73195.Chris Lattner2009-06-151-1/+1
| | | | llvm-svn: 73380
* Implement more aggressive folding of add operand lists whenDan Gohman2009-06-141-0/+38
| | | | | | | | | | they contain multiplications of constants with add operations. This helps simplify several kinds of things; in particular it helps simplify expressions like ((-1 * (%a + %b)) + %a) to %b, as expressions like this often come up in loop trip count computations. llvm-svn: 73361
* Testcase for PR4332.Duncan Sands2009-06-141-0/+8
| | | | llvm-svn: 73353
* Teach SCEVExpander's visitAddRecExpr to reuse an existing canonicalDan Gohman2009-06-132-1/+25
| | | | | | | | | | | | | | | | | induction variable when the addrec to be expanded does not require a wider type. This eliminates the need for IndVarSimplify to micro-manage SCEV expansions, because SCEVExpander now automatically expands them in the form that IndVarSimplify considers to be canonical. (LSR still micro-manages its SCEV expansions, because it's optimizing for the target, rather than for other optimizations.) Also, this uses the new getAnyExtendExpr, which has more clever expression simplification logic than the IndVarSimplify code it replaces, and this cleans up some ugly expansions in code such as the included masked-iv.ll testcase. llvm-svn: 73294
* Add a ARM specific pre-allocation pass that re-schedule loads / stores fromEvan Cheng2009-06-131-0/+13
| | | | | | | | | | | consecutive addresses togther. This makes it easier for the post-allocation pass to form ldm / stm. This is step 1. We are still missing a lot of ldm / stm opportunities because of register allocation are not done in the desired order. More enhancements coming. llvm-svn: 73291
* llvm.dbg.region.end() intrinsic is not required to be in _last_ basic block ↵Devang Patel2009-06-131-0/+75
| | | | | | | | in a function. If that happens then any basic block that follows (lexically) the block with regin.end will not have scope info available. LexicalScopeStack relies on processing basic block in CFG order, but this processing order is not guaranteed. Things get complicated when the optimizer gets a chance to optimizer IR with dbg intrinsics. Apply defensive patch to preserve at least one lexical scope till the end of function. llvm-svn: 73282
* Adjust this test's regex strings so that they work regardlessDan Gohman2009-06-121-3/+3
| | | | | | | of the target's pointer size. This avoids the need for -m32 on the llvm-gcc command-line, which some targets may not support. llvm-svn: 73270
* Add -m32 to llvm-gcc commands, so that this test behaves as expectedDan Gohman2009-06-121-3/+3
| | | | | | on systems which default to a 64-bit target. llvm-svn: 73265
* If killed register is defined by implicit_def, do not clear it since it's ↵Evan Cheng2009-06-121-0/+77
| | | | | | live range may overlap another def of same register. llvm-svn: 73255
* Mark some pattern-less instructions as neverHasSideEffects.Evan Cheng2009-06-121-1/+1
| | | | llvm-svn: 73252
* Clear AbstractInstanceRootMap at the end of the function.Devang Patel2009-06-121-0/+94
| | | | llvm-svn: 73244
* Don't do (x - (y - z)) --> (x + (z - y)) on floating-point types, becauseDan Gohman2009-06-121-0/+8
| | | | | | it may round differently. This fixes PR4374. llvm-svn: 73243
* Testcase for llvm-gcc patch 73238.Dale Johannesen2009-06-121-0/+24
| | | | llvm-svn: 73239
* Fix Bug 4278: X86-64 with -tailcallopt calling conventionArnold Schwaighofer2009-06-122-6/+21
| | | | | | | | | | | | | | | out of sync with regular cc. The only difference between the tail call cc and the normal cc was that one parameter register - R9 - was reserved for calling functions through a function pointer. After time the tail call cc has gotten out of sync with the regular cc. We can use R11 which is also caller saved but not used as parameter register for potential function pointers and remove the special tail call cc on x86-64. llvm-svn: 73233
* Given two identical weak functions, produce one internal function and two weakNick Lewycky2009-06-121-0/+13
| | | | | | thunks. llvm-svn: 73230
* This test is wrong. If you have two weak functions F and G you can't makeNick Lewycky2009-06-121-11/+0
| | | | | | | either one call the other since either one can be replaced at link time, and they need to be independent. llvm-svn: 73225
* Fix regular expression.Nick Lewycky2009-06-121-1/+1
| | | | llvm-svn: 73221
* Don't remove aggregate-typed module level constants before encoding functionsNick Lewycky2009-06-121-0/+12
| | | | | | since functions may contain aggregate constants too. llvm-svn: 73220
* In an XFAIL line, treat "XFAIL: foo*bar" as a regular expression to be matchedNick Lewycky2009-06-121-1/+1
| | | | | | against the target triple, instead of equivalent to "XFAIL: *". llvm-svn: 73219
* XFAIL this on PPC Linux. This keeps showing up in the buildbot and isn't ↵Nick Lewycky2009-06-111-0/+3
| | | | | | | | easy to fix, and I'd like it to stop masking real failures. llvm-svn: 73211
* Test for rev 73205 (PR 4349)Dale Johannesen2009-06-111-0/+39
| | | | llvm-svn: 73206
* Fix 4366: store to null in non-default addr space should not beChris Lattner2009-06-111-0/+7
| | | | | | turned into unreachable. llvm-svn: 73195
* Remove empty test (my DejaGNU doesn't like this)Daniel Dunbar2009-06-091-0/+0
| | | | llvm-svn: 73148
* Remove empty file.Bill Wendling2009-06-091-0/+0
| | | | llvm-svn: 73140
* Revert 73074 and 73099 because Windows doesn't have POSIXDavid Greene2009-06-092-26/+0
| | | | | | | regular expressions. We will add an OpenBSD implementation and re-apply ASAP. llvm-svn: 73138
* Add a !patsubst operator. Use on string types.David Greene2009-06-081-0/+15
| | | | llvm-svn: 73099
* Add testcase for register scanveger assertion fix in r72755Anton Korobeynikov2009-06-081-0/+8
| | | | | | (double def due to livevars) llvm-svn: 73096
* Add a more robust !if test.David Greene2009-06-081-2/+2
| | | | llvm-svn: 73091
* Fix DejaGNU run line to escape special characters.David Greene2009-06-081-2/+2
| | | | llvm-svn: 73090
* Make IntInits and ListInits typed. This helps deduce types of !if andDavid Greene2009-06-081-0/+87
| | | | | | | | other operators. For the rare cases where a list type cannot be deduced, provide a []<type> syntax, where <type> is the list element type. llvm-svn: 73078
* Add a !regmatch operator to do pattern matching in TableGen.David Greene2009-06-081-0/+11
| | | | llvm-svn: 73074
* Fix the run-line for this test to work correctly outside of x86.Eli Friedman2009-06-071-1/+1
| | | | llvm-svn: 73025
* Tweak the expansion code for BIT_CONVERT to generate better code Eli Friedman2009-06-071-0/+10
| | | | | | converting from an MMX vector to an i64. llvm-svn: 73024
* Slightly generalize the code that handles shuffles of consecutive loads Eli Friedman2009-06-073-3/+14
| | | | | | | | | | | on x86 to handle more cases. Fix a bug in said code that would cause it to read past the end of an object. Rewrite the code in SelectionDAGLegalize::ExpandBUILD_VECTOR to be a bit more general. Remove PerformBuildVectorCombine, which is no longer necessary with these changes. In addition to simplifying the code, with this change, we can now catch a few more cases of consecutive loads. llvm-svn: 73012
* PR3628: Add patterns to match SHL/SRL/SRA to the corresponding Altivec Eli Friedman2009-06-071-0/+10
| | | | | | instructions. llvm-svn: 73009
* PR4340: Run SimplifyDemandedVectorElts on insertelement instructions; Eli Friedman2009-06-061-0/+14
| | | | | | sometimes it can find simplifications that won't be found otherwise. llvm-svn: 73006
* Fix the expansion for CONCAT_VECTORS so that it doesn't create illegal Eli Friedman2009-06-061-0/+8
| | | | | | types. llvm-svn: 72993
* Avoid crashing on a variable-index insertelement with element type i16.Eli Friedman2009-06-061-0/+11
| | | | llvm-svn: 72991
* Get rid of some bogus patterns for X86vzmovl. Don't create VZEXT_MOVL Eli Friedman2009-06-061-0/+37
| | | | | | | | nodes for vectors with an i16 element type. Add an optimization for building a vector which is all zeros/undef except for the bottom element, where the bottom element is an i8 or i16. llvm-svn: 72988
* Fix an obvious typo.Eli Friedman2009-06-061-1/+1
| | | | llvm-svn: 72987
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