summaryrefslogtreecommitdiffstats
path: root/llvm/test
Commit message (Collapse)AuthorAgeFilesLines
* [X86][TD][vpmovm2 ] New TD pattern for the vpmovm2 instructionMichael Zuckerman2017-03-234-54/+1720
| | | | | | | | | | | Up until now, vpmovm2 instruction described its destination operand size by the source operand size. This patch adds new pattern for the vpmovm2 instruction. The node describes new expansion of the destination (from {128|256} to 512). Differential Revision: https://reviews.llvm.org/D30654 llvm-svn: 298586
* Reapply r298417 "[ARM] Recommit the glueless lowering of addc/adde in Thumb1"Artyom Skrobov2017-03-221-8/+132
| | | | | | | | The UB in t2_so_imm_neg conversion has been addressed under D31242 / r298512 This reverts commit r298482. llvm-svn: 298562
* [AMDGPU] Do not emit isa info as code object metadataKonstantin Zhuravlyov2017-03-228-206/+3
| | | | | | | | - It was decided to expose this information through other means (rocr) Differential Revision: https://reviews.llvm.org/D30970 llvm-svn: 298560
* [AMDGPU] Emit kernel debug properties as code object metadataKonstantin Zhuravlyov2017-03-223-4/+97
| | | | | | Differential Revision: https://reviews.llvm.org/D30969 llvm-svn: 298558
* [AMDGPU] Emit kernel code properties as code object metadataKonstantin Zhuravlyov2017-03-223-3/+59
| | | | | | | | - These are not required for low level runtime Differential Revision: https://reviews.llvm.org/D29949 llvm-svn: 298556
* [x86] improve tests, add tests, auto-generate checks; NFCSanjay Patel2017-03-221-107/+168
| | | | llvm-svn: 298553
* [AMDGPU] Restructure code object metadata creationKonstantin Zhuravlyov2017-03-2216-628/+1641
| | | | | | | | | | | | | | | | | - Rename runtime metadata -> code object metadata - Make metadata not flow - Switch enums to use ScalarEnumerationTraits - Cleanup and move AMDGPUCodeObjectMetadata.h to AMDGPU/MCTargetDesc - Introduce in-memory representation for attributes - Code object metadata streamer - Create metadata for isa and printf during EmitStartOfAsmFile - Create metadata for kernel during EmitFunctionBodyStart - Finalize and emit metadata to .note during EmitEndOfAsmFile - Other minor improvements/bug fixes Differential Revision: https://reviews.llvm.org/D29948 llvm-svn: 298552
* c++filt: support COFF import thunksSaleem Abdulrasool2017-03-221-0/+5
| | | | | | | The synthetic thunk for the import is prefixed with __imp_. Attempt to undecorate the names when they begin with the __imp_ prefix. llvm-svn: 298550
* [LVI] Add an LVI printer pass to capture test LVI cache after transformationsAnna Thomas2017-03-221-0/+84
| | | | | | | | | | | | | | | | | | | Summary: Adding a printer pass for printing the LVI cache values after transformations that use LVI. This will help us in identifying cases where LVI invariants are violated, or transforms that leave LVI in an incorrect state. Right now, I have added two test cases to show that the printer pass is working. I will be adding more test cases in a later change, once this change is checked in upstream. Reviewers: reames, dberlin, sanjoy, apilipenko Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30790 llvm-svn: 298542
* Preserve nonnull metadata on Loads through SROA & mem2reg.Luqman Aden2017-03-222-0/+115
| | | | | | | | | | | | | | | | | Summary: https://llvm.org/bugs/show_bug.cgi?id=31142 : SROA was dropping the nonnull metadata on loads from allocas that got optimized out. This patch simply preserves nonnull metadata on loads through SROA and mem2reg. Reviewers: chandlerc, efriedma Reviewed By: efriedma Subscribers: hfinkel, spatel, efriedma, arielb1, davide, llvm-commits Differential Revision: https://reviews.llvm.org/D27114 llvm-svn: 298540
* Fix testcase on windows.Adrian Prantl2017-03-221-1/+1
| | | | llvm-svn: 298521
* [InstCombine] canonicalize insertelement of scalar constant ahead of ↵Sanjay Patel2017-03-224-22/+16
| | | | | | | | | | | | | | insertelement of variable insertelement (insertelement X, Y, IdxC1), ScalarC, IdxC2 --> insertelement (insertelement X, ScalarC, IdxC2), Y, IdxC1 As noted in the code comment and seen in the test changes, the motivation is that by pulling constant insertion up, we may be able to constant fold some insertelement instructions. Differential Revision: https://reviews.llvm.org/D31196 llvm-svn: 298520
* Fix PR32298 by adding an early exit to getFrameIndexExprs().Adrian Prantl2017-03-221-0/+40
| | | | | | | | Also add an assertion for the case that there are multiple FI expressions with a DW_OP_LLVM_fragment; which should violate internal constraints in DbgVariable. llvm-svn: 298518
* [ARM] t2_so_imm_neg had a subtle bug in the conversion, and could trigger UB ↵Artyom Skrobov2017-03-221-0/+9
| | | | | | | | | | | | | | by negating (int)-2147483648. By pure luck, none of the pre-existing tests triggered this; so I'm adding one. Summary: Thanks to Vitaly Buka for helping catch this. Reviewers: rengolin, jmolloy, efriedma, vitalybuka Subscribers: llvm-commits, aemerson Differential Revision: https://reviews.llvm.org/D31242 llvm-svn: 298512
* Add default typo to .tbss.*Rafael Espindola2017-03-221-0/+8
| | | | | | This matches gas behavior and is part of pr31888. llvm-svn: 298508
* Set the default type for .bss.foo.Rafael Espindola2017-03-221-0/+8
| | | | | | This matches gas and is part of pr31888. llvm-svn: 298506
* Produce INIT_ARRAY for sections named .init_array.*Rafael Espindola2017-03-221-0/+4
| | | | | | | These sections are merged together by the linker, so they should have the same time. llvm-svn: 298505
* [AMDGPU][MC] Fix for Bug 28204 + LIT testsDmitry Preobrazhensky2017-03-221-0/+10
| | | | | | | | | | Fixed v_mad_i64_i32/u64_u32 encoding Reviewers: artem.tamazov Differential Revision: https://reviews.llvm.org/D30828 llvm-svn: 298502
* [X86] Add multiply by constant tests (PR28513)Simon Pilgrim2017-03-223-0/+1685
| | | | | | As discussed on PR28513, add tests for constant multiplication by constants between 1 to 32 llvm-svn: 298497
* Revert "[ScalarEvolution] Predicate implication from operations"Max Kazantsev2017-03-221-334/+0
| | | | | | | | This reverts commit rL298481 Fails clang-with-lto-ubuntu build. llvm-svn: 298489
* [ValueTracking] Make sure we keep range metadata information when ↵Craig Topper2017-03-221-0/+17
| | | | | | calculating known bits for calls to bitreverse intrinsic. llvm-svn: 298488
* [SystemZ] Don't drop any operands in expandZExtPseudo()Jonas Paulsson2017-03-221-0/+132
| | | | | | | | Make sure that any operands, e.g. of an implicit def of a super reg is transferred to the new instruction. Review: Ulrich Weigand llvm-svn: 298484
* Revert "[ARM] Recommit the glueless lowering of addc/adde in Thumb1, ↵Vitaly Buka2017-03-221-132/+8
| | | | | | | | | | including the amended (no UB anymore) fix for adding/subtracting -2147483648." Fails check-llvm with ubsan This reverts commit r298417. llvm-svn: 298482
* [ScalarEvolution] Predicate implication from operationsMax Kazantsev2017-03-221-0/+334
| | | | | | | | | | | | | | | | | | | | | | | This patch allows SCEV predicate analysis to prove implication of some expression predicates from context predicates related to arguments of those expressions. It introduces three new rules: For addition: (A >X && B >= 0) || (B >= 0 && A > X) ===> (A + B) > X. For division: (A > X) && (0 < B <= X + 1) ===> (A / B > 0). (A > X) && (-B <= X < 0) ===> (A / B >= 0). Using these rules, SCEV is able to prove facts like "if X > 1 then X / 2 > 0". They can also be combined with the same context, to prove more complex expressions like "if X > 1 then X/2 + 1 > 1". Diffirential Revision: https://reviews.llvm.org/D30887 Reviewed by: sanjoy llvm-svn: 298481
* [InstCombine] Teach SimplifyDemandedUseBits to shrink Constants on the left ↵Craig Topper2017-03-221-0/+43
| | | | | | | | | | | | | | | | side of subtracts Summary: Subtracts can have constants on the left side, but we don't shrink them based on demanded bits. This patch fixes that to match the right hand side. Reviewers: davide, majnemer, spatel, sanjoy, hfinkel Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31119 llvm-svn: 298478
* [codeview] Use separate records for LF_SUBSTR_LIST and LF_ARGLISTReid Kleckner2017-03-221-3/+3
| | | | | | | They are structurally the same, but now we need to distinguish them because one record lives in the IPI stream and the other lives in TPI. llvm-svn: 298474
* [GlobalISel]: Create VREGs for ConstantInt argsAditya Nandakumar2017-03-221-1/+2
| | | | | | | | | | | | This patch changes the behavior of IRTranslating intrinsics where we now create VREG + G_CONSTANT for ConstantInt values. We already do this for FloatingPoint values. This makes it easier for the backends to select code and it won't have to de-duplicate creation+selection of constants. Reviewed by: ab llvm-svn: 298473
* Don't compose DWARF expressions with multiple subregisters.Adrian Prantl2017-03-221-0/+122
| | | | | | | | | If a register location can only be described by a complex expression (i.e., multiple subregisters) it doesn't safely compose with another complex expression. For example, it is not possible to apply a DW_OP_deref operation to multiple DW_OP_pieces. llvm-svn: 298472
* [GlobalISel] Update DBG_VALUEs referencing DCE'd instructions.Ahmed Bougacha2017-03-211-7/+29
| | | | | | | | | | | | | Quentin points out that r298358 would cause us to emit different code with debug info. That's a big no-no; also erase the instructions that only live thanks to DBG_VALUE users. Adrian explained how this is an existing problem and an OK thing to do: clang has allocas for all variables so shouldn't be affected at -O0, but swift uses a bit of inlineasm to explicitly keep values live for the purpose of debug info quality. I'm not sure there is a better scheme. llvm-svn: 298460
* [GlobalISel] Don't translate br to layout successor.Ahmed Bougacha2017-03-211-8/+29
| | | | | | | | | | MI can represent fallthrough to layout successor blocks, and our post-isel representation uses that extensively. We might as well use it too, to avoid translating and carrying along unnecessary branches. llvm-svn: 298459
* AMDGPU: Rename SI_RETURNMatt Arsenault2017-03-212-2/+2
| | | | | | | | This is used for a specific type of return to a shader part's epilog code. Rename to try avoiding confusion from a true call's return. llvm-svn: 298452
* SplitKit: Fix subreg copy related problemsMatthias Braun2017-03-211-0/+41
| | | | | | | | | | | | Fix two problems related to r298025: - SplitKit would create duplicate VNIs in some cases leading to crashs when hoisting copies. - VirtRegMap could fail expanding copies at the beginning of a basic block. This fixes http://llvm.org/PR32353 llvm-svn: 298448
* AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernelMatt Arsenault2017-03-21714-6249/+6249
| | | | | | | | | | | | Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
* GlobalISel: widen booleans by zero-extending to a byte.Tim Northover2017-03-211-1/+1
| | | | | | | A bool is represented by a single byte, which the ARM ABI requires to be either 0 or 1. So we cannot use G_ANYEXT when legalizing the type. llvm-svn: 298439
* [InstCombine] regenerate checks; NFCSanjay Patel2017-03-211-55/+54
| | | | llvm-svn: 298432
* Let llvm.objectsize be conservative with null pointersGeorge Burgess IV2017-03-218-45/+154
| | | | | | | | | | | This adds a parameter to @llvm.objectsize that makes it return conservative values if it's given null. This fixes PR23277. Differential Revision: https://reviews.llvm.org/D28494 llvm-svn: 298430
* [ARM] Recommit the glueless lowering of addc/adde in Thumb1,Artyom Skrobov2017-03-211-8/+132
| | | | | | | | | including the amended (no UB anymore) fix for adding/subtracting -2147483648. This reverts r298328 "[ARM] Revert r297443 and r297820." and partially reverts r297842 "Revert "[Thumb1] Fix the bug when adding/subtracting -2147483648"" llvm-svn: 298417
* Use ProfileSummary:getProfileCount to get ScaledCount for ModuleSummaryDehao Chen2017-03-211-1/+5
| | | | | | | | | | | | | | Summary: ModuleSummary should use the standard interface of ProfileSummary::getProfileCount. Reviewers: eraman, tejohnson Reviewed By: tejohnson Subscribers: tejohnson, mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D31154 llvm-svn: 298404
* Revert 298388 and 298389 because they broke some AMDGPU tests.Adrian Prantl2017-03-211-122/+0
| | | | llvm-svn: 298401
* Recommit r298282 with fixes for memory allocation/deallocationKrzysztof Parzyszek2017-03-211-0/+84
| | | | | | | | | | | [Hexagon] Recognize polynomial-modulo loop idiom again Regain the ability to recognize loops calculating polynomial modulo operation. This ability has been lost due to some changes in the preceding optimizations. Add code to preprocess the IR to a form that the pattern matching code can recognize. llvm-svn: 298400
* AMDGPU: Buffer descriptor changes for GFX9Marek Olsak2017-03-214-1/+10
| | | | | | | | | | Reviewers: arsenm Subscribers: qcolombet, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, dstuttard, tpr Differential Revision: https://reviews.llvm.org/D31158 llvm-svn: 298397
* AMDGPU: Always use VGPR indexing on GFX9Marek Olsak2017-03-211-0/+1
| | | | | | | | | | Reviewers: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, dstuttard, tpr Differential Revision: https://reviews.llvm.org/D31157 llvm-svn: 298396
* [Hexagon] Add -march=hexagon to a testcaseKrzysztof Parzyszek2017-03-211-1/+1
| | | | llvm-svn: 298395
* Don't compose DWARF expressions with multiple subregisters.Adrian Prantl2017-03-211-0/+122
| | | | | | | | | If a register location can only be described by a complex expression (i.e., multiple subregisters) it doesn't safely compose with another complex expression. For example, it is not possible to apply a DW_OP_deref operation to multiple DW_OP_pieces. llvm-svn: 298389
* AMDGPU: Fix asserting on 0 dmask for image intrinsicsMatt Arsenault2017-03-213-0/+351
| | | | | | Fold these to undef during lowering so users get eliminated. llvm-svn: 298387
* AMDGPU: Convert image intrinsic uses in testsMatt Arsenault2017-03-2114-208/+205
| | | | llvm-svn: 298386
* DAG: Fold bitcast/extract_vector_elt of undef to undefMatt Arsenault2017-03-213-8/+34
| | | | | | Fixes not eliminating store when intrinsic is lowered to undef. llvm-svn: 298385
* Fix shufpd test name.Simon Pilgrim2017-03-211-4/+4
| | | | llvm-svn: 298381
* [ARM] [Assembler] Support negative immediates for A32, T32 and T16Sanne Wouda2017-03-214-0/+175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: To support negative immediates for certain arithmetic instructions, the instruction is converted to the inverse instruction with a negated (or inverted) immediate. For example, "ADD r0, r1, #FFFFFFFF" cannot be encoded as an ADD instruction. However, "SUB r0, r1, #1" is equivalent. These conversions are different from instruction aliases. An alias maps several assembler instructions onto one encoding. A conversion, however, maps an *invalid* instruction--e.g. with an immediate that cannot be represented in the encoding--to a different (but equivalent) instruction. Several instructions with negative immediates were being converted already, but this was not systematically tested, nor did it cover all instructions. This patch implements all possible substitutions for ARM, Thumb1 and Thumb2 assembler and adds tests. It also adds a feature flag (-mattr=+no-neg-immediates) to turn these substitutions off. This is helpful for users who want their code to assemble to exactly what they wrote. Reviewers: t.p.northover, rovka, samparker, javed.absar, peter.smith, rengolin Reviewed By: javed.absar Subscribers: aadg, aemerson, llvm-commits Differential Revision: https://reviews.llvm.org/D30571 llvm-svn: 298380
* [InstCombine] auto-generate better checks; NFCSanjay Patel2017-03-212-80/+122
| | | | llvm-svn: 298377
OpenPOWER on IntegriCloud