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* Use llvm.global_ctors to locate global constructors insteadDan Gohman2012-01-181-0/+2
| | | | | | of recognizing them by name. llvm-svn: 148416
* Fix a bug in the type-legalization of vector integers. When we bitcast one ↵Nadav Rotem2012-01-181-0/+14
| | | | | | vector type to another, we must not bitcast the result if one type is widened while the other is promoted. llvm-svn: 148383
* Test case renameAndrew Trick2012-01-171-0/+0
| | | | llvm-svn: 148344
* MC tweak symbol difference resolution for non-local symbols.Jim Grosbach2012-01-173-5/+7
| | | | | | | | | | | | | | When the non-local symbol in the expression is in the same fragment as the second symbol, the assembler can still evaluate the expression without needing a relocation. For example, on ARM: _foo: ldr lr, (_foo - 4) rdar://10348687 llvm-svn: 148341
* Tidy up.Jim Grosbach2012-01-171-2/+2
| | | | llvm-svn: 148339
* Intel syntax: Fix parser match class to check memory operand size.Devang Patel2012-01-171-0/+2
| | | | llvm-svn: 148338
* Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.Nadav Rotem2012-01-173-5/+31
| | | | llvm-svn: 148337
* Intel syntax: Parse "BYTE PTR [RDX + RCX]"Devang Patel2012-01-171-0/+2
| | | | llvm-svn: 148334
* Add a new ObjC ARC optimization pass to eliminate unneededDan Gohman2012-01-171-0/+51
| | | | | | autorelease push+pop pairs. llvm-svn: 148330
* Intel syntax: Do not unncessarily create plus expression for memory operand ↵Devang Patel2012-01-171-0/+2
| | | | | | displacement. llvm-svn: 148321
* Intel syntax: Ignore mnemonic aliases.Devang Patel2012-01-171-0/+8
| | | | llvm-svn: 148316
* Remove "XFAIL: arm" from test/ExecutionEngine/test-return.llEli Bendersky2012-01-171-1/+0
| | | | | | The test passes on ARM bots llvm-svn: 148315
* Intel syntax: Robustify memory operand parsing.Devang Patel2012-01-171-0/+8
| | | | llvm-svn: 148312
* Additional ExecutionEngine tests, as part of bringing up the MCJIT on ELFEli Bendersky2012-01-177-0/+244
| | | | | | | | | implementation. Currently lit still executes ExecutionEngine tests with JIT (not MCJIT) by default. MCJIT tests can be executed manually by calling llvm-lit with --param jit_impl=mcjit llvm-svn: 148299
* Fix 11769.Nadav Rotem2012-01-171-1/+12
| | | | | | | | In CanXFormVExtractWithShuffleIntoLoad we assumed that EXTRACT_VECTOR_ELT can be later handled by the DAGCombiner. However, in some cases on AVX, the EXTRACT_VECTOR_ELT is legalized to EXTRACT_SUBVECTOR + EXTRACT_VECTOR_ELT, which currently is not handled by the DAGCombiner. In this patch I added a check that we only extract from the XMM part. llvm-svn: 148298
* LSR fix: broaden the check for loop preheaders.Andrew Trick2012-01-171-0/+113
| | | | | | | It's becoming clear that LoopSimplify needs to unconditionally create loop preheaders. But that is a bigger fix. For now, continuing to hack LSR. Fixes rdar://10701050 "Cannot split an edge from an IndirectBrInst" assert. llvm-svn: 148288
* AggressiveAntiDepBreaker needs to skip debug values because a debug value ↵Hal Finkel2012-01-161-0/+40
| | | | | | does not have a corresponding SUnit llvm-svn: 148260
* Make sure the non-SSE lowering for fences correctly clobbers EFLAGS. PR11768.Eli Friedman2012-01-161-0/+34
| | | | llvm-svn: 148240
* Adding a basic ELF dynamic loader and MC-JIT for ELF. Functionality is ↵Eli Bendersky2012-01-1641-47/+76
| | | | | | | | currently basic and will be enhanced with future patches. Patch developed by Andy Kaylor and Daniel Malea. Reviewed on llvm-commits. llvm-svn: 148231
* [AVX] Optimize x86 VSELECT instructions using SimplifyDemandedBits.Nadav Rotem2012-01-151-0/+37
| | | | | | | | | | | We know that the blend instructions only use the MSB, so if the mask is sign-extended then we can convert it into a SHL instruction. This is a common pattern because the type-legalizer sign-extends the i1 type which is used by the LLVM-IR for the condition. Added a new optimization in SimplifyDemandedBits for SIGN_EXTEND_INREG -> SHL. llvm-svn: 148225
* Relax the FileCheck assertion a bit -- all we really care about is thatChandler Carruth2012-01-151-1/+1
| | | | | | | we're loading from the global array, not how it is spelled in the asm. This should fix the MSVC bots. llvm-svn: 148214
* FileCheck-ize a test, make it more specific to directly test the shiftChandler Carruth2012-01-151-10/+14
| | | | | | removal desired. llvm-svn: 148213
* Fix a corner case hit by redundant phi elimination running after LSR.Andrew Trick2012-01-141-0/+50
| | | | | | Fixes PR11761: bad IR w/ redundant Phi elim llvm-svn: 148177
* After r147827 and r147902, it's now possible for unallocatable registers to beEvan Cheng2012-01-141-0/+103
| | | | | | | | | | | | | | | | | | | live across BBs before register allocation. This miscompiled 197.parser when a cmp + b are optimized to a cbnz instruction even though the CPSR def is live-in a successor. cbnz r6, LBB89_12 ... LBB89_12: ble LBB89_1 The fix consists of two parts. 1) Teach LiveVariables that some unallocatable registers might be liveouts so don't mark their last use as kill if they are. 2) ARM constantpool island pass shouldn't form cbz / cbnz if the conditional branch does not kill CPSR. rdar://10676853 llvm-svn: 148168
* Cleanup test case by adding checks for test names.Chad Rosier2012-01-141-1/+2
| | | | llvm-svn: 148166
* Add a test showing how the Leh_func_endN symbol is used.Rafael Espindola2012-01-141-0/+27
| | | | llvm-svn: 148161
* Add new test.Devang Patel2012-01-131-0/+10
| | | | llvm-svn: 148128
* test/CodeGen/ARM/test-sharedidx.ll: Fix for -Asserts.NAKAMURA Takumi2012-01-131-0/+1
| | | | llvm-svn: 148107
* Add patterns for v16i16 and v32i8 immAllZerosV to select VPXOR to match ↵Craig Topper2012-01-131-1/+1
| | | | | | v4i64 and v8i32. llvm-svn: 148106
* DAGCombine's logic for forming pre- and post- indexed loads / stores were beingEvan Cheng2012-01-132-4/+99
| | | | | | | | | | | | | | | | overly conservative. It was concerned about cases where it would prohibit folding simple [r, c] addressing modes. e.g. ldr r0, [r2] ldr r1, [r2, #4] => ldr r0, [r2], #4 ldr r1, [r2] Change the logic to look for such cases which allows it to form indexed memory ops more aggressively. rdar://10674430 llvm-svn: 148086
* Implement proper ObjC ARC objc_retainBlock "escape" analysis, so thatDan Gohman2012-01-132-2/+155
| | | | | | | | the optimizer doesn't eliminate objc_retainBlock calls which are needed for their side effect of copying blocks onto the heap. This implements rdar://10361249. llvm-svn: 148076
* Fixed a bug in LowerVECTOR_SHUFFLE caused assertion failureElena Demikhovsky2012-01-121-1/+9
| | | | | | | lc: X86ISelLowering.cpp:6480: llvm::SDValue llvm::X86TargetLowering::LowerVECTOR_SHUFFLE(llvm::SDValue, llvm::SelectionDAG&) const: Assertion `V1.getOpcode() != ISD::UNDEF&& "Op 1 of shuffle should not be undef"' failed. Added a test. llvm-svn: 148044
* Add error-reporting tests for platforms that don't support segmented stacks.Rafael Espindola2012-01-121-0/+11
| | | | | | Patch by Brian Anderson. llvm-svn: 148042
* Support segmented stacks on 64-bit FreeBSD.Rafael Espindola2012-01-121-0/+52
| | | | | | | This patch uses tcb_spare field in the tcb structure to store info. Patch by Jyun-Yan You. llvm-svn: 148041
* Support segmented stacks on win32.Rafael Espindola2012-01-121-0/+50
| | | | | | | Uses the pvArbitrary slot of the TIB, which is reserved for applications. We only support frames with a static size. llvm-svn: 148040
* Remove test case, as Chris suggested.Devang Patel2012-01-121-23/+0
| | | | llvm-svn: 148039
* Add test case to check intel syntax parsing.Devang Patel2012-01-121-0/+23
| | | | llvm-svn: 148034
* Fix a bug in the AVX 256-bit shuffle code in cases where the splat element ↵Nadav Rotem2012-01-121-0/+12
| | | | | | | | is on the boundary of two 128-bit vectors. The attached testcase was stuck in an endless loop. llvm-svn: 148027
* X86: Generalize the x << (y & const) optimization to also catch masks with ↵Benjamin Kramer2012-01-121-3/+15
| | | | | | more set bits set than 31 or 63. llvm-svn: 148024
* On AVX, we can load v8i32 at a time. The bug happens when two uneven loads ↵Nadav Rotem2012-01-111-0/+12
| | | | | | | | | | are used. When we load the v12i32 type, the GenWidenVectorLoads method generates two loads: v8i32 and v4i32 and attempts to use CONCAT_VECTORS to join them. In this fix I concat undef values to widen the smaller value. The test "widen_load-2.ll" also exposes this bug on AVX. llvm-svn: 147964
* Check to make sure that the CFString's back store ends up in the correct ↵Bill Wendling2012-01-111-0/+36
| | | | | | section. llvm-svn: 147961
* Support segmented stacks on mac.Rafael Espindola2012-01-111-74/+205
| | | | | | | | This uses TLS slot 90, which actually belongs to JavaScriptCore. We only support frames with static size Patch by Brian Anderson. llvm-svn: 147960
* Split segmented stacks tests into tests for static- and dynamic-size frames.Rafael Espindola2012-01-112-37/+71
| | | | | | Patch by Brian Anderson. llvm-svn: 147959
* Generate the segmented stack prologue for fastcc too.Rafael Espindola2012-01-111-0/+55
| | | | | | Patch by Brian Anderson. llvm-svn: 147958
* Revert r147945 which disabled an addressing mode transformation. I hadChandler Carruth2012-01-111-10/+10
| | | | | | | | | hoped this would revive one of the llvm-gcc selfhost build bots, but it didn't so it doesn't appear that my transform is the culprit. If anyone else is seeing failures, please let me know! llvm-svn: 147957
* Use unsigned comparison in segmented stack prologue.Rafael Espindola2012-01-111-0/+6
| | | | | | | | This is a comparison of two addresses, and GCC does the comparison unsigned. Patch by Brian Anderson. llvm-svn: 147954
* Explicitly set the scale to 1 on some segstack prologue instrs.Rafael Espindola2012-01-111-0/+4
| | | | | | Patch by Brian Anderson. llvm-svn: 147952
* The error check for using -g with a .s file already containing dwarf .fileKevin Enderby2012-01-111-0/+9
| | | | | | | directives was in the wrong place and getting triggered incorectly with a cpp .file directive. This change fixes that and adds a test case. llvm-svn: 147951
* Add XOP Intrinsics and testsJan Sjödin2012-01-111-0/+1059
| | | | llvm-svn: 147949
* Fix a bug in the lowering of BUILD_VECTOR for AVX. SCALAR_TO_VECTOR does not ↵Nadav Rotem2012-01-112-5/+24
| | | | | | zero untouched elements. Use INSERT_VECTOR_ELT instead. llvm-svn: 147948
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