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* Fix one-after-the-end type metadata handling in globalsplit.Evgeniy Stepanov2017-03-071-7/+13
| | | | | | | | | | Itanium ABI may have an address point one byte after the end of a vtable. When such vtable global is split, the !type metadata needs to follow the right vtable. Differential Revision: https://reviews.llvm.org/D30716 llvm-svn: 297236
* Fix source-lines test on Windows.Zachary Turner2017-03-071-7/+7
| | | | llvm-svn: 297233
* [InstCombine] shrink truncated splat shuffle (2nd try)Sanjay Patel2017-03-071-6/+4
| | | | | | | | | | | | | | | | This was committed at r297155 and reverted at r297166 because of an over-reaching clang test. That should be fixed with r297189. This is one part of solving a recent bug report: http://lists.llvm.org/pipermail/llvm-dev/2017-February/110293.html This keeps with our general approach: changing arbitrary shuffles is off-limts, but changing splat is ok. The transform is very similar to the existing shrinkBitwiseLogic() canonicalization. Differential Revision: https://reviews.llvm.org/D30123 llvm-svn: 297232
* [ObjectYAML] Fix issue with DWARF2 AddrSize 8Chris Bieneman2017-03-071-0/+507
| | | | | | | | In my refactoring I introduced a bug where we were using the reference size instead of the offset size for DW_FORM_strp and similar forms. This patch resolves the error and adds a test case testing all the DWARF forms for DWARF2 AddrSize 8. There is similar coverage already in the DWARFDebugInfoTest sources that covers the parser. Once I migrate the DWARFGenerator APIs to be built on the YAML tools they will be fully covered under the same tests. llvm-svn: 297230
* GlobalISel: fix legalization of G_INSERTTim Northover2017-03-071-1/+20
| | | | | | | | We were calculating incorrect extract/insert offsets by trying to be too tricksy with min/max. It's clearer to just split the logic up into "register starts before this segment" vs "after". llvm-svn: 297226
* [coroutines] Add handling for unwind coro.endsGor Nishanov2017-03-0716-33/+178
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The purpose of coro.end intrinsic is to allow frontends to mark the cleanup and other code that is only relevant during the initial invocation of the coroutine and should not be present in resume and destroy parts. In landing pads coro.end is replaced with an appropriate instruction to unwind to caller. The handling of coro.end differs depending on whether the target is using landingpad or WinEH exception model. For landingpad based exception model, it is expected that frontend uses the `coro.end`_ intrinsic as follows: ``` ehcleanup: %InResumePart = call i1 @llvm.coro.end(i8* null, i1 true) br i1 %InResumePart, label %eh.resume, label %cleanup.cont cleanup.cont: ; rest of the cleanup eh.resume: %exn = load i8*, i8** %exn.slot, align 8 %sel = load i32, i32* %ehselector.slot, align 4 %lpad.val = insertvalue { i8*, i32 } undef, i8* %exn, 0 %lpad.val29 = insertvalue { i8*, i32 } %lpad.val, i32 %sel, 1 resume { i8*, i32 } %lpad.val29 ``` The `CoroSpit` pass replaces `coro.end` with ``True`` in the resume functions, thus leading to immediate unwind to the caller, whereas in start function it is replaced with ``False``, thus allowing to proceed to the rest of the cleanup code that is only needed during initial invocation of the coroutine. For Windows Exception handling model, a frontend should attach a funclet bundle referring to an enclosing cleanuppad as follows: ``` ehcleanup: %tok = cleanuppad within none [] %unused = call i1 @llvm.coro.end(i8* null, i1 true) [ "funclet"(token %tok) ] cleanupret from %tok unwind label %RestOfTheCleanup ``` The `CoroSplit` pass, if the funclet bundle is present, will insert ``cleanupret from %tok unwind to caller`` before the `coro.end`_ intrinsic and will remove the rest of the block. Reviewers: majnemer Reviewed By: majnemer Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D25543 llvm-svn: 297223
* [GlobalISel] Don't translate intrinsics with metadata parameters.Ahmed Bougacha2017-03-071-0/+11
| | | | | | | | | Some intrinsics take metadata parameters. These all need custom handling of some form, and cannot possibly be lowered generically to G_INTRINSIC calls with vreg operands. Reject them, instead of hitting an assert later in getOrCreateVReg. llvm-svn: 297209
* [GlobalISel] Avoid invalidating ValToVReg when translating no-op bitcast.Ahmed Bougacha2017-03-071-0/+30
| | | | | | | | | | | | | | | | | When we translate a no-op (same type) bitcast, we try to be clever and only emit a COPY if we already assigned a vreg to the defined value. However, when we didn't, we tried to assign to a reference into the ValToVReg DenseMap, even though the RHS of the assignment (getOrCreateVReg) could potentially grow that DenseMap, invalidating the reference. Avoid that by getting the source vreg first. I audited the rest of the translator; this is the only tricky case. The test is quite unwieldy, as the problem is caused by the DenseMap growing, which happens after the 47th mapped value. llvm-svn: 297208
* [GlobalISel] Relax vector G_SELECT assertion.Ahmed Bougacha2017-03-071-0/+11
| | | | | | | | | | | For vector operands, the `select` instruction supports both vector and non-vector conditions. The MIR builder had an overly restrictive assertion, that only accepted vector conditions for vector selects (in effect implementing ISD::VSELECT). Make it possible to express the full range of G_SELECTs. llvm-svn: 297207
* [GlobalISel] Add vector select translation test. NFC.Ahmed Bougacha2017-03-071-0/+13
| | | | llvm-svn: 297206
* [GlobalISel] Ignore %noreg when applying default regbank mapping.Ahmed Bougacha2017-03-071-0/+45
| | | | | | | | | | | | | When computing the mapping for non-generic instructions, we skipped %noreg operands, because we can't always reason about their banks. Also skip them when applying the mapping. Otherwise, we could end up with mappings that we can't apply. While there, duplicate an assert to distinguish between the two error conditions. llvm-svn: 297201
* [GlobalISel] Emit DBG_VALUE %noreg for non-int/fp constant values.Ahmed Bougacha2017-03-071-0/+2
| | | | | | | | When a dbg_value has a constant operand that isn't representable in MI, there isn't much we can do. Use %noreg (0) for those situations. This matches the SelectionDAG behavior. llvm-svn: 297200
* [GlobalISel] Add constant dbg.value translation tests. NFC.Ahmed Bougacha2017-03-071-2/+6
| | | | llvm-svn: 297199
* [NVPTX] Fixed lowering of unaligned loads/stores of f16 scalars and vectors.Artem Belevich2017-03-072-0/+72
| | | | | | Differential Revision: https://reviews.llvm.org/D30672 llvm-svn: 297198
* SjLjEHPrepare: Fix the pass for swifterror argumentsArnold Schwaighofer2017-03-071-0/+27
| | | | | | | | | | | We cannot leave the identity copies 'select true, arg, undef' that this pass inserts for arguments to simplify handling of values on swifterror arguments. swifterror arguments have restrictions on their uses. rdar://30839288 llvm-svn: 297197
* llvm-objdump: handle line numbers and source options for amdgpu objectsKonstantin Zhuravlyov2017-03-073-0/+117
| | | | | | Differential Revision: https://reviews.llvm.org/D30679 llvm-svn: 297193
* [AArch64] Vulcan is now ThunderXT99Joel Jones2017-03-073-3/+3
| | | | | | | | | | | | | | | | | Broadcom Vulcan is now Cavium ThunderX2T99. LLVM Bugzilla: http://bugs.llvm.org/show_bug.cgi?id=32113 Minor fixes for the alignments of loops and functions for ThunderX T81/T83/T88 (better performance). Patch was tested with SpecCPU2006. Patch by Stefan Teleman Differential Revision: https://reviews.llvm.org/D30510 llvm-svn: 297190
* [ObjectYAML] Add support for DWARF5 Unit headerChris Bieneman2017-03-071-0/+582
| | | | | | In DWARF5 the Unit header added a new field, UnitType, and swapped the order of the address size and abbreviation offset fields. llvm-svn: 297183
* [LV] Consider users that are memory accesses in uniforms expansion stepMatthew Simpson2017-03-071-0/+50
| | | | | | | | | | | When expanding the set of uniform instructions beyond the seed instructions (e.g., consecutive pointers), we mark a new instruction uniform if all its loop-varying users are uniform. We should also allow users that are consecutive or interleaved memory accesses. This fixes cases where we have an instruction that is used as the pointer operand of a consecutive access but also used by a non-memory instruction that later becomes uniform as part of the expansion. llvm-svn: 297179
* Further reduce testcaseAdrian Prantl2017-03-071-46/+34
| | | | llvm-svn: 297176
* Fix test and add missing return for llvm-lto2 error caseTeresa Johnson2017-03-071-0/+1
| | | | | | | | | | | | | | | | | Summary: This test was missing the target triple. Once I fixed that, the case with the invalid character error stopped returning 1 from llvm-lto2 and the test reported a failure. Fixed by adding the missing return from llvm-lto2. Apparently we were failing when we eventually tried to get the target. Reviewers: pcc Subscribers: mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D30585 llvm-svn: 297173
* [GlobalISel] Translate floating-point negationVolkan Keles2017-03-071-0/+18
| | | | | | | | | | | | Reviewers: qcolombet, javed.absar, aditya_nandakumar, dsanders, t.p.northover, ab Reviewed By: qcolombet Subscribers: dberris, rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30671 llvm-svn: 297171
* Update comment in testcaseAdrian Prantl2017-03-071-1/+2
| | | | llvm-svn: 297170
* revert r297155 because there's a clang test that depends on InstCombine:Sanjay Patel2017-03-071-4/+6
| | | | | | tools/clang/test/CodeGen/zvector.c llvm-svn: 297166
* Revert "Strip debug info when inlining into a nodebug function."Adrian Prantl2017-03-072-40/+3
| | | | | | | | | | This reverts commit r296488. As noted by David Blaikie on llvm-commits, I overlooked the case of a debug function being inlined into a nodebug function being inlined into a debug function. llvm-svn: 297163
* Relax the conflicting function arg verifier to allow for inlined debugAdrian Prantl2017-03-071-0/+70
| | | | | | info in nodebug functions. llvm-svn: 297161
* Revert r297132, it caused PR32171Nico Weber2017-03-071-79/+0
| | | | llvm-svn: 297159
* [InstCombine] shrink truncated splat shuffleSanjay Patel2017-03-071-6/+4
| | | | | | | | | | | | | This is one part of solving a recent bug report: http://lists.llvm.org/pipermail/llvm-dev/2017-February/110293.html This keeps with our general approach: changing arbitrary shuffles is off-limts, but changing splat is ok. The transform is very similar to the existing shrinkBitwiseLogic() canonicalization. Differential Revision: https://reviews.llvm.org/D30123 llvm-svn: 297155
* [ARM] Correct handling of LSL #0 in an IT blockJohn Brawn2017-03-071-0/+14
| | | | | | | | | | | The check for LSL #0 in an IT block was checking if operand 4 was zero, but operand 4 is the condition code operand so it was actually checking for LSLEQ. Fix this by checking operand 3, which really is the immediate operand, and add some tests. Differential Revision: https://reviews.llvm.org/D30692 llvm-svn: 297142
* [Hexagon] Do not insert instructions before PHI nodesKrzysztof Parzyszek2017-03-071-0/+1
| | | | llvm-svn: 297141
* [ARM] Reapply r296865 "[ARM] fpscr read/write intrinsics not aware of each ↵Ranjeet Singh2017-03-071-0/+44
| | | | | | | | | | | | | | | | | | | | other"" The original patch r296865 was reverted as it broke the chromium builds for Android https://bugs.llvm.org/show_bug.cgi?id=32134, this patch reapplies r296865 with a fix to make sure it doesn't cause the build regression. The problem was that intrinsic selection on int_arm_get_fpscr was failing in ISel this was because the code to manually select this intrinsic still thought it was the version with no side-effects (INTRINSIC_WO_CHAIN) which is wrong as it doesn't semantically match the definition in the tablegen code which says it does have side-effects, I've fixed this by updating the intrinsic type to INTRINSIC_W_CHAIN (has side-effects). I've also added a test for this based on Hans original reproducer. Differential Revision: https://reviews.llvm.org/D30645 llvm-svn: 297137
* [SystemZ] Add check VT.isSimple() in canTreateAsByteVector()Jonas Paulsson2017-03-071-0/+10
| | | | | | | | Since BB-vectorizer can produce vectors of for example 3 elements, this check is needed. Review: Ulrich Weigand llvm-svn: 297136
* In Thumb1, materialize a move between low registers as a `movs`, if CPSR ↵Artyom Skrobov2017-03-075-44/+34
| | | | | | | | | | | | | | | | isn't live. Summary: Previously, it had always been materialized as a push/pop sequence. Reviewers: labrinea, jroelofs Reviewed By: jroelofs Subscribers: llvm-commits, rengolin Differential Revision: https://reviews.llvm.org/D30648 llvm-svn: 297134
* [LoopRotate] Update dbg.value intrinsicsSam Parker2017-03-071-0/+79
| | | | | | | | Propagate debug info through the newly inserted PHI nodes. Differential Revision: https://reviews.llvm.org/D30190 llvm-svn: 297132
* [X86][AVX512] Add missing entries to EVEX2VEX tablesAyman Musa2017-03-0712-157/+256
| | | | | | | | evex2vex pass defines 2 tables which maps EVEX instructions to their VEX identical when possible. Adding all missing entries. Differential Revision: https://reviews.llvm.org/D30501 llvm-svn: 297126
* Revert "[PowerPC][ELFv2ABI] Allocate parameter area on-demand to reduce ↵Tim Shen2017-03-071-86/+0
| | | | | | | | | | | stack frame size" This reverts commit r296771. We found some wide spread test failures internally. I'm working on a testcase. Politely revert the patch in the mean time. :) llvm-svn: 297124
* [LoopUnrolling] Fix loop size check for peelingSanjoy Das2017-03-071-1/+29
| | | | | | | | | | | | | | | | | | Summary: We should check if loop size allows us to peel at least one iteration before we do so. Patch by Max Kazantsev! Reviewers: sanjoy, mkuper, efriedma Reviewed By: mkuper Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30632 llvm-svn: 297122
* Revert "AMDGPU: Set MCAsmInfo::PointerSize"Konstantin Zhuravlyov2017-03-071-26/+0
| | | | | | | | It breaks line tables because the patch is not complete, working on a complete one at the moment This reverts commit r294031. llvm-svn: 297118
* Add a testcase for r297072.Adrian Prantl2017-03-071-0/+56
| | | | | | | Check that missing debug locations on inlinable calls are a recoverable error. llvm-svn: 297113
* [SLP] Revert r296863 due to miscompiles.Michael Kuperstein2017-03-062-44/+1
| | | | | | Details and reproducer are on the email thread for r296863. llvm-svn: 297103
* GlobalISel: restrict G_EXTRACT instruction to just one operand.Tim Northover2017-03-069-28/+73
| | | | | | | A bit more painful than G_INSERT because it was more widely used, but this should simplify the handling of extract operations in most locations. llvm-svn: 297100
* [ObjectYAML] Support for DW_FORM_implicit_const DWARF5 formChris Bieneman2017-03-061-0/+307
| | | | | | | | This patch adds support to the DWARF YAML reader and writer for the new DWARF5 abbreviation form, DW_FORM_implicit_const. The attribute was added in r291599. llvm-svn: 297091
* [Outliner] Fixed Asan bot failure in r296418Jessica Paquette2017-03-062-0/+185
| | | | | | | | Fixed the asan bot failure which led to the last commit of the outliner being reverted. The change is in lib/CodeGen/MachineOutliner.cpp in the SuffixTree's constructor. LeafVector is no longer initialized using reserve but just a standard constructor. llvm-svn: 297081
* [AArch64][Redundant Copy Elim] Add support for CMN and shifted imm.Chad Rosier2017-03-061-0/+135
| | | | | | | | | | This patch extends the current functionality of the AArch64 redundant copy elimination pass to handle CMN instructions as well as a shifted immediates. Differential Revision: https://reviews.llvm.org/D30576. llvm-svn: 297078
* Disable gvn-hoist (PR32153)Hans Wennborg2017-03-061-1/+0
| | | | llvm-svn: 297075
* Revert r297039, it's causing some mysterious buildbot failuresKrzysztof Parzyszek2017-03-061-27/+0
| | | | llvm-svn: 297062
* AMDGPU/R600: Fix ALU clause markers use detectionJan Vesely2017-03-061-2/+2
| | | | | | | | also exit early on kill instead of redefinition. Differential Revision: https://reviews.llvm.org/D30230 llvm-svn: 297060
* NewGVN: We were not really failing this testcase, because the instructions ↵Daniel Berlin2017-03-061-7/+12
| | | | | | it was looking for are unused. GVN value numbers unused instructions, NewGVN does not. Fix the instructions to be used, so we eliminate the redundancies it's checking for, and un-XFAIL it llvm-svn: 297058
* [IfConversion] Only renormalize probabilities if branches are analyzableKrzysztof Parzyszek2017-03-061-0/+36
| | | | | | | | | | | If a block has non-analyzable branches, the listed successors don't need to add up to one. For example, if a block has a conditional tail call, that tail call will not have a corresponding successor in the successor list, but will still be a possible branch. Differential Revision: https://reviews.llvm.org/D30556 llvm-svn: 297054
* GlobalISel: don't emit degenerate G_INSERT instructions.Tim Northover2017-03-061-0/+20
| | | | | | | | | | | Before, we were producing G_INSERT instructions that were actually closer to a cast or even a COPY when both input and output sizes are the same. This doesn't really make sense and means that everything interpreting a G_INSERT also has to handle all these kinds of casts. So now we detect these degenerate cases and emit real casts instead. llvm-svn: 297051
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