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* add tests for potential select transformsSanjay Patel2016-06-261-0/+117
| | | | llvm-svn: 273833
* Revert r273807 (and r273809, r273810), it caused PR28311Nico Weber2016-06-261-191/+0
| | | | llvm-svn: 273815
* [codeview] Improved array type support.Amjad Aboud2016-06-261-0/+191
| | | | | | | | | | | Added support for: 1. Multi dimension array. 2. Array of structure type, which previously was declared incompletely. 3. Dynamic size array. Differential Revision: http://reviews.llvm.org/D21526 llvm-svn: 273807
* [LoopUnswitch] Unswitch on conditions feeding into guardsSanjoy Das2016-06-261-0/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is a straightforward extension of what LoopUnswitch does to branches to guards. That is, we unswitch ``` for (;;) { ... guard(loop_invariant_cond); ... } ``` into ``` if (loop_invariant_cond) { for (;;) { ... // There is no need to emit guard(true) ... } } else { for (;;) { ... guard(false); // SimplifyCFG will clean this up by adding an // unreachable after the guard(false) ... } } ``` Reviewers: majnemer Subscribers: mcrosier, llvm-commits, mzolotukhin Differential Revision: http://reviews.llvm.org/D21725 llvm-svn: 273801
* AMDGPU/R600: Fix GlobalValue regressions.Jan Vesely2016-06-251-5/+10
| | | | | | | | | | | | | | | Don't cast GV expression to MCSymbolRefExpr. r272705 changed GV to binary expressions by including offset even if the offset it 0 (we haven't hit this sooner since tested workloads don't include static offsets) We don't really care about the type of expression, so set it directly. Fixes: r272705 Consider section relative relocations. Since all const as data is in one boffer section relative is equivalent to abs32. Fixes: r273166 Differential Revision: http://reviews.llvm.org/D21633 llvm-svn: 273785
* update tests to use FileCheckSanjay Patel2016-06-251-34/+47
| | | | llvm-svn: 273784
* Revert "[SimplifyCFG] Stop inserting calls to llvm.trap for UB"David Majnemer2016-06-253-0/+25
| | | | | | This reverts commit r273778, it seems to break UBSan :/ llvm-svn: 273779
* [SimplifyCFG] Stop inserting calls to llvm.trap for UBDavid Majnemer2016-06-253-25/+0
| | | | | | | | | | | | | | | | | SimplifyCFG had logic to insert calls to llvm.trap for two very particular IR patterns: stores and invokes of undef/null. While InstCombine canonicalizes certain undefined behavior IR patterns to stores of undef, phase ordering means that this cannot be relied upon in general. There are much better tools than llvm.trap: UBSan and ASan. N.B. I could be argued into reverting this change if a clear argument as to why it is important that we synthesize llvm.trap for stores, I'd be hard pressed to see why it'd be useful for invokes... llvm-svn: 273778
* [InstSimplify] Replace calls to null with undefDavid Majnemer2016-06-251-0/+16
| | | | | | | Calling null is undefined behavior, we can simplify the resulting value to undef. llvm-svn: 273777
* [SimplifyCFG] Replace calls to null/undef with unreachableDavid Majnemer2016-06-251-0/+31
| | | | | | | Calling null is undefined behavior, a call to undef can be trivially treated as a call to null. llvm-svn: 273776
* [AMDGPU] Emit debugger prologue and emit the rest of the debugger fields in ↵Konstantin Zhuravlyov2016-06-251-0/+80
| | | | | | | | | | | | | | | | | | | | | | | the kernel code header Debugger prologue is emitted if -mattr=+amdgpu-debugger-emit-prologue. Debugger prologue writes work group IDs and work item IDs to scratch memory at fixed location in the following format: - offset 0: work group ID x - offset 4: work group ID y - offset 8: work group ID z - offset 16: work item ID x - offset 20: work item ID y - offset 24: work item ID z Set - amd_kernel_code_t::debug_wavefront_private_segment_offset_sgpr to scratch wave offset reg - amd_kernel_code_t::debug_private_segment_buffer_sgpr to scratch rsrc reg - amd_kernel_code_t::is_debug_supported to true if all debugger features are enabled Differential Revision: http://reviews.llvm.org/D20335 llvm-svn: 273769
* llvm-ar: add some tests for llvm-ar default selectionSaleem Abdulrasool2016-06-258-0/+179
| | | | | | | This adds some tests for the smarter llvm-ar selection mode as well as some additional tests as per Rafael's post commit review comments. llvm-svn: 273768
* AMDGPU/SI: Make sure not to fold offsets into local address space globalsTom Stellard2016-06-251-0/+21
| | | | | | | | | | | | | | Summary: Offset folding only works if you are emitting relocations, and we don't emit relocations for local address space globals. Reviewers: arsenm, nhaustov Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: http://reviews.llvm.org/D21647 llvm-svn: 273765
* [PlaceSafepoints] Don't call undef in test case; NFCSanjoy Das2016-06-251-1/+3
| | | | llvm-svn: 273764
* [LoopUnswitch] Avoid exponential behaviorSanjoy Das2016-06-251-0/+51
| | | | | | | | | | | | Summary: (No semantic change intended). Reviewers: majnemer, bogner, mzolotukhin Subscribers: mcrosier, llvm-commits, mzolotukhin Differential Revision: http://reviews.llvm.org/D21707 llvm-svn: 273763
* The absence of noreturn doesn't ensure mayReturnDavid Majnemer2016-06-251-18/+0
| | | | | | | | | | | There are two separate issues: - LLVM doesn't consider infinite loops to be side effects: we happily hoist/sink above/below loops whose bounds are unknown. - The absence of the noreturn attribute is insufficient for us to know if a function will definitely return. Relying on noreturn in the middle-end for any property is an accident waiting to happen. llvm-svn: 273762
* IR: Introduce llvm.type.checked.load intrinsic.Peter Collingbourne2016-06-256-12/+257
| | | | | | | | | | | | | | | | This intrinsic safely loads a function pointer from a virtual table pointer using type metadata. This intrinsic is used to implement control flow integrity in conjunction with virtual call optimization. The virtual call optimization pass will optimize away llvm.type.checked.load intrinsics associated with devirtualized calls, thereby removing the type check in cases where it is not needed to enforce the control flow integrity constraint. This patch also introduces the capability to copy type metadata between global variables, and teaches the virtual call optimization pass to do so. Differential Revision: http://reviews.llvm.org/D21121 llvm-svn: 273756
* MachineScheduler: Fully compare top/bottom candidatesMatthias Braun2016-06-2520-43/+44
| | | | | | | | | | In bidirectional scheduling this gives more stable results than just comparing the "reason" fields of the top/bottom node because the reason field may be higher depending on what other nodes are in the queue. Differential Revision: http://reviews.llvm.org/D19401 llvm-svn: 273755
* Reinstate r273711David Majnemer2016-06-252-0/+29
| | | | | | | | | | r273711 was reverted by r273743. The inliner needs to know about any call sites in the inlined function. These were obscured if we replaced a call to undef with an undef but kept the call around. This fixes PR28298. llvm-svn: 273753
* AMDGPU: Define a schedule class for COPY.Matthias Braun2016-06-248-16/+15
| | | | | | | | | | COPY was lacking a scheduling class, define it to avoid regressions in the upcoming change to the bidirectional MachineScheduler. Approved by tstellar on IRC. Differential Revision: http://reviews.llvm.org/D21540 llvm-svn: 273751
* [PM] Port float2int to the new pass managerMichael Kuperstein2016-06-241-0/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D21704 llvm-svn: 273747
* Hookup ProfileSummary with SampleProfilerLoaderDehao Chen2016-06-242-0/+18
| | | | | | | | | | | | Summary: Set ProfileSummary in SampleProfilerLoader. Reviewers: davidxl, eraman Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D21702 llvm-svn: 273745
* Revert r273711, it caused PR28298.Nico Weber2016-06-241-10/+0
| | | | llvm-svn: 273743
* Fix the type signature of DwarfExpression::Add.*Constant to support values ↵Adrian Prantl2016-06-242-10/+86
| | | | | | | | | | | >32 bits. This fixes an embarrassing bug when emitting .debug_loc entries for 64-bit+ constants, which were previously silently truncated to 32 bits. <rdar://problem/26843232> llvm-svn: 273736
* [Hexagon] Simplify (+fix) instruction selection for indexed loads/storesKrzysztof Parzyszek2016-06-241-0/+52
| | | | llvm-svn: 273733
* IR: New representation for CFI and virtual call optimization pass metadata.Peter Collingbourne2016-06-2433-391/+287
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bitset metadata currently used in LLVM has a few problems: 1. It has the wrong name. The name "bitset" refers to an implementation detail of one use of the metadata (i.e. its original use case, CFI). This makes it harder to understand, as the name makes no sense in the context of virtual call optimization. 2. It is represented using a global named metadata node, rather than being directly associated with a global. This makes it harder to manipulate the metadata when rebuilding global variables, summarise it as part of ThinLTO and drop unused metadata when associated globals are dropped. For this reason, CFI does not currently work correctly when both CFI and vcall opt are enabled, as vcall opt needs to rebuild vtable globals, and fails to associate metadata with the rebuilt globals. As I understand it, the same problem could also affect ASan, which rebuilds globals with a red zone. This patch solves both of those problems in the following way: 1. Rename the metadata to "type metadata". This new name reflects how the metadata is currently being used (i.e. to represent type information for CFI and vtable opt). The new name is reflected in the name for the associated intrinsic (llvm.type.test) and pass (LowerTypeTests). 2. Attach metadata directly to the globals that it pertains to, rather than using the "llvm.bitsets" global metadata node as we are doing now. This is done using the newly introduced capability to attach metadata to global variables (r271348 and r271358). See also: http://lists.llvm.org/pipermail/llvm-dev/2016-June/100462.html Differential Revision: http://reviews.llvm.org/D21053 llvm-svn: 273729
* Add support for musl-libc on ARM Linux.Rafael Espindola2016-06-246-0/+32
| | | | | | Patch by Lei Zhang! llvm-svn: 273726
* [obj2yaml] [yaml2obj] Support for MachO Universal binariesChris Bieneman2016-06-241-0/+72
| | | | | | This patch adds round-trip support for MachO Universal binaries to obj2yaml and yaml2obj. Universal binaries have a header and list of architecture structures, followed by a the individual object files at specified offsets. llvm-svn: 273719
* [PM] Port PreISelIntrinsicLowering to the new PMMichael Kuperstein2016-06-241-0/+1
| | | | llvm-svn: 273713
* SimplifyInstruction does not imply DCEDavid Majnemer2016-06-241-0/+10
| | | | | | | We cannot remove an instruction with no uses just because SimplifyInstruction succeeds. It may have side effects. llvm-svn: 273711
* Use shouldAssumeDSOLocal in isOffsetFoldingLegal.Rafael Espindola2016-06-241-0/+10
| | | | | | This makes it slightly more powerful for dynamic-no-pic. llvm-svn: 273704
* Revert "InstCombine rule to fold trunc when value available"Reid Kleckner2016-06-241-57/+0
| | | | | | | | | | | | This reverts commit r273608. Broke building code with sanitizers, where apparently these kinds of loads, casts, and truncations are common: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/24502 http://crbug.com/623099 llvm-svn: 273703
* [InstCombine] consolidate commutation variants of matchSelectFromAndOr() in ↵Sanjay Patel2016-06-241-38/+147
| | | | | | | | | | one place; NFCI By putting all the possible commutations together, we simplify the code. Note that this is NFCI, but I'm adding tests that actually exercise each commutation pattern because we don't have this anywhere else. llvm-svn: 273702
* Codegen: Fix broken assumption in Tail Merge.Kyle Butt2016-06-246-27/+44
| | | | | | | | | Tail merge was making the assumption that a layout successor or predecessor was always a cfg successor/predecessor. Remove that assumption. Changes to tests are necessary because the errant cfg edges were preventing optimizations. llvm-svn: 273700
* Use FileCheck. NFC.Rafael Espindola2016-06-241-10/+3
| | | | llvm-svn: 273699
* [codeview] Emit parameter variables in the right orderReid Kleckner2016-06-242-4/+126
| | | | | | | | | | Clang emits them in reverse order to conform to the ABI, which requires left-to-right destruction. As a result, the order doesn't fall out naturally, and we have to sort things out in the backend. Fixes PR28213 llvm-svn: 273696
* Linker: Copy metadata when linking declarations.Peter Collingbourne2016-06-241-0/+19
| | | | | | Differential Revision: http://reviews.llvm.org/D21624 llvm-svn: 273692
* [codeview] Emit base class information from DW_TAG_inheritance nodesReid Kleckner2016-06-242-22/+342
| | | | | | | | | | | | | | | | There are two remaining issues here: 1. No vbptr information 2. Need to mention indirect virtual bases Getting indirect virtual bases is just a matter of adding an "indirect" flag, emitting them in the frontend, and ignoring them when appropriate for DWARF. All virtual bases use the same artificial vbptr field, so I think the vbptr offset will be best represented by an implicit __vbptr$ClassName member similar to our existing __vptr$ member. llvm-svn: 273688
* [LV] Preserve order of dependences in interleaved accesses analysisMatthew Simpson2016-06-241-0/+305
| | | | | | | | | | | | | | | | | | | | | | | | | | The interleaved access analysis currently assumes that the inserted run-time pointer aliasing checks ensure the absence of dependences that would prevent its instruction reordering. However, this is not the case. Issues can arise from how code generation is performed for interleaved groups. For a load group, all loads in the group are essentially moved to the location of the first load in program order, and for a store group, all stores in the group are moved to the location of the last store. For groups having members involved in a dependence relation with any other instruction in the loop, this reordering can violate the dependence. This patch teaches the interleaved access analysis how to avoid breaking such dependences, and should fix PR27626. An assumption of the original analysis was that the accesses had been collected in "program order". The analysis was then simplified by visiting the accesses bottom-up. However, this ordering was never guaranteed for anything other than single basic block loops. Thus, this patch also enforces the desired ordering. Reference: https://llvm.org/bugs/show_bug.cgi?id=27626 Differential Revision: http://reviews.llvm.org/D19984 llvm-svn: 273687
* Remangle intrinsics names when types are renamedArtur Pilipenko2016-06-242-0/+31
| | | | | | | | | | | | | This is a resubmittion of previously reverted rL273568. This is a fix for the problem mentioned in "LTO and intrinsics mangling" llvm-dev mail thread: http://lists.llvm.org/pipermail/llvm-dev/2016-April/098387.html Reviewers: mehdi_amini, reames Differential Revision: http://reviews.llvm.org/D19373 llvm-svn: 273686
* ExecutionEngine: add preliminary support for COFF ARMSaleem Abdulrasool2016-06-241-0/+107
| | | | | | | | | This adds rudimentary support for COFF ARM to the dynamic loader for the exeuction engine. This can be used by lldb to JIT code into a COFF ARM environment. This lays the foundation for the loader, though a few of the relocation types are yet unhandled. llvm-svn: 273682
* [MachineDominatorTree] Add a MDT verifier.Chad Rosier2016-06-241-1/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D21657 llvm-svn: 273678
* [mips] Use --check-prefixes where appropriate. NFC.Daniel Sanders2016-06-24105-982/+839
| | | | llvm-svn: 273669
* AMDGPU: Add stub custom CodeGenPrepare passMatt Arsenault2016-06-241-0/+8
| | | | | | | | This will do various things including ones CodeGenPrepare does, but with knowledge of uniform values. llvm-svn: 273657
* Remove hack introduced by r273641.George Burgess IV2016-06-241-2/+0
| | | | | | Hopefully the buildbots have had enough time to pick this up by now. llvm-svn: 273656
* AMDGPU: Un-xfail and add testsMatt Arsenault2016-06-248-35/+386
| | | | | | | | Un XFAIL a few tests plus a few more I had lying around in my tree, which seem to all work now but I don't see tests that quite test the same things. llvm-svn: 273655
* AMDGPU: Remove disable-irstructurizer subtarget featureMatt Arsenault2016-06-242-2/+2
| | | | | | | | The only real reason to use it is for testing, so replace it with a command line option instead of a potentially function dependent feature. llvm-svn: 273653
* [llvm-cov] Fix two warningsVedant Kumar2016-06-241-0/+11
| | | | | | | | | They were using output streams inconsistently. One also had a grammar bug. I noticed these while trying to pare down D18278. llvm-svn: 273642
* Temporary hack to clean a file from buildbots.George Burgess IV2016-06-241-1/+3
| | | | | | | | | Some buildbots are complaining about a .s file under test/ that was inadvertently created by a test earlier today, and is still hanging around. I'll undo this change in ~1hr (or whenever the bots are done getting rid of said file). llvm-svn: 273641
* Teaching SimplifyCFG to recognize the Or-Mask trick that InstCombine uses toChuang-Yu Cheng2016-06-241-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | reduce the number of comparisons. Specifically, InstCombine can turn: (i == 5334 || i == 5335) into: ((i | 1) == 5335) SimplifyCFG was already able to detect the pattern: (i == 5334 || i == 5335) to: ((i & -2) == 5334) This patch supersedes D21315 and resolves PR27555 (https://llvm.org/bugs/show_bug.cgi?id=27555). Thanks to David and Chandler for the suggestions! Author: Thomas Jablin (tjablin) Reviewers: majnemer chandlerc halfdan cycheng http://reviews.llvm.org/D21397 llvm-svn: 273639
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