summaryrefslogtreecommitdiffstats
path: root/llvm/test
Commit message (Collapse)AuthorAgeFilesLines
* LowerAtomic: Don't skip optnone functions; atomic still need lowering (PR34020)Hans Wennborg2017-08-232-1/+11
| | | | | | | | | | | The lowering isn't really an optimization, so optnone shouldn't make a difference. ARM relies on the pass running when using "-mthread-model single", because in that mode, it doesn't run AtomicExpand. See bug for more details. Differential Revision: https://reviews.llvm.org/D37040 llvm-svn: 311565
* Revert r311546 as it breaks buildVictor Leschuk2017-08-232-75/+6
| | | | | | http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/4394 llvm-svn: 311560
* [coroutines] CoroBegin from inner coroutines should be considered for spillsGor Nishanov2017-08-231-0/+69
| | | | | | | | | | | | | | | | | | Summary: If a coroutine outer calls another coroutine inner and the inner coroutine body is inlined into the outer, coro.begin from the inner coroutine should be considered for spilling if accessed across suspends. Prior to this change, coroutine frame building code was not considering any coro.begins for spilling. With this change, we only ignore coro.begin for the current coroutine, but, any coro.begins that were inlined into the current coroutine are eligible for spills. Fixes PR34267 Reviewers: GorNishanov Subscribers: qcolombet, llvm-commits, EricWF Differential Revision: https://reviews.llvm.org/D37062 llvm-svn: 311556
* [Reassociate] Don't canonicalize x + (-Constant * y) -> x - (Constant * y)..Chad Rosier2017-08-231-0/+22
| | | | | | | | | | | | | ..if the resulting subtract will be broken up later. This can cause us to get into an infinite loop. x + (-5.0 * y) -> x - (5.0 * y) ; Canonicalize neg const x - (5.0 * y) -> x + (0 - (5.0 * y)) ; Break up subtract x + (0 - (5.0 * y)) -> x + (-5.0 * y) ; Replace 0-X with X*-1. PR34078 llvm-svn: 311554
* [globalisel][tablegen] Add support for ImmLeaf without SDNodeXFormDaniel Sanders2017-08-232-6/+75
| | | | | | | | | | | | | | | | | | | Summary: This patch adds support for predicates on imm nodes but only for ImmLeaf and not for PatLeaf or PatFrag and only where the value does not need to be transformed before being rendered into the instruction. The limitation on PatLeaf/PatFrag/SDNodeXForm is due to differences in the necessary target-supplied C++ for GlobalISel. Depends on D36085 Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar Reviewed By: rovka Subscribers: kristof.beyls, javed.absar, igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D36086 llvm-svn: 311546
* [ARM] Check for assembler instructions in test.Florian Hahn2017-08-231-9/+10
| | | | | | Currently this test causes test failures on some machines, due to isel not being registered. Update the test to run all passes and check emitted assembly instructions for now. llvm-svn: 311545
* [ARM] Add missing patterns for insert_subvector.Florian Hahn2017-08-231-0/+33
| | | | | | | | | | | | | | Summary: In some cases, shufflevector instruction can be transformed involving insert_subvector instructions. The ARM backend was missing some insert_subvector patterns, causing a failure during instruction selection. AArch64 has similar patterns. Reviewers: t.p.northover, olista01, javed.absar, rengolin Reviewed By: javed.absar Subscribers: aemerson, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D36796 llvm-svn: 311543
* [globalisel][tablegen] Add tests for FeatureBitsets and ComplexPattern ↵Daniel Sanders2017-08-231-1/+20
| | | | | | predicates. llvm-svn: 311542
* [gold] Test we don't strip globals when producing relocatables.Davide Italiano2017-08-231-0/+26
| | | | | | | lld was broken in this regard (PR33097). The gold plugin gets this right so, no changes needed, but better adding a test. llvm-svn: 311541
* [InstCombine] Fold branches with irrelevant conditions to a constant.Davide Italiano2017-08-233-3/+14
| | | | | | | | | | | | | | | | InstCombine folds instructions with irrelevant conditions to undef. This, as Nuno confirmed is a bug. (see https://bugs.llvm.org/show_bug.cgi?id=33409#c1 ) Given the original motivation for the change is that of removing an USE, we now fold to false instead (which reaches the same goal without undesired side effects). Fixes PR33409. Differential Revision: https://reviews.llvm.org/D36975 llvm-svn: 311540
* [PowerPC] better instruction selection for OR (XOR) with a 32-bit immediateHiroshi Inoue2017-08-231-0/+96
| | | | | | | | | | | | | | | | | | | | | | | | | - recommitting after fixing a test failure on MacOS On PPC64, OR (XOR) with a 32-bit immediate can be done with only two instructions, i.e. ori + oris. But the current LLVM generates three or four instructions for this purpose (and also it clobbers one GPR). This patch makes PPC backend generate ori + oris (xori + xoris) for OR (XOR) with a 32-bit immediate. e.g. (x | 0xFFFFFFFF) should be ori 3, 3, 65535 oris 3, 3, 65535 but LLVM generates without this patch li 4, 0 oris 4, 4, 65535 ori 4, 4, 65535 or 3, 3, 4 Differential Revision: https://reviews.llvm.org/D34757 llvm-svn: 311538
* Revert rL311526: [PowerPC] better instruction selection for OR (XOR) with a ↵Hiroshi Inoue2017-08-231-96/+0
| | | | | | | | 32-bit immediate This reverts commit rL311526 due to failures in some buildbot. llvm-svn: 311530
* [PowerPC] better instruction selection for OR (XOR) with a 32-bit immediateHiroshi Inoue2017-08-231-0/+96
| | | | | | | | | | | | | | | | | | | | | | | On PPC64, OR (XOR) with a 32-bit immediate can be done with only two instructions, i.e. ori + oris. But the current LLVM generates three or four instructions for this purpose (and also it clobbers one GPR). This patch makes PPC backend generate ori + oris (xori + xoris) for OR (XOR) with a 32-bit immediate. e.g. (x | 0xFFFFFFFF) should be ori 3, 3, 65535 oris 3, 3, 65535 but LLVM generates without this patch li 4, 0 oris 4, 4, 65535 ori 4, 4, 65535 or 3, 3, 4 Differential Revision: https://reviews.llvm.org/D34757 llvm-svn: 311526
* [XRay][CodeGen] Use PIC-friendly code in XRay sleds; remove synthetic ↵Dean Michael Berris2017-08-2311-85/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | references in .text Summary: This change achieves two things: - Redefine the Custom Event handling instrumentation points emitted by the compiler to not require dynamic relocation of references to the __xray_CustomEvent trampoline. - Remove the synthetic reference we emit at the end of a function that we used to keep auxiliary sections alive in favour of SHF_LINK_ORDER associated with the section where the function is defined. To achieve the custom event handling change, we've had to introduce the concept of sled versioning -- this will need to be supported by the runtime to allow us to understand how to turn on/off the new version of the custom event handling sleds. That change has to land first before we change the way we write the sleds. To remove the synthetic reference, we rely on a relatively new linker feature that preserves the sections that are associated with each other. This allows us to limit the effects on the .text section of ELF binaries. Because we're still using absolute references that are resolved at runtime for the instrumentation map (and function index) maps, we mark these sections write-able. In the future we can re-define the entries in the map to use relative relocations instead that can be statically determined by the linker. That change will be a bit more invasive so we defer this for later. Depends on D36816. Reviewers: dblaikie, echristo, pcc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D36615 llvm-svn: 311525
* bpf: add variants of -mcpu=# and support for additional jmp insnsYonghong Song2017-08-231-13/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -mcpu=# will support: . generic: the default insn set . v1: insn set version 1, the same as generic . v2: insn set version 2, version 1 + additional jmp insns . probe: the compiler will probe the underlying kernel to decide proper version of insn set. We did not not use -mcpu=native since llc/llvm will interpret -mcpu=native as the underlying hardware architecture regardless of -march value. Currently, only x86_64 supports -mcpu=probe. Other architecture will silently revert to "generic". Also added -mcpu=help to print available cpu parameters. llvm will print out the information only if there are at least one cpu and at least one feature. Add an unused dummy feature to enable the printout. Examples for usage: $ llc -march=bpf -mcpu=v1 -filetype=asm t.ll $ llc -march=bpf -mcpu=v2 -filetype=asm t.ll $ llc -march=bpf -mcpu=generic -filetype=asm t.ll $ llc -march=bpf -mcpu=probe -filetype=asm t.ll $ llc -march=bpf -mcpu=v3 -filetype=asm t.ll 'v3' is not a recognized processor for this target (ignoring processor) ... $ llc -march=bpf -mcpu=help -filetype=asm t.ll Available CPUs for this target: generic - Select the generic processor. probe - Select the probe processor. v1 - Select the v1 processor. v2 - Select the v2 processor. Available features for this target: dummy - unused feature. Use +feature to enable a feature, or -feature to disable it. For example, llc -mcpu=mycpu -mattr=+feature1,-feature2 ... Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Signed-off-by: Yonghong Song <yhs@fb.com> Acked-by: Alexei Starovoitov <ast@kernel.org> llvm-svn: 311522
* Fix tail-merge-after-mbp testMatthias Braun2017-08-231-14/+14
| | | | | | | | The output of this test changed after the fix in r311520 to have -run-pass=block-placement behave like it does in a normal pipeline. Adjust the test. llvm-svn: 311521
* Add test case for r311511Matthias Braun2017-08-231-0/+36
| | | | | | | | This also changes the TailDuplicator to be configured explicitely pre/post regalloc rather than relying on the isSSA() flag. This was necessary to have `llc -run-pass` work reliably. llvm-svn: 311520
* [InstCombine] Remove check for sext of vector icmp from shouldOptimizeCastCraig Topper2017-08-221-3/+2
| | | | | | | | | | | | Looks like for 'and' and 'or' we end up performing at least some of the transformations this is bocking in a round about way anyway. For 'and sext(cmp1), sext(cmp2) we end up later turning it into 'select cmp1, sext(cmp2), 0'. Then we optimize that back to sext (and cmp1, cmp2). This is the same result we would have gotten if shouldOptimizeCast hadn't blocked it. We do something analogous for 'or'. With this patch we allow that transformation to happen directly in foldCastedBitwiseLogic. And we now support the same thing for 'xor'. This is definitely opening up many other cases, but since we already went around it for some cases hopefully it's ok. Differential Revision: https://reviews.llvm.org/D36213 llvm-svn: 311508
* Revert "[llvm-dwarfdump] Print type names in DW_AT_type DIEs"Jonas Devlieghere2017-08-221-317/+0
| | | | | | This reverts commit r311492. llvm-svn: 311499
* [llvm-dwarfdump] Print type names in DW_AT_type DIEsJonas Devlieghere2017-08-221-0/+317
| | | | | | | This patch adds printing for DW_AT_type DIEs like it's currently already the case for DW_AT_specification DIEs. llvm-svn: 311492
* WholeProgramDevirt: Create bitcast to i8* at each virtual call site.Peter Collingbourne2017-08-225-0/+45
| | | | | | | | | We can't reuse the llvm.assume instruction's bitcast because it may not dominate every user of the vtable pointer. Differential Revision: https://reviews.llvm.org/D36994 llvm-svn: 311491
* [SanitizerCoverage] Optimize stack-depth instrumentation.Matt Morehouse2017-08-221-9/+7
| | | | | | | | | | | | | | | | Summary: Use the initialexec TLS type and eliminate calls to the TLS wrapper. Fixes the sanitizer-x86_64-linux-fuzzer bot failure. Reviewers: vitalybuka, kcc Reviewed By: kcc Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D37026 llvm-svn: 311490
* [ADCE][Dominators] Reapply: Teach ADCE to preserve dominatorsJakub Kuderski2017-08-223-0/+81
| | | | | | | | | | | | | | | | | | | | | Summary: This patch teaches ADCE to preserve both DominatorTrees and PostDominatorTrees. This is reapplies the original patch r311057 that was reverted in r311381. The previous version wasn't using the batch update api for updating dominators, which in vary rare cases caused assertion failures. This also fixes PR34258. Reviewers: dberlin, chandlerc, sanjoy, davide, grosser, brzycki Reviewed By: davide Subscribers: grandinj, zhendongsu, llvm-commits, david2050 Differential Revision: https://reviews.llvm.org/D35869 llvm-svn: 311467
* [x86] auto-generate full checks; NFCSanjay Patel2017-08-221-11/+22
| | | | | | I don't see anything Darwin-specific here, so I made the target generic x86-64. llvm-svn: 311465
* [x86] simplify runs and auto-generate full checksSanjay Patel2017-08-221-33/+40
| | | | | | | | | I've replaced the two OS-specific runs with a generic run because there's no functional difference in the resulting output that we're checking. Also, the script still doesn't work with a Win target. llvm-svn: 311463
* [ARM][AArch64] v8.3-A Javascript ConversionSam Parker2017-08-225-0/+49
| | | | | | | | | | Armv8.3-A adds instructions that convert a double-precision floating point number to a signed 32-bit integer with round towards zero, designed for improving Javascript performance. Differential Revision: https://reviews.llvm.org/D36785 llvm-svn: 311448
* [ARM] Avoid creating duplicate ANDs in SelectionDAGRenato Golin2017-08-221-5/+1
| | | | | | | | | | | When expanding a BRCOND into a BR_CC, do not create an AND 1 if one already exists. Review: D36705 Patch by Joel Galenson <jgalenson@google.com> llvm-svn: 311447
* [ARM] Call setBooleanContents(ZeroOrOneBooleanContent)Renato Golin2017-08-226-161/+29
| | | | | | | | | | | The ARM backend should call setBooleanContents so that it can use known bits to make some optimizations. Review: D35821 Patch by Joel Galenson <jgalenson@google.com> llvm-svn: 311446
* [lib/Analysis] - Mark personality functions as live.George Rimar2017-08-224-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | This is PR33245. Case I am fixing is next: Imagine we have 2 BC files, one defines and uses personality routine, second has only declaration and also uses it. Previously algorithm computing dead symbols (llvm::computeDeadSymbols) did not know about personality routines and leaved them dead even if function that has routine was live. As a result thinLTOInternalizeAndPromoteGUID() method changed binding for such symbol to local. Later when LLD tried to link these objects it failed because one object had undefined global symbol for routine and second object contained local definition instead of global. Patch set the live root flag on the corresponding FunctionSummary for personality routines when we build the per-module summaries during the compile step. Differential revision: https://reviews.llvm.org/D36834 llvm-svn: 311432
* [X86] Prevent several calls to ISD::isConstantSplatVector from returning a ↵Craig Topper2017-08-222-0/+28
| | | | | | | | | | | | | | narrower APInt than the original scalar type ISD::isConstantSplatVector can shrink to the smallest splat width. But we don't check the size of the resulting APInt at all. This can cause us to misinterpret the results. This patch just adds a flag to prevent the APInt from changing width. Fixes PR34271. Differential Revision: https://reviews.llvm.org/D36996 llvm-svn: 311429
* dsymutil: don't copy compile units without children from PCM filesAdrian Prantl2017-08-223-0/+28
| | | | | | rdar://problem/33830532 llvm-svn: 311416
* [InstCombine] add udiv/urem tests with constant numerator; NFCSanjay Patel2017-08-211-0/+22
| | | | llvm-svn: 311396
* [InstCombine] add more tests for udiv/urem narrowing; NFCSanjay Patel2017-08-211-59/+169
| | | | | | We don't currently limit these folds with hasOneUse() or shouldChangeType(). llvm-svn: 311390
* [AArch64] Restore the test of conditional branch fusionEvandro Menezes2017-08-211-5/+5
| | | | | | | | | Restore the functionality of this test that was broken by https://reviews.llvm.org/rL306144. Differential revision: https://reviews.llvm.org/D36807 llvm-svn: 311389
* GlobalISel (AArch64): fix ABI at border between GPRs and SP.Tim Northover2017-08-212-0/+118
| | | | | | | | If a struct would end up half in GPRs and half on SP the ABI says it should actually go entirely on the stack. We were getting this wrong in GlobalISel before, causing compatibility issues. llvm-svn: 311388
* [IR] AutoUpgrade ModuleFlagBehavior for PIC and PIE levelSteven Wu2017-08-212-6/+10
| | | | | | | | | | | | | | | | | | | Summary: From r303590, ModuleFlagBehavior for PIC and PIE level is changed from Error to Max. This will cause bitcode compatibility issue when linking against a bitcode static archive built with old compiler. Add an auto-ugprade path to upgrade the the ModuleFlagBehavior in the old bitcode to match the new one so IRLinker can link them. Reviewers: tejohnson, mehdi_amini, dexonsmith Reviewed By: dexonsmith Subscribers: hans, llvm-commits Differential Revision: https://reviews.llvm.org/D36556 llvm-svn: 311387
* Revert "Reapply: [ADCE][Dominators] Teach ADCE to preserve dominators"Sanjoy Das2017-08-212-57/+0
| | | | | | | | | | | | Summary: This partially reverts commit r311057 since it breaks ADCE. See PR34258. Reviewers: kuhar Subscribers: mcrosier, david2050, llvm-commits Differential Revision: https://reviews.llvm.org/D36979 llvm-svn: 311381
* [LibCallSimplifier] try harder to fold memcmp with constant arguments (2nd try)Sanjay Patel2017-08-211-10/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | The 1st try was reverted because it could inf-loop by creating a dead instruction. Fixed that to not happen and added a test case to verify. Original commit message: Try to fold: memcmp(X, C, ConstantLength) == 0 --> load X == *C Without this change, we're unnecessarily checking the alignment of the constant data, so we miss the transform in the first 2 tests in the patch. I noted this shortcoming of LibCallSimpifier in one of the recent CGP memcmp expansion patches. This doesn't help the example in: https://bugs.llvm.org/show_bug.cgi?id=34032#c13 ...directly, but it's worth short-circuiting more of these simple cases since we're already trying to do that. The benefit of transforming to load+cmp is that existing IR analysis/transforms may further simplify that code. For example, if the load of the variable is common to multiple memcmp calls, CSE can remove the duplicate instructions. Differential Revision: https://reviews.llvm.org/D36922 llvm-svn: 311366
* [InstCombine] Teach foldSelectICmpAnd to recognize a (icmp slt X, 0) and ↵Craig Topper2017-08-211-0/+102
| | | | | | | | | | (icmp sgt X, -1) as equivalent to an and with the sign bit of the truncated type This is similar to what was already done in foldSelectICmpAndOr. Ultimately I'd like to see if we can call foldSelectICmpAnd from foldSelectIntoOp if we detect a power of 2 constant. This would allow us to remove foldSelectICmpAndOr entirely. Differential Revision: https://reviews.llvm.org/D36498 llvm-svn: 311362
* [PPC] Refine checks for emiting TOC restore nop and tail-call eligibility.Sean Fertile2017-08-213-15/+63
| | | | | | | | | For the medium and large code models we only need to check if a call crosses dso-boundaries when considering tail-call elgibility. Differential Revision: https://reviews.llvm.org/D34245 llvm-svn: 311353
* [InstCombine] add tests for memcmp with constant; NFCSanjay Patel2017-08-211-0/+51
| | | | | | | | | | | This is the baseline (current) version of the tests that would have been added with the transform in r311333 (reverted at r311340 due to inf-looping). Adding these now to aid in testing and minimize the patch if/when it is reinstated. llvm-svn: 311350
* Emit only A Single Opt Remark When InliningSam Elliott2017-08-2110-22/+86
| | | | | | | | | | | | | | | | | | | Summary: This updates the Inliner to only add a single Optimization Remark when Inlining, rather than an Analysis Remark and an Optimization Remark. Fixes https://bugs.llvm.org/show_bug.cgi?id=33786 Reviewers: anemet, davidxl, chandlerc Reviewed By: anemet Subscribers: haicheng, fhahn, mehdi_amini, dblaikie, llvm-commits, eraman Differential Revision: https://reviews.llvm.org/D36054 llvm-svn: 311349
* [InstCombine] Fix a weakness in canEvaluateZExtd around 'and' instructionsCraig Topper2017-08-211-7/+4
| | | | | | | | | | | | | | | | | Summary: If the bitsToClear from the LHS of an 'and' comes back non-zero, but all of those bits are known zero on the RHS, we can reset bitsToClear. Without this, the 'or' in the modified test case blocks the transform because it has non-zero bits in its RHS in those bits. Reviewers: spatel, majnemer, davide Reviewed By: davide Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D36944 llvm-svn: 311343
* [X86] When selecting sse_load_f32/f64 pattern, make sure there's only one ↵Craig Topper2017-08-211-2/+3
| | | | | | | | | | | | | | use of every node all the way back to the root of the match Summary: With masked operations, its possible for the operation node like fadd, fsub, etc. to be used by multiple different vselects. Since the pattern matching will start at the vselect, we need to make sure the operation node itself is only used once before we can fold a load. Otherwise we'll end up folding the same load into multiple instructions. Reviewers: RKSimon, spatel, zvi, igorb Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D36938 llvm-svn: 311342
* Revert 311208, 311209Xinliang David Li2017-08-212-79/+0
| | | | llvm-svn: 311341
* revert r311333: [LibCallSimplifier] try harder to fold memcmp with constant ↵Sanjay Patel2017-08-211-65/+0
| | | | | | | | | | arguments We're getting lots of compile-timeout bot failures like: http://lab.llvm.org:8011/builders/clang-native-arm-lnt/builds/7119 http://lab.llvm.org:8011/builders/clang-cmake-x86_64-avx2-linux llvm-svn: 311340
* [InstCombine] add vector tests; NFCSanjay Patel2017-08-211-0/+70
| | | | llvm-svn: 311339
* [llvm-pdbutil] Add support for dumping detailed module stats.Zachary Turner2017-08-213-67/+168
| | | | | | | | | | | | | | | This adds support for dumping a summary of module symbols and CodeView debug chunks. This option prints a table for each module of all of the symbols that occurred in the module and the number of times it occurred and total byte size. Then at the end it prints the totals for the entire file. Additionally, this patch adds the -jmc (just my code) option, which suppresses modules which are from external libraries or linker imports, so that you can focus only on the object files and libraries that originate from your own source code. llvm-svn: 311338
* [InstCombine] regenerate test checks; NFCSanjay Patel2017-08-211-40/+53
| | | | llvm-svn: 311337
* [LibCallSimplifier] try harder to fold memcmp with constant argumentsSanjay Patel2017-08-211-0/+65
| | | | | | | | | | | | | | | | | | | | | | Try to fold: memcmp(X, C, ConstantLength) == 0 --> load X == *C Without this change, we're unnecessarily checking the alignment of the constant data, so we miss the transform in the first 2 tests in the patch. I noted this shortcoming of LibCallSimpifier in one of the recent CGP memcmp expansion patches. This doesn't help the example in: https://bugs.llvm.org/show_bug.cgi?id=34032#c13 ...directly, but it's worth short-circuiting more of these simple cases since we're already trying to do that. The benefit of transforming to load+cmp is that existing IR analysis/transforms may further simplify that code. For example, if the load of the variable is common to multiple memcmp calls, CSE can remove the duplicate instructions. Differential Revision: https://reviews.llvm.org/D36922 llvm-svn: 311333
OpenPOWER on IntegriCloud