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* MCParser: Reject .balign with non-pow2 alignments.Benjamin Kramer2013-02-161-0/+10
| | | | | | | | GNU as rejects them and there are configure scripts in the wild that check if the assembler rejects ".align 3" to determine whether the alignment is in bytes or powers of two. llvm-svn: 175360
* Replace "check:" wth "CHECK:".Jakub Staszak2013-02-161-4/+4
| | | | | | Also fix one test by changing "vpermilps" to "vpshufd". llvm-svn: 175357
* Reinitialize the ivars in the subtarget so that they can be reset with the ↵Bill Wendling2013-02-161-1/+0
| | | | | | new features. llvm-svn: 175336
* [ms-inline asm] Do not omit the frame pointer if we have ms-inline assembly.Chad Rosier2013-02-161-2/+8
| | | | | | | | | | | If the frame pointer is omitted, and any stack changes occur in the inline assembly, e.g.: "pusha", then any C local variable or C argument references will be incorrect. I pass no judgement on anyone who would do such a thing. ;) rdar://13218191 llvm-svn: 175334
* Derive ELF section type from the name in some cases where GNU as doesJoerg Sonnenberger2013-02-161-0/+62
| | | | | | so. llvm-svn: 175327
* Temporary revert of 175320.Bill Wendling2013-02-151-0/+1
| | | | llvm-svn: 175322
* Reinitialize the ivars in the subtarget.Bill Wendling2013-02-151-0/+66
| | | | | | | When we're recalculating the feature set of the subtarget, we need to have the ivars in their initial state. llvm-svn: 175320
* If bundle alignment is enabled, do not add data to a fragment with instructionsDerek Schuff2013-02-151-2/+13
| | | | | | | | | | | | With bundle alignment, instructions all get their own MCFragments (unless they are in a bundle-locked group). For instructions with fixups, this is an MCDataFragment. Emitting actual data (e.g. for .long) attempts to re-use MCDataFragments, which we don't want int this case since it leads to fragments which exceed the bundle size. So, don't reuse them in this case. Also adds a test and fixes some formatting. llvm-svn: 175316
* Forgot to 'svn add' the LoopVectorizer tests for the new parallel loop ↵Pekka Jaaskelainen2013-02-152-0/+166
| | | | | | metadata, sorry. llvm-svn: 175311
* enable SDISel sincos optimization for GNU environmentsPaul Redmond2013-02-151-14/+40
| | | | | | | | | | | | - add sincos to runtime library if target triple environment is GNU - added canCombineSinCosLibcall() which checks that sincos is in the RTL and if the environment is GNU then unsafe fpmath is enabled (required to preserve errno) - extended sincos-opt lit test Reviewed by: Hal Finkel llvm-svn: 175283
* Teach InstCombine to work with smaller legal types in icmp (shl %v, C1), C2Arnaud A. de Grandmaison2013-02-152-3/+42
| | | | | | | | | It enables to work with a smaller constant, which is target friendly for those which can compare to immediates. It also avoids inserting a shift in favor of a trunc, which can be free on some targets. This used to work until LLVM-3.1, but regressed with the 3.2 release. llvm-svn: 175270
* [asan] support long double on 64-bit. See ↵Kostya Serebryany2013-02-151-0/+9
| | | | | | https://code.google.com/p/address-sanitizer/issues/detail?id=151 llvm-svn: 175266
* AArch64: remove ConstantIsland pass & put literals in separate section.Tim Northover2013-02-159-31/+38
| | | | | | | | This implements the review suggestion to simplify the AArch64 backend. If we later discover that we *really* need the extra complexity of the ConstantIslands pass for performance reasons it can be resurrected. llvm-svn: 175258
* AArch64: refactor frame handling to use movz/movk for overlarge offsets.Tim Northover2013-02-151-18/+15
| | | | | | | | In the near future litpools will be in a different section, which means that any access to them is at least two instructions. This makes the case for a movz/movk pair (if total offset <= 32-bits) even more compelling. llvm-svn: 175257
* Simplify the 'operator<' for the attribute object.Bill Wendling2013-02-151-2/+2
| | | | llvm-svn: 175252
* Revert "Fix testcase for attribute ordering."Anna Zaks2013-02-151-1/+1
| | | | | | This reverts commit 58f20a3cbfca7384fe5e25e095f18572736a4792. llvm-svn: 175249
* Revert "Fix testcase for attribute ordering."Anna Zaks2013-02-151-1/+1
| | | | | | This reverts commit 997c6516ca161073a1d516ebca7c0ca7722f64e2. llvm-svn: 175248
* Fix testcase for attribute ordering.Bill Wendling2013-02-151-1/+1
| | | | llvm-svn: 175238
* Fix minor mips16 issues in directives for function prologue. Probably this doesReed Kotler2013-02-151-4/+20
| | | | | | | not matter but makes it more gcc compatible which avoids possible subtle problems. Also, turned back on a disabled check in helloworld.ll. llvm-svn: 175237
* Fix testcase for attribute ordering.Bill Wendling2013-02-151-1/+1
| | | | llvm-svn: 175236
* The ARM NEON vector compare instructions take three arguments. However, the Joel Jones2013-02-141-1/+67
| | | | | | | | | | | | | | assembler should also accept a two arg form, as the docuemntation specifies that the first (destination) register is optional. This patch uses TwoOperandAliasConstraint to add the two argument form. It also fixes an 80-column formatting problem in: test/MC/ARM/neon-bitwise-encoding <rdar://problem/12909419> Clang rejects ARM NEON assembly instructions llvm-svn: 175221
* death to extra whitespaceKay Tiong Khoo2013-02-141-20/+20
| | | | llvm-svn: 175200
* added basic support for Intel ADX instructionsKay Tiong Khoo2013-02-142-0/+36
| | | | | | -feature flag, instructions definitions, test cases llvm-svn: 175196
* Dont merge consecutive loads/stores into vectors when noimplicitfloat is used.Nadav Rotem2013-02-141-0/+34
| | | | llvm-svn: 175190
* Re-apply r175088 for bug fix 13622: Add paired register support forWeiming Zhao2013-02-142-2/+55
| | | | | | | | inline asm with 64-bit data on ARM Update test case to use -mtriple=arm-linux-gnueabi llvm-svn: 175186
* R600: Do not fold single instruction with more that 3 kcache readVincent Lejeune2013-02-141-0/+52
| | | | | | | | | It fixes around 100 tfb piglit tests and 16 glean tests. NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard at amd.com> llvm-svn: 175183
* Revert r15266. This fixes llvm.org/pr15266.Rafael Espindola2013-02-142-20/+6
| | | | llvm-svn: 175173
* Add testcase for llvm-dwarfdump to test parsing of the pubnames data.Krzysztof Parzyszek2013-02-143-0/+48
| | | | llvm-svn: 175168
* Make ARMAsmParser accept the correct alignment specifier syntax in instructions.Kristof Beyls2013-02-146-153/+169
| | | | | | | | | The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] llvm-svn: 175164
* Moved line-info.ll to DebugInfo\X86 directoryElena Demikhovsky2013-02-141-0/+0
| | | | llvm-svn: 175150
* The test failed on Windows. I've changed the platform to run to ↵Elena Demikhovsky2013-02-141-1/+1
| | | | | | "x86_64-apple-darwin". llvm-svn: 175146
* Fixed a bug in X86TargetLowering::LowerVectorIntExtend() (assertion failure).Elena Demikhovsky2013-02-141-0/+14
| | | | | | Added a test. llvm-svn: 175144
* R600: Add lit tests for texture sampling instruction selection.Michel Danzer2013-02-142-0/+113
| | | | | Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 175138
* Reapply "s/grep/FileCheck/ in some tests"Andrew Trick2013-02-145-6/+15
| | | | | | | | This reverts commit fd1335e982bbf93c5f450ed4fd29f9f787435c85. Use a triple this time. llvm-svn: 175134
* Teach the DataLayout aware constant folder to be much more aggressive towardsNick Lewycky2013-02-141-0/+12
| | | | | | 'and' instructions. This is a pattern that shows up a lot in ubsan binaries. llvm-svn: 175128
* Revert "s/grep/FileCheck/ in some tests"Andrew Trick2013-02-145-16/+6
| | | | | | | | | | | | | | | | | | This reverts commit 8b75e6bc35fb3f9c1e788dbd05084c0f4a60a0f3. The FileCheck tests are not equivalent: test/CodeGen/X86/tailcall-structret.ll:6:10: error: expected string not found in input ; CHECK: jmp init ^ <stdin>:1:2: note: scanning from here .section __TEXT,__text,regular,pure_instructions ^ <stdin>:13:2: note: possible intended match here jmp _init ## TAILCALL ^ llvm-svn: 175124
* temporarily revert the patch due to some conflictsWeiming Zhao2013-02-132-55/+2
| | | | llvm-svn: 175107
* Hexagon: add support for predicate-GPR copies.Anshuman Dasgupta2013-02-131-0/+8
| | | | llvm-svn: 175102
* R600: Add support for 128-bit parametersTom Stellard2013-02-131-0/+18
| | | | | NOTE: This is a candidate for the Mesa stable branch. llvm-svn: 175096
* s/grep/FileCheck/ in some testsEli Bendersky2013-02-132-3/+5
| | | | llvm-svn: 175093
* s/grep/FileCheck/ in some testsEli Bendersky2013-02-135-6/+16
| | | | llvm-svn: 175089
* Bug fix 13622: Add paired register support for inline asm with 64-bit data ↵Weiming Zhao2013-02-132-2/+55
| | | | | | on ARM llvm-svn: 175088
* [ms-inline asm] Fix up test case for non-Darwin platforms.Chad Rosier2013-02-131-1/+1
| | | | llvm-svn: 175087
* Hexagon: Use absolute addressing mode loads/stores for global+offset Jyotsna Verma2013-02-132-0/+86
| | | | | | instead of redefining separate instructions for them. llvm-svn: 175086
* [ms-inline-asm] Add support for memory references that have non-immediateChad Rosier2013-02-131-0/+23
| | | | | | | displacements. rdar://12974533 llvm-svn: 175083
* For Mips 16, add the optimization where the 16 bit form of addiu sp can be usedReed Kotler2013-02-131-0/+31
| | | | | | | | | | if the offset fits in 11 bits. This makes use of the fact that the abi requires sp to be 8 byte aligned so the actual offset can fit in 8 bits. It will be shifted left and sign extended before being actually used. The assembler or direct object emitter will shift right the 11 bit signed field by 3 bits. We don't need to deal with that here. llvm-svn: 175073
* Clean up LDV, no functionality change.Manman Ren2013-02-131-1/+1
| | | | | | | | Remove dead functions: renameRegister Move private member variables from LDV to Impl Remove ssp/uwtable from testing case llvm-svn: 175072
* PR14992 - Tablegen incorrectly converts ARM tLDMIA_UPD pseudo to tLDMIADavid Peixotto2013-02-131-0/+28
| | | | | | | Fixed bug in tablegen conversion when source pseudo instruction has a different number of arguments than the destination instruction. llvm-svn: 175066
* X86: Disable generation of rep;movsl when %esi is used as a base pointer.Benjamin Kramer2013-02-131-0/+18
| | | | | | | | | | | This happens when there is both stack realignment and a dynamic alloca in the function. If we overwrite %esi (rep;movsl uses fixed registers) we'll lose the base pointer and the next register spill will write into oblivion. Fixes PR15249 and unbreaks firefox on i386/freebsd. Mozilla uses dynamic allocas and freebsd a 4 byte stack alignment. llvm-svn: 175057
* Make jumptables work for -staticReed Kotler2013-02-131-0/+71
| | | | llvm-svn: 175044
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