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* [X86][SSE] Added extra extractelement testsSimon Pilgrim2016-05-151-29/+288
| | | | | | | | | | Added constant index tests for all 256-bit integer vector types (touching lower / upper 128-bits) Added variable index tests for all 256-bit integer vector types Added out-of-range index tests for all 256-bit integer vector types llvm-svn: 269600
* regenerate checksSanjay Patel2016-05-151-10/+16
| | | | llvm-svn: 269596
* [X86][SSE] Regenerate extractelement testsSimon Pilgrim2016-05-151-22/+98
| | | | | | Added SSE2/AVX2 target tests llvm-svn: 269595
* [CostModel][X86] Added scalar bitreverse testsSimon Pilgrim2016-05-151-0/+51
| | | | llvm-svn: 269594
* Vector GEP - fixed a crash on InstSimplify Pass.Elena Demikhovsky2016-05-151-0/+9
| | | | | | | | Vector GEP with mixed (vector and scalar) indices failed on the InstSimplify Pass when all indices are constants. Differential revision http://reviews.llvm.org/D20149 llvm-svn: 269590
* [AVX512] Make the permd intrinsics take a 32-bit immediate to match the ↵Craig Topper2016-05-142-20/+20
| | | | | | software spec. llvm-svn: 269579
* ARM: support export directives for WindowsSaleem Abdulrasool2016-05-141-0/+75
| | | | | | | | | | It seems that cl will emit the export directives for Windows ARM targets. The fact that it did this had originally been missed and this functionality was never implemented. This makes it possible to rely solely on the source code for indicating what the exported interfaces are and brings us more compatibility with cl. llvm-svn: 269574
* Fixed lowering of _comi_ intrinsics from all sets - SSE/SSE2/AVX/AVX-512Elena Demikhovsky2016-05-144-135/+174
| | | | | | Differential revision http://reviews.llvm.org/D19261 llvm-svn: 269569
* Revert "[llc] New diagnostic handler"Renato Golin2016-05-1427-32/+32
| | | | | | | | | | | | This reverts commit r269563. Even though now it passes all LLDB bots after a local fix, there's a new buildbot it fails with tests that we hadn't seen locally: http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules/builds/15647 Adding those tests to the list to investigate. llvm-svn: 269568
* Re-enable llvm/test/ThinLTO/X86/cache.ll.NAKAMURA Takumi2016-05-141-3/+0
| | | | | | | | This reverts; r269548, "XFAIL ThinLTO Caching test on Windows." r269561, "Rework r269548, "XFAIL ThinLTO Caching test on Windows.", not to use XFAIL, for now." llvm-svn: 269567
* Revert changes after test commit.Dima Stepanov2016-05-141-0/+1
| | | | llvm-svn: 269564
* [llc] New diagnostic handlerRenato Golin2016-05-1427-32/+32
| | | | | | | | | | | | | | | | | | | | | | Without a diagnostic handler installed, llc's behaviour is to exit on the first error that it encounters. This is very different from the behaviour of clang and other front ends, which try to gather as many errors as possible before exiting. This commit adds a diagnostic handler to llc, allowing it to find and report more than one error. The old behaviour is preserved under a flag (-exit-on-error). Some of the tests fail with the new diagnostic handler, so they have to use the new flag in order to run under the previous behaviour. Some of these are known bugs, others need further investigation. Ideally, we should fix the tests and remove the flag at some point in the future. Reapplied after fixing the LLDB build that was broken due to the new DiagnosticSeverity in LLVMContext.h. Patch by Diana Picus. llvm-svn: 269563
* Rework r269548, "XFAIL ThinLTO Caching test on Windows.", not to use XFAIL, ↵NAKAMURA Takumi2016-05-141-1/+1
| | | | | | | | for now. It was passing (and is XPASSing) with --host=linux --target=win32. llvm-svn: 269561
* [mips] Enable IAS by default for 32-bit MIPS targets (O32).Daniel Sanders2016-05-145-31/+91
| | | | | | | | | | | | | | | | | | | Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 llvm-svn: 269560
* Test commt: remove a blank line.Dima Stepanov2016-05-141-1/+0
| | | | llvm-svn: 269558
* XFAIL ThinLTO Caching test on Windows.Mehdi Amini2016-05-141-0/+3
| | | | | | | I have no idea what's going on on Windows here. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 269548
* Add testing in llvm-lto for ThinLTO caching.Mehdi Amini2016-05-142-0/+27
| | | | | | | Trying to improve code coverage for `make check` From: mehdi_amini <mehdi_amini@91177308-0d34-0410-b5e6-96231b3b80d8> llvm-svn: 269545
* Revert "Add testing in llvm-lto for ThinLTO caching."Mehdi Amini2016-05-142-29/+0
| | | | | | | | This reverts commit r269538 and r269542. "rename()" is expected to fail across filesystems, will handle this. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 269543
* Increase verbosity in the test output to help debugging windows issuesMehdi Amini2016-05-141-1/+3
| | | | | From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 269542
* Add testing in llvm-lto for ThinLTO caching.Mehdi Amini2016-05-142-0/+27
| | | | | | | Trying to improve code coverage for `make check` From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 269538
* [WebAssembly] Fix legalization of i128 shifts.Dan Gohman2016-05-141-0/+280
| | | | | | | | compiler-rt/libgcc shift routines expect the shift count to be an i32, so use i32 as the shift count for shifts that are legalized to libcalls. This also reverts r268991, now that the signatures are correct. llvm-svn: 269531
* [AVX512] Fix types for pshufd intrinsics. The immediate is the second ↵Craig Topper2016-05-143-47/+48
| | | | | | | | argument and the mask is the 4th argument. Also move the 128/256 tests to the right test file. Prior to this the immediate was a strange 16-bits and the 512-bit intrinsic couldn't receive the full 16 mask bits it needs. llvm-svn: 269526
* [codeview] Add type stream merging prototypeReid Kleckner2016-05-143-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This code is intended to be used as part of LLD's PDB writing. Until that exists, this is exposed via llvm-readobj for testing purposes. Type stream merging uses the following algorithm: - Begin with a new empty stream, and a new empty hash table that maps from type record contents to new type index. - For each new type stream, maintain a map from source type index to destination type index. - For each record, copy it and rewrite its type indices to be valid in the destination type stream. - If the new type record is not already present in the destination stream hash table, append it to the destination type stream, assign it the next type index, and update the two hash tables. - If the type record already exists in the destination stream, discard it and update the type index map to forward the source type index to the existing destination type index. Reviewers: zturner, ruiu Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D20122 llvm-svn: 269521
* [MSan] [PowerPC] Implement PowerPC64 vararg helper.Marcin Koscielnicki2016-05-132-0/+210
| | | | | | Differential Revision: http://reviews.llvm.org/D20000 llvm-svn: 269518
* [PM] Port LowerAtomic to the new pass manager.Davide Italiano2016-05-131-0/+1
| | | | llvm-svn: 269511
* [LAA] Include MaxSafeDepDistBytes in the analysis print-outAdam Nemet2016-05-131-0/+37
| | | | llvm-svn: 269508
* Revert "Revert "[Unroll] Implement a conservative and monotonically ↵Michael Zolotukhin2016-05-133-2/+40
| | | | | | | | | | increasing cost tracking system during the full unroll heuristic analysis that avoids counting any instruction cost until that instruction becomes "live" through a side-effect or use outside the..."" This reverts commit r269395. Try to reapply with a fix from chapuni. llvm-svn: 269486
* pdbdump: Print "Publics" stream.Rui Ueyama2016-05-131-1/+8
| | | | | | | | | | | | | | | | Publics stream seems to contain information as to public symbols. It actually contains a serialized hash table along with fixed-sized headers. This patch is not complete. It scans only till the end of the stream and dump the header information. I'll write code to de-serialize the hash table later. Reviewers: zturner Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D20256 llvm-svn: 269484
* AMDGPU/R600: Fold global address operandJan Vesely2016-05-131-0/+4
| | | | | | | | | | Reviewers: tstellard Subscribers: arsenm Differential Revision: http://reviews.llvm.org/D19793 llvm-svn: 269480
* AMDGPU/R600: Implement memory loads from constant ASJan Vesely2016-05-132-71/+19
| | | | | | | | | | Reviewers: tstellard Subscribers: arsenm Differential Revision: http://reviews.llvm.org/D19792 llvm-svn: 269479
* Disable test from r269436 on unsupported platformsSteven Wu2016-05-131-0/+3
| | | | | | | | Fixing bots failure. test/ExecutionEngine/RuntimeDyld/SystemZ/cfi-relo-pc64.s requires SystemZ backend. Mark the test as unsupported if the backend is not available. llvm-svn: 269470
* [codeview] Align class and print names of typesReid Kleckner2016-05-133-5/+5
| | | | | | | | | | | | Summary: This way we can get rid of one of the fields in the .def file. Reviewers: llvm-commits Subscribers: zturner Differential Revision: http://reviews.llvm.org/D20251 llvm-svn: 269461
* ARM: use callee-saved list in the order they're actually saved.Tim Northover2016-05-131-0/+12
| | | | | | | | | When setting the frame pointer, the offset from SP is calculated based on the stack slot it gets allocated, but this slot is in turn based on the order of the CSR list so that list should match the order we actually save the registers in. Mostly it did, but in the edge-case of MachO AAPCS targets it was wrong. llvm-svn: 269459
* [Hexagon] Remove dead nodes from SelectionDAG to avoid cyclesKrzysztof Parzyszek2016-05-131-0/+18
| | | | | | | | Recent changes to the instruction selection code exposed a problem where a dead node was not removed on time. This node had both input and output chains, which lead to an apparent cycle. llvm-svn: 269458
* [AMDGPU] Update nop insertion for debugger usageKonstantin Zhuravlyov2016-05-131-8/+5
| | | | | | | | | - Insert one nop for each high level statement instead of two - Do not insert nop before prologue Differential Revision: http://reviews.llvm.org/D20215 llvm-svn: 269452
* Revert "[ARM,AArch64] NFC. Add extra test cases for bswap lowering."Renato Golin2016-05-132-184/+0
| | | | | | This reverts commit r269425, as it fails on Windows (Thumb only). llvm-svn: 269451
* regenerate checks and add a run to show missed shrinkageSanjay Patel2016-05-131-37/+62
| | | | llvm-svn: 269449
* regenerate checksSanjay Patel2016-05-131-11/+11
| | | | llvm-svn: 269447
* add support for -print-imm-hex for AArch64Paul Osmialowski2016-05-1349-619/+619
| | | | | | | | | | | | | | | | | | | | | | | | | Most immediates are printed in Aarch64InstPrinter using 'formatImm' macro, but not all of them. Implementation contains following rules: - floating point immediates are always printed as decimal - signed integer immediates are printed depends on flag settings (for negative values 'formatImm' macro prints the value as i.e -0x01 which may be convenient when imm is an address or offset) - logical immediates are always printed as hex - the 64-bit immediate for advSIMD, encoded in "a:b:c:d:e:f:g:h" is always printed as hex - the 64-bit immedaite in exception generation instructions like: brk, dcps1, dcps2, dcps3, hlt, hvc, smc, svc is always printed as hex - the rest of immediates is printed depends on availability of -print-imm-hex Signed-off-by: Maciej Gabka <maciej.gabka@arm.com> Signed-off-by: Paul Osmialowski <pawel.osmialowski@arm.com> Differential Revision: http://reviews.llvm.org/D16929 llvm-svn: 269446
* [codeview] Dump the type index on the first line of each recordReid Kleckner2016-05-133-20/+10
| | | | | | This will make it easier to write FileCheck tests. llvm-svn: 269444
* [obj2yaml] [yaml2obj] Basic support for MachO::load_commandChris Bieneman2016-05-131-0/+81
| | | | | | | | This patch adds basic support for MachO::load_command. Load command types and sizes are encoded in the YAML and expanded back into MachO. The YAML doesn't yet support load command structs, that is coming next. In the meantime as a temporary measure when writing MachO files the load commands are padded with zeros so that the generated binary is valid. llvm-svn: 269442
* [InstCombine] handle zero constant vectors for LE/GE comparisons tooSanjay Patel2016-05-131-0/+37
| | | | | | | | | | | | Enhancement to: http://reviews.llvm.org/rL269426 With discussion in: http://reviews.llvm.org/D17859 This should complete the fixes for: PR26701, PR26819: https://llvm.org/bugs/show_bug.cgi?id=26701 https://llvm.org/bugs/show_bug.cgi?id=26819 llvm-svn: 269439
* [RuntimeDyld] Support R_390_PC64 relocation typeBryan Chan2016-05-132-0/+33
| | | | | | | | | | | | Summary: When the MCJIT generates ELF code, some DWARF data requires 64-bit PC-relative relocation (R_390_PC64). This patch adds support for R_390_PC64 relocation to RuntimeDyld::resolveSystemZRelocation, to avoid an assertion failure. Reviewers: uweigand Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D20033 llvm-svn: 269436
* [MemCpyOpt] Use MaxIntSize in byte instead of bitJun Bum Lim2016-05-131-0/+20
| | | | | | | | | | | | Summary: This change fix the bug in isProfitableToUseMemset() where MaxIntSize shoule be in byte, not bit. Reviewers: arsenm, joker.eph, mcrosier Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D20176 llvm-svn: 269433
* Revert "[llc] New diagnostic handler"Renato Golin2016-05-1327-32/+32
| | | | | | | | This reverts commit r269428, as it breaks the LLDB build. We need to understand how to change LLDB in the same way as LLC before landing this again. llvm-svn: 269432
* [llc] New diagnostic handlerRenato Golin2016-05-1327-32/+32
| | | | | | | | | | | | | | | | | | | Without a diagnostic handler installed, llc's behaviour is to exit on the first error that it encounters. This is very different from the behaviour of clang and other front ends, which try to gather as many errors as possible before exiting. This commit adds a diagnostic handler to llc, allowing it to find and report more than one error. The old behaviour is preserved under a flag (-exit-on-error). Some of the tests fail with the new diagnostic handler, so they have to use the new flag in order to run under the previous behaviour. Some of these are known bugs, others need further investigation. Ideally, we should fix the tests and remove the flag at some point in the future. Patch by Diana Picus. llvm-svn: 269428
* [InstCombine] canonicalize* LE/GE vector integer comparisons to LT/GT ↵Sanjay Patel2016-05-132-1/+125
| | | | | | | | | | | | | | | (PR26701, PR26819) *We don't currently handle the edge case constants (min/max values), so it's not a complete canonicalization. To fully solve the motivating bugs, we need to enhance this to recognize a zero vector too because that's a ConstantAggregateZero which is a ConstantData, not a ConstantVector or a ConstantDataVector. Differential Revision: http://reviews.llvm.org/D17859 llvm-svn: 269426
* [ARM,AArch64] NFC. Add extra test cases for bswap lowering.Renato Golin2016-05-132-0/+184
| | | | | | | | These tests were sitting in Phab for many months. They're good tests and should be in. Patch by Charlie Turner. llvm-svn: 269425
* [X86][AVX512] Moved CHECKs inside functions to stop update_llc_test_checks ↵Simon Pilgrim2016-05-132-161/+150
| | | | | | | | going haywire I'm not going to regenerate these anytime soon but do have some diffs to apply that I'd like to do with update_llc_test_checks llvm-svn: 269420
* Assure calling "cld" instruction in prologue of X86 interrupt handler function.Amjad Aboud2016-05-131-0/+17
| | | | | | Differential Revision: http://reviews.llvm.org/D18725 llvm-svn: 269413
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