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* Implement strip.invariant.groupPiotr Padlewski2018-07-0210-23/+185
| | | | | | | | | | | | | | | | Summary: This patch introduce new intrinsic - strip.invariant.group that was described in the RFC: Devirtualization v2 Reviewers: rsmith, hfinkel, nlopes, sanjoy, amharc, kuhar Subscribers: arsenm, nhaehnle, JDevlieghere, hiraditya, xbolva00, llvm-commits Differential Revision: https://reviews.llvm.org/D47103 Co-authored-by: Krzysztof Pszeniczny <krzysztof.pszeniczny@gmail.com> llvm-svn: 336073
* Add an entry for rodata constant merge sections to the defaultEric Christopher2018-07-021-2/+4
| | | | | | | | | | section flags in the ELF assembler. This matches the defaults given in the rest of MC. Fixes PR37997 where we couldn't assemble our own assembly output without warnings. llvm-svn: 336072
* [X86] Fix a few test names in avx512-intrinsics-fast-isel.ll to match their ↵Craig Topper2018-07-011-8/+8
| | | | | | | | clang intrinsic names. I thought I fixed these yesterday, but I guess I missed a few. llvm-svn: 336071
* [InstCombine] add abs tests with undef elts; NFCSanjay Patel2018-07-011-0/+30
| | | | llvm-svn: 336065
* [PatternMatch] allow undef elements in vectors with m_NegSanjay Patel2018-07-011-5/+3
| | | | | | This is similar to the m_Not change from D44076. llvm-svn: 336064
* [UnrollAndJam] New Unroll and Jam passDavid Green2018-07-015-0/+2482
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a simple implementation of the unroll-and-jam classical loop optimisation. The basic idea is that we take an outer loop of the form: for i.. ForeBlocks(i) for j.. SubLoopBlocks(i, j) AftBlocks(i) Instead of doing normal inner or outer unrolling, we unroll as follows: for i... i+=2 ForeBlocks(i) ForeBlocks(i+1) for j.. SubLoopBlocks(i, j) SubLoopBlocks(i+1, j) AftBlocks(i) AftBlocks(i+1) Remainder Loop So we have unrolled the outer loop, then jammed the two inner loops into one. This can lead to a simpler inner loop if memory accesses can be shared between the now jammed loops. To do this we have to prove that this is all safe, both for the memory accesses (using dependence analysis) and that ForeBlocks(i+1) can move before AftBlocks(i) and SubLoopBlocks(i, j). Differential Revision: https://reviews.llvm.org/D41953 llvm-svn: 336062
* Revert "[llvm-readobj] Fix printing format"Paul Semel2018-07-011-8/+0
| | | | | | | There is a problem with the formatting on windows build. I need to investigate on this. llvm-svn: 336061
* [SLPVectorizer][X86] Add some alternate tests for cast operatorsSimon Pilgrim2018-07-011-0/+169
| | | | | | Alternate opcode handling only supports binary operators, these tests demonstrate missed opportunities to vectorize some sitofp/uitofp and fptosi/fptoui style casts as well as some (successful) float bits manipulations llvm-svn: 336060
* [Evaluator] Improve evaluation of call instructionEugene Leviant2018-07-013-0/+239
| | | | | | Recommit of r335324 after buildbot failure fix llvm-svn: 336059
* [llvm-readobj] Fix printing formatPaul Semel2018-07-011-0/+8
| | | | | | | | | | | | We were printing every character, even those that weren't printable. It doesn't really make sense for this option. The string content was sticked to its address, added two spaces in between. Differential Revision: https://reviews.llvm.org/D48271 llvm-svn: 336058
* [InstCombine] add tests for negate vector with undef elts; NFC Sanjay Patel2018-06-301-3/+27
| | | | llvm-svn: 336050
* [DAGCombiner] Handle correctly non-splat power of 2 -1 divisor (PR37119)Simon Pilgrim2018-06-301-268/+80
| | | | | | | | | | The combine added in commit 329525 overlooked the case where one, but not all, of the divisor elements is -1, -1 is the only power of two value for which the sdiv expansion recipe breaks. Thanks to @zvi for the original patch. Differential Revision: https://reviews.llvm.org/D45806 llvm-svn: 336048
* [X86] Update some avx512 fast-isel tests to match their real clang IRgen.Craig Topper2018-06-302-332/+353
| | | | | | | | | | Especially of note was the test_mm_mask_set1_epi64 and other set1 tests that were truncating the element to be broadcasted to i8 and broadcasting that instead of a whole 64 bit value. Some of the others were just correcting mask sizes on parameters due to bugs in the clang test case they were generated from that have now been fixed. Some were converting i8 to <4 x i1>/<2 x i1> by truncating to i4/i2 and then bitcasting. But the clang codegen is bitcast to <8 x i1>, then extract to <4 x i1>/<2 x i1>. This is likely to incur less trouble from the integer type legalizer in the backend. llvm-svn: 336045
* [X86] Change some chec-prefixes from X32 to X86 to match the FileCheck ↵Craig Topper2018-06-301-48/+48
| | | | | | | | command line. I think this test changed and these test cases were created around the same time and missed the change. llvm-svn: 336044
* [X86] Remove test cases from avx512vl-intrinsics-fast-isel.ll for intrinsics ↵Craig Topper2018-06-301-49/+0
| | | | | | that don't really exist in clang. llvm-svn: 336043
* AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.Tom Stellard2018-06-301-0/+20
| | | | | | | | | | | | | | | | | | | Summary: We could split sizes that are not power of two into smaller sized G_IMPLICIT_DEF instructions, but this ends up generating G_MERGE_VALUES instructions which we then have to handle in the instruction selector. Since G_IMPLICIT_DEF is really a no-op it's easier just to keep everything that can fit into a register legal. Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D48777 llvm-svn: 336041
* [MachineOutliner] Add support for target-default outlining.Jessica Paquette2018-06-301-2/+7
| | | | | | | | | | | | | | | | | This adds functionality to the outliner that allows targets to specify certain functions that should be outlined from by default. If a target supports default outlining, then it specifies that in its TargetOptions. In the case that it does, and the user hasn't specified that they *never* want to outline, the outliner will be added to the pass pipeline and will run on those default functions. This is a preliminary patch for turning the outliner on by default under -Oz for AArch64. https://reviews.llvm.org/D48776 llvm-svn: 336040
* [X86] Remove masking from avx512 rotate intrinsics. Use select in IR instead.Craig Topper2018-06-307-232/+2526
| | | | llvm-svn: 336035
* [instsimplify] Move the instsimplify pass to use more obvious file namesChandler Carruth2018-06-292-2/+2
| | | | | | | | | | | | | | | | and diretory. Also cleans up all the associated naming to be consistent and removes the public access to the pass ID which was unused in LLVM. Also runs clang-format over parts that changed, which generally cleans up a bunch of formatting. This is in preparation for doing some internal cleanups to the pass. Differential Revision: https://reviews.llvm.org/D47352 llvm-svn: 336028
* [WebAssembly] Update comments for non-splat pow2 vector test caseHeejin Ahn2018-06-291-1/+3
| | | | | | | | | | | | | | | | | | | Summary: After rL335727, (sdiv X, 1) is treated as a special case, so we can safely transform 'sdiv's in non-splat pow vectors into 'shr's even when some of its entries are '1'. The test expectations have been already fixed in rL335771, but the comments were out of date. Also changed the filename from `vector_sdiv.ll` to `vector-sdiv.ll` to be consistent with other test file names. Reviewers: RKSimon Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D48692 llvm-svn: 336018
* [HWASan] Do not retag allocas before return from the function.Alex Shlyapnikov2018-06-292-14/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Retagging allocas before returning from the function might help detecting use after return bugs, but it does not work at all in real life, when instrumented and non-instrumented code is intermixed. Consider the following code: F_non_instrumented() { T x; F1_instrumented(&x); ... } { F_instrumented(); F_non_instrumented(); } - F_instrumented call leaves the stack below the current sp tagged randomly for UAR detection - F_non_instrumented allocates its own vars on that tagged stack, not generating any tags, that is the address of x has tag 0, but the shadow memory still contains tags left behind by F_instrumented on the previous step - F1_instrumented verifies &x before using it and traps on tag mismatch, 0 vs whatever tag was set by F_instrumented Reviewers: eugenis Subscribers: srhines, llvm-commits Differential Revision: https://reviews.llvm.org/D48664 llvm-svn: 336011
* Revert "Extend CFGPrinter and CallPrinter with Heat Colors"Sean Fertile2018-06-291-8/+0
| | | | | | This reverts r335996 which broke graph printing in Polly. llvm-svn: 336000
* AMDGPU: Don't use struct type for argument layoutMatt Arsenault2018-06-296-701/+700
| | | | | | | | | | This was introducing unnecessary padding after the explicit arguments, depending on the alignment of the total struct type. Also has the side effect of avoiding creating an extra GEP for the offset from the base kernel argument to the explicit kernel argument offset. llvm-svn: 335999
* [X86] Limit the number of target specific nodes emitted in LowerShiftPartsCraig Topper2018-06-292-42/+22
| | | | | | | | | | The important part is the creation of the SHLD/SHRD nodes. The compare and the conditional move can use target independent nodes that can be legalized on their own. This gives some opportunities to trigger the optimizations present in the lowering for those things. And its just better to limit the number of places we emit target specific nodes. The changed test cases still aren't optimal. Differential Revision: https://reviews.llvm.org/D48619 llvm-svn: 335998
* Extend CFGPrinter and CallPrinter with Heat ColorsSean Fertile2018-06-291-0/+8
| | | | | | | | | | | | | | | Extends the CFGPrinter and CallPrinter with heat colors based on heuristics or profiling information. The colors are enabled by default and can be toggled on/off for CFGPrinter by using the option -cfg-heat-colors for both -dot-cfg[-only] and -view-cfg[-only]. Similarly, the colors can be toggled on/off for CallPrinter by using the option -callgraph-heat-colors for both -dot-callgraph and -view-callgraph. Patch by Rodrigo Caetano Rocha! Differential Revision: https://reviews.llvm.org/D40425 llvm-svn: 335996
* [dsymutil] Make the CachedBinaryHolder the defaultJonas Devlieghere2018-06-291-6/+6
| | | | | | | | Replaces all uses of the old binary holder with its cached variant. Differential revision: https://reviews.llvm.org/D48770 llvm-svn: 335991
* [mips] Support shrink-wrappingPetar Jovanovic2018-06-293-2/+394
| | | | | | | | | | Except for -O0, it's enabled by default. Patch by Vladimir Stefanovic. Differential Revision: https://reviews.llvm.org/D47947 llvm-svn: 335989
* [AMDGPU] Enable LICM in the BE pipelineStanislav Mekhanoshin2018-06-298-32/+289
| | | | | | | | | | This allows to hoist code portion to compute reciprocal of loop invariant denominator in integer division after codegen prepare expansion. Differential Revision: https://reviews.llvm.org/D48604 llvm-svn: 335988
* [MachineOutliner] Add always and never options to -enable-machine-outlinerJessica Paquette2018-06-291-0/+12
| | | | | | | | | | | | | | | | | This is a recommit of r335887, which was erroneously committed earlier. To enable the MachineOutliner by default on AArch64, we need to be able to disable the MachineOutliner and also provide an option to "always" enable the outliner. This adds that capability. It allows the user to still use the old -enable-machine-outliner option, which defaults to "always". This is building up to allowing the user to specify "always" versus the target default outlining behaviour. https://reviews.llvm.org/D48682 llvm-svn: 335986
* [InstCombine] add more tests for shuffle-binop folds; NFCSanjay Patel2018-06-291-1/+73
| | | | | | | The mul+shl tests add coverage for the fold enabled with D48678. The and+or tests are not handled yet; that's D48662. llvm-svn: 335984
* [DEBUG_INFO, NVPTX] Do not emit .debug_loc section.Alexey Bataev2018-06-291-52/+12
| | | | | | | | | | | | | | | Summary: .debug_loc section is not supported for NVPTX target. If there is an object whose location can change during its lifetime, we do not generate debug location info for this variable. Reviewers: echristo Subscribers: jholewinski, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D48730 llvm-svn: 335976
* [InstCombine] enhance shuffle-of-binops to allow different variable ops ↵Sanjay Patel2018-06-291-35/+28
| | | | | | | | | | | | | | | | | | | | | | | (PR37806) This was discussed in D48401 as another improvement for: https://bugs.llvm.org/show_bug.cgi?id=37806 If we have 2 different variable values, then we shuffle (select) those lanes, shuffle (select) the constants, and then perform the binop. This eliminates a binop. The new shuffle uses the same shuffle mask as the existing shuffle, so there's no danger of creating a difficult shuffle. All of the earlier constraints still apply, but we also check for extra uses to avoid creating more instructions than we'll remove. Additionally, we're disallowing the fold for div/rem because that could expose a UB hole. Differential Revision: https://reviews.llvm.org/D48678 llvm-svn: 335974
* Fix overconfident assert in ScalarEvolution::isImpliedViaMergeRoman Shirokiy2018-06-291-0/+127
| | | | | | | | | We can have AddRec with loops having many predecessors. This changes an assert to an early return. Differential Revision: https://reviews.llvm.org/D48766 llvm-svn: 335965
* [AArch64] Armv8.4-A: Virtualization system registersSjoerd Meijer2018-06-292-0/+75
| | | | | | | | This adds the Secure EL2 extension. Differential Revision: https://reviews.llvm.org/D48711 llvm-svn: 335962
* [X86][SSE] Support v16i8/v32i8 vector rotationsSimon Pilgrim2018-06-293-1341/+1130
| | | | | | | | | | This uses the same technique as for shifts - split the rotation into 4/2/1-bit partial rotations and select those partials based on the amount bit, making use of PBLENDVB if available. This halves the use of PBLENDVB compared to expanding to shifts, which can be a slow op. Unfortunately I haven't found a decent way to share much of this code with the shift equivalent. Differential Revision: https://reviews.llvm.org/D48655 llvm-svn: 335957
* SCEVExpander::expandAddRecExprLiterally(): check before casting as InstructionRoman Lebedev2018-06-291-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: An alternative to D48597. Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=37936 | PR37936 ]]. The problem is as follows: 1. `indvars` marks `%dec` as `NUW`. 2. `loop-instsimplify` runs `instsimplify`, which constant-folds `%dec` to -1 (D47908) 3. `loop-reduce` tries to do some further modification, but crashes with an type assertion in cast, because `%dec` is no longer an `Instruction`, If the runline is split into two, i.e. you first run `-indvars -loop-instsimplify`, store that into a file, and then run `-loop-reduce`, there is no crash. So it looks like the problem is due to `-loop-instsimplify` not discarding SCEV. But in this case we can just not crash if it's not an `Instruction`. This is just a local fix, unlike D48597, so there may very well be other problems. Reviewers: mkazantsev, uabelho, sanjoy, silviu.baranga, wmi Reviewed By: mkazantsev Subscribers: evstupac, javed.absar, spatel, llvm-commits Differential Revision: https://reviews.llvm.org/D48599 llvm-svn: 335950
* [X86] Remove masking from the avx512 packed sqrt intrinsics. Use select in ↵Craig Topper2018-06-293-8/+490
| | | | | | | | IR instead. While there improve the coverage of the intrinsic testing and add fast-isel tests. llvm-svn: 335944
* Require x86 for this test.Sterling Augustine2018-06-281-0/+1
| | | | llvm-svn: 335939
* [MachineOutliner] Never add the outliner in -O0Jessica Paquette2018-06-282-1/+31
| | | | | | | | | | | | This is a recommit of r335879. We shouldn't add the outliner when compiling at -O0 even if -enable-machine-outliner is passed in. This makes sure that we don't add it in this case. This also removes -O0 from the outliner DWARF test. llvm-svn: 335930
* [InstCombine] adjust shuffle tests; NFCSanjay Patel2018-06-281-5/+5
| | | | | | Use xor for the extra uses test because div/rem have other problems. llvm-svn: 335924
* [llvm-readobj] Add experimental support for SHT_RELR sectionsJake Ehrlich2018-06-283-0/+182
| | | | | | | | | | | | | | | This change adds experimental support for SHT_RELR sections, proposed here: https://groups.google.com/forum/#!topic/generic-abi/bX460iggiKg Definitions for the new ELF section type and dynamic array tags, as well as the encoding used in the new section are all under discussion and are subject to change. Use with caution! Author: rahulchaudhry Differential Revision: https://reviews.llvm.org/D47919 llvm-svn: 335922
* [COFF] Fix constant sharing regression for MinGWMartin Storsjo2018-06-281-0/+9
| | | | | | | | | | This fixes a regression since SVN r334523, where the object files built targeting MinGW were rejected by GNU binutils tools. Prior to that commit, we only put constants in comdat for MSVC configurations. Differential Revision: https://reviews.llvm.org/D48567 llvm-svn: 335918
* [ThinLTO] Port InlinerFunctionImportStats handling to new PMTeresa Johnson2018-06-281-0/+5
| | | | | | | | | | | | | | Summary: The InlinerFunctionImportStats will collect and dump stats regarding how many function inlined into the module were imported by ThinLTO. Reviewers: wmi, dexonsmith Subscribers: mehdi_amini, inglorion, llvm-commits, eraman Differential Revision: https://reviews.llvm.org/D48729 llvm-svn: 335914
* [ARM] Add missing Thumb2 assembler diagnostics.Eli Friedman2018-06-284-28/+114
| | | | | | | | | | Mostly just adding checks for Thumb2 instructions which correspond to ARM instructions which already had diagnostics. While I'm here, also fix ARM-mode strd to check the input registers correctly. Differential Revision: https://reviews.llvm.org/D48610 llvm-svn: 335909
* Some targets don't have lld built, so just use a binary copySterling Augustine2018-06-282-3/+1
| | | | | | of the input file. llvm-svn: 335908
* [SROA] Preserve DebugLoc when rewriting alloca partitionsAnastasis Grammenos2018-06-281-0/+9
| | | | | | | | | When rewriting an alloca partition copy the DL from the old alloca over the the new one. Differential Revision: https://reviews.llvm.org/D48640 llvm-svn: 335904
* Handle absolute symbols as branch targets in disassembly.Sterling Augustine2018-06-281-0/+4
| | | | | | https://reviews.llvm.org/D48554 llvm-svn: 335903
* [Debugify] Do not report line 0 locations as errorsVedant Kumar2018-06-281-0/+31
| | | | | | | | | | The checking logic should not treat artificial locations as being somehow problematic. Producing these locations can be the desired behavior of some passes. See llvm.org/PR37961. llvm-svn: 335897
* [X86] Suppress load folding into and/or/xor if it will prevent matching ↵Craig Topper2018-06-281-68/+42
| | | | | | | | | | btr/bts/btc. This is a follow up to r335753. At the time I forgot about isProfitableToFold which makes this pretty easy. Differential Revision: https://reviews.llvm.org/D48706 llvm-svn: 335895
* Revert "Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC ↵Jonas Devlieghere2018-06-286-416/+10
| | | | | | | | | | | | | code models"" Reverting because this is causing failures in the LLDB test suite on GreenDragon. LLVM ERROR: unsupported relocation with subtraction expression, symbol '__GLOBAL_OFFSET_TABLE_' can not be undefined in a subtraction expression llvm-svn: 335894
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