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* PowerPC inline asm was emitting two output operandsDale Johannesen2009-08-181-0/+22
| | | | | | | | | for a single "m" constraint; this is wrong because the opcode of a load or store would have to change in parallel. This patch makes it always compute addresses into a register, which is correct but not as efficient as possible. 7144566. llvm-svn: 79292
* Add prefix only if it is needed.Devang Patel2009-08-171-0/+30
| | | | llvm-svn: 79289
* Test the pass the test is actually for, instead of one that doesn't exist.Nick Lewycky2009-08-171-1/+1
| | | | llvm-svn: 79257
* Don't crash on critical edge. Patch by Andre Tavares.Nick Lewycky2009-08-171-0/+15
| | | | llvm-svn: 79252
* Update getSectionForConstant() to to allow mergable sections to be nulled outRichard Osborne2009-08-171-0/+11
| | | | | | if not supported by the ELF subtarget. llvm-svn: 79249
* XFAIL this test since the fix was reverted.Duncan Sands2009-08-171-0/+1
| | | | llvm-svn: 79235
* Add a test that shows that SSI is working correctly.Nick Lewycky2009-08-171-0/+22
| | | | llvm-svn: 79230
* Don't crash trying to promote VLAs.Nick Lewycky2009-08-171-0/+23
| | | | llvm-svn: 79226
* Expose creating constant ints and floats from strings to ocaml.Erick Tryzelaar2009-08-161-0/+12
| | | | llvm-svn: 79214
* Fix for PR3016: detect the tricky case, where there are Eli Friedman2009-08-161-1/+0
| | | | | | | | | | | | | | | | unfoldable references to a PHI node in the block being folded, and disable the transformation in that case. The correct transformation of such PHI nodes depends on whether BB dominates Succ, and dominance is expensive to compute here. (Alternatively, it's possible to check whether any uses are live, but that's also essentially a dominance calculation. Another alternative is to use reg2mem, but it probably isn't a good idea to use that in simplifycfg.) Also, remove some incorrect code from CanPropagatePredecessorsForPHIs which is made unnecessary with this patch: it didn't consider the case where a PHI node in BB has multiple uses. llvm-svn: 79174
* Fix test on Linux.Eli Friedman2009-08-151-1/+1
| | | | llvm-svn: 79140
* Reapply r79127. It was fixed by d0k.Bill Wendling2009-08-151-12/+27
| | | | llvm-svn: 79136
* Revert r79127. It was causing compilation errors.Bill Wendling2009-08-151-27/+12
| | | | llvm-svn: 79135
* SSI construction should just go ahead and ignore instructions in unreachableNick Lewycky2009-08-151-0/+19
| | | | | | blocks. llvm-svn: 79132
* Change allowsUnalignedMemoryAccesses to take type argument since some targetsEvan Cheng2009-08-151-12/+27
| | | | | | | | | | support unaligned mem access only for certain types. (Should it be size instead?) ARM v7 supports unaligned access for i16 and i32, some v6 variants support it as well. llvm-svn: 79127
* implement support for CHECK-NEXT: in filecheck.Chris Lattner2009-08-151-10/+10
| | | | llvm-svn: 79123
* Refine EarlyClobber assert in register scavenger.Jakob Stoklund Olesen2009-08-151-0/+42
| | | | | | | | | | | | | | It is legal for an inline asm operand to use an earlyclobber register if the use operand is tied to the earlyclobber operand. The issue is discussed here: http://gcc.gnu.org/ml/gcc/1999-04n/msg00431.html We should perhaps let only the machine code verifier worry about these finer details. EarlyClobber operands are not really interesting to the scavenger. This fixes PR4528 for the third time. llvm-svn: 79122
* specify a target triple so global variable manglings are consistent etc.Chris Lattner2009-08-151-1/+2
| | | | llvm-svn: 79118
* convert to filecheck.Chris Lattner2009-08-151-3/+18
| | | | llvm-svn: 79117
* rename this test to sse2.llChris Lattner2009-08-151-0/+0
| | | | llvm-svn: 79116
* merge a bunch more sse3 tests into sse3.llChris Lattner2009-08-1511-174/+252
| | | | llvm-svn: 79115
* convert test to filecheck format.Chris Lattner2009-08-151-7/+17
| | | | llvm-svn: 79114
* rename testChris Lattner2009-08-151-0/+0
| | | | llvm-svn: 79113
* this is a test for sse3, simplify it.Chris Lattner2009-08-151-1/+1
| | | | llvm-svn: 79112
* Don't setCalleeSavedInfoValid() until spills are interted.Jakob Stoklund Olesen2009-08-151-0/+10
| | | | | | | | | | In a naked function, the flag is never set and getPristineRegs() returns an empty list. That means naked functions are able to clobber callee saved registers, but that is the whole point of naked functions. This fixes PR4716. llvm-svn: 79096
* Add XFAIL testcase for setcc undef.Jakob Stoklund Olesen2009-08-151-0/+17
| | | | llvm-svn: 79093
* Add XFAIL test case for a scavenger assert.Jakob Stoklund Olesen2009-08-151-0/+20
| | | | llvm-svn: 79092
* Update LocalRewriter::DistanceMap when inserting stack loads.Jakob Stoklund Olesen2009-08-151-0/+25
| | | | | | | | In the included test case, a stack load was not included in DistanceMap. That caused TransferDeadness to ignore the instruction, leading to a scavenger assert. llvm-svn: 79090
* Fix tests.Evan Cheng2009-08-152-2/+2
| | | | llvm-svn: 79086
* Turn on if-conversion for thumb2.Evan Cheng2009-08-153-0/+189
| | | | llvm-svn: 79084
* use XCore-specific section with xcore specific cp/dp flags to restore Chris Lattner2009-08-152-2/+0
| | | | | | | | support for globals going into the appropriate sections with the flags. This hopefully finishes unbreaking the previous behavior that I broke before. llvm-svn: 79079
* On x86-64, for a varargs function, don't store the xmm registers toDan Gohman2009-08-151-0/+20
| | | | | | | the register save area if %al is 0. This avoids touching xmm regsiters when they aren't actually used. llvm-svn: 79061
* Leaf functions which do not save CSRs can be frameless even with ↵Evan Cheng2009-08-141-0/+6
| | | | | | -disable-fp-elim. llvm-svn: 79039
* llvm-mc: Fix bugs where bytes were unintentionally being printed as signed.Daniel Dunbar2009-08-141-1/+2
| | | | | | | - We now print all of 403.gcc cleanly (llvm-mc -> 'as' as diffed to 'as'), minus two 'rep;movsl' instructions (which I missed before). llvm-svn: 79031
* llvm-mc: When handling a .set, make sure to print subsequent references to theDaniel Dunbar2009-08-141-2/+8
| | | | | | | | symbol as the symbol name itself, not the expression it was defined to. These have different semantics due to the quirky .set behavior (which absolutizes an expression that would otherwise be treated as a relocation). llvm-svn: 79025
* llvm-mc: zerofill shouldn't print quotes around the section,segment.Daniel Dunbar2009-08-141-3/+3
| | | | llvm-svn: 79017
* Also shrink immediate branches; also more assembler workarounds.Evan Cheng2009-08-142-6/+77
| | | | llvm-svn: 79014
* llvm-mc: Support escaped characters in string literals (for .ascii and .asciz)Daniel Dunbar2009-08-141-2/+26
| | | | llvm-svn: 79010
* Properly handle indirect win64 args when they're passed in memoryAnton Korobeynikov2009-08-141-0/+57
| | | | llvm-svn: 79009
* Take another shot at disabling this when no ppc support is available.Daniel Dunbar2009-08-141-2/+1
| | | | llvm-svn: 79003
* Update llvm-mc / MCAsmStreamer to print the instruction using the actual targetDaniel Dunbar2009-08-143-41/+63
| | | | | | | | | | | specific printer (this only works on x86, for now). - This makes it possible to do some correctness checking of the parsing and matching, since we can compare the results of 'as' on the original input, to those of 'as' on the output from llvm-mc. - In theory, we could now have an easy ATT -> Intel syntax converter. :) llvm-svn: 78986
* Shrink ADR and LDR from constantpool late during constantpool island pass.Evan Cheng2009-08-141-1/+1
| | | | llvm-svn: 78970
* Mark this test as requiring the powerpc target.Daniel Dunbar2009-08-131-0/+3
| | | | llvm-svn: 78961
* Remove HasCrazyBSS and add a flag in TAI to indicate that '.section' Bruno Cardoso Lopes2009-08-131-0/+8
| | | | | | must be emitted for PowerPC-Linux '.bss' section llvm-svn: 78958
* Revert 78892 and 78895, these break generating working executables onDaniel Dunbar2009-08-131-1/+0
| | | | | | | | | | | | | | | | | | | | | x86_64-apple-darwin10. --- Reverse-merging r78895 into '.': U test/CodeGen/PowerPC/2008-12-12-EH.ll U lib/Target/DarwinTargetAsmInfo.cpp --- Reverse-merging r78892 into '.': U include/llvm/Target/DarwinTargetAsmInfo.h U lib/Target/X86/X86TargetAsmInfo.cpp U lib/Target/X86/X86TargetAsmInfo.h U lib/Target/ARM/ARMTargetAsmInfo.h U lib/Target/ARM/ARMTargetMachine.cpp U lib/Target/ARM/ARMTargetAsmInfo.cpp U lib/Target/PowerPC/PPCTargetAsmInfo.cpp U lib/Target/PowerPC/PPCTargetAsmInfo.h U lib/Target/PowerPC/PPCTargetMachine.cpp G lib/Target/DarwinTargetAsmInfo.cpp llvm-svn: 78919
* reintroduce support for Mips "small" section handling. This is Chris Lattner2009-08-131-0/+32
| | | | | | | implemented somewhat differently than before, but it should have the same functionality and the previous testcase passes again. llvm-svn: 78900
* tPOP_RET now has predicate operands.Evan Cheng2009-08-131-0/+737
| | | | llvm-svn: 78898
* fix typo, add 10.6 version of test for my previous patch.Chris Lattner2009-08-131-0/+1
| | | | llvm-svn: 78895
* It's ok to spill a tGPR register as long as it's still allocated a low register.Evan Cheng2009-08-131-0/+40
| | | | llvm-svn: 78893
* When InstCombine simplifies a load -> extract element to gep -> load, placeMon P Wang2009-08-131-0/+23
| | | | | | | the new load by the old load instead of by the extract element because a store could have occurred between the load and extract element. llvm-svn: 78891
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