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* ORN and BIC tests.David Goodwin2009-06-263-3/+16
| | | | llvm-svn: 74289
* Currently there is a pattern for the thumb-2 MOV 16-bit immediate ↵David Goodwin2009-06-262-0/+41
| | | | | | | | instruction. That instruction cannot write the flags so it should use T2I instead of T2sI. Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate. llvm-svn: 74288
* Fix tests: Count -> count.Evan Cheng2009-06-262-2/+2
| | | | llvm-svn: 74282
* Fix a CodeGenDAGPatterns bug. Check if top level predicates match when it's ↵Evan Cheng2009-06-262-0/+26
| | | | | | looking for duplicates. llvm-svn: 74276
* Clarify how to configure llvm-gcc-4.2 for use withShantonu Sen2009-06-261-0/+4
| | | | | | | | | test suite. Remove documentation for --with-f2c, which is no longer supported. Remove information about obtaining tcl/expect, which ship with Mac OS X by default since 10.4. llvm-svn: 74271
* Let's ignore MDStrings also!Devang Patel2009-06-261-1/+3
| | | | llvm-svn: 74255
* Fix spelling of 'count'Daniel Dunbar2009-06-261-1/+1
| | | | llvm-svn: 74249
* Fix LCSSA to avoid emitting a PHI node for the unwind destination ofDan Gohman2009-06-261-0/+143
| | | | | | | an invoke instruction, since the value isn't really live across that edge. llvm-svn: 74242
* Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry ↵Evan Cheng2009-06-252-4/+4
| | | | | | bit def is not used. llvm-svn: 74228
* Use MVN for ~t2_so_imm immediates.David Goodwin2009-06-251-0/+27
| | | | llvm-svn: 74223
* MC: Parse .org directives.Daniel Dunbar2009-06-251-0/+11
| | | | llvm-svn: 74218
* Don't grep the -debug output. This isn't the way to test changes.Bill Wendling2009-06-251-1/+0
| | | | llvm-svn: 74211
* MC: Parse .set and assignments.Daniel Dunbar2009-06-252-0/+14
| | | | llvm-svn: 74208
* down with unwind info :)Chris Lattner2009-06-251-1/+1
| | | | llvm-svn: 74206
* ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and ↵Evan Cheng2009-06-252-0/+32
| | | | | | SBCS / RSCS. llvm-svn: 74200
* No need to code gen MDNodesDevang Patel2009-06-251-0/+2
| | | | llvm-svn: 74150
* Add Thumb2 pc relative add.Evan Cheng2009-06-242-0/+64
| | | | llvm-svn: 74141
* Basic .s parsing for .asci[iz], .fill, .space, {.byte, .short, ... }Daniel Dunbar2009-06-245-0/+71
| | | | | | | - Includes some DG tests in test/MC/AsmParser, which are rather primitive since we don't have a -verify mode yet. llvm-svn: 74139
* We should run these tests as well.Evan Cheng2009-06-242-0/+10
| | | | llvm-svn: 74121
* unwind info not needed.Chris Lattner2009-06-241-1/+1
| | | | llvm-svn: 74112
* Simplify [su]max(MAX, n) to MAX. This comes up in loop tripcountDan Gohman2009-06-242-3/+66
| | | | | | | | | computations in loops with multiple exits. Adjust the testcase for PR4436 so that the relevant portion isn't optimized away. llvm-svn: 74073
* When inserting code into a loop preheader, insert it before theDan Gohman2009-06-241-0/+61
| | | | | | | | terminator, instead of after the last phi. This fixes a bug exposed by ScalarEvolution analyzing more kinds of loops. This fixes PR4436. llvm-svn: 74072
* Move thumb and thumb2 tests into separate directories.Evan Cheng2009-06-2444-54/+437
| | | | llvm-svn: 74068
* Fix support for inline asm input / output operand tying when operand spans ↵Evan Cheng2009-06-241-0/+19
| | | | | | across multiple registers (e.g. two i64 operands in 32-bit mode). llvm-svn: 74053
* Add a testcase demoing some of ScalarEvolution's new trip count logic.Dan Gohman2009-06-241-0/+37
| | | | llvm-svn: 74049
* Extend ScalarEvolution's multiple-exit support to compute exactDan Gohman2009-06-241-1/+1
| | | | | | | | | | | | | | | trip counts in more cases. Generalize ScalarEvolution's isLoopGuardedByCond code to recognize And and Or conditions, splitting the code out into an isNecessaryCond helper function so that it can evaluate Ands and Ors recursively, and make SCEVExpander be much more aggressive about hoisting instructions out of loops. test/CodeGen/X86/pr3495.ll has an additional instruction now, but it appears to be due to an arbitrary register allocation difference. llvm-svn: 74048
* upgradeDevang Patel2009-06-231-28/+28
| | | | llvm-svn: 74016
* Proper patterns for thumb2 shift and rotate instructions.Evan Cheng2009-06-231-1/+1
| | | | llvm-svn: 73987
* The correct values here (as defined by gcc-4.2) areDale Johannesen2009-06-232-0/+15
| | | | | | different for ppc; add another version of the test. llvm-svn: 73983
* This test only works on ppc32 if some optimization is done beforeDale Johannesen2009-06-231-1/+1
| | | | | | | | | | generating LLVM IR; it is correct in the code as written to use 8-byte-aligned operations to copy Key in bar. Formerly the gcc inliner was run, now it isn't. I don't think it's possible to preserve this as a pure FE test. Adding -O2 lets the llvm optimizers get rid of the 8-byte-aligned stores, at least. llvm-svn: 73981
* See test. Judging from PR 1278, at the time the test was committed, theDale Johannesen2009-06-231-1/+1
| | | | | | | | | | | | | | | generated code was apparently doing stores directly into the return value aggregate; now, it's doing a copy from a compiler-generated static object. That object is initialized using [4 x i8] which breaks the test. I believe this change preserves the original point of the test. Of course it would be better for the code to do stores directly into the return aggregate, but that is not what happens at -O0; the llvm optimizers seem to do that on x86 but not on ppc32, possibly because of the explicit padding (which is unavoidable). I think it must have been being done by a gcc optimizer pass before. llvm-svn: 73972
* Fix a bug in the trip-count computation with And/Or. If either of theDan Gohman2009-06-221-0/+150
| | | | | | sides is CouldNotCompute, the resulting exact count must be CouldNotCompute. llvm-svn: 73920
* Add support for ARM's Advanced SIMD (NEON) instruction set.Bob Wilson2009-06-2288-0/+6904
| | | | | | | This is still a work in progress but most of the NEON instruction set is supported. llvm-svn: 73919
* Fix llvm::ComputeNumSignBits to handle pointer typesDan Gohman2009-06-221-0/+220
| | | | | | conservatively correctly, instead of aborting. llvm-svn: 73908
* It's coalescer, not coaleser.Evan Cheng2009-06-221-0/+0
| | | | llvm-svn: 73902
* For Darwin on ARMv6 and newer, make register r9 available for use as aBob Wilson2009-06-221-1/+4
| | | | | | caller-saved register. llvm-svn: 73901
* Fix another register coalescer crash: forgot to check if the instruction ↵Evan Cheng2009-06-221-0/+43
| | | | | | being updated has already been coalesced. llvm-svn: 73898
* hasFP should return true if frame address is taken.Evan Cheng2009-06-221-0/+12
| | | | llvm-svn: 73893
* Testcase for (llvm-gcc) 73873. Usually Dale Johannesen2009-06-221-0/+32
| | | | | | | | std::pair<double, float*> is 16 bytes on darwin-powerpc, but not always. See testcase for full weirdness. llvm-svn: 73874
* Teach ScalarEvolution how to analyze loops with multiple exitDan Gohman2009-06-221-0/+48
| | | | | | | | | blocks, and also exit blocks with multiple conditions (combined with (bitwise) ands and ors). It's often infeasible to compute an exact trip count in such cases, but a useful upper bound can often be found. llvm-svn: 73866
* Fix ScalarEvolution's backedge-taken count computations to check forDan Gohman2009-06-213-4/+15
| | | | | | | | overflow when computing a integer division to round up. Thanks to Nick Lewycky for noticing this! llvm-svn: 73862
* Fix PR4185.Rafael Espindola2009-06-211-0/+10
| | | | | | Handle FpSET_ST0_80 being used when ST0 is still alive. llvm-svn: 73850
* Expand this test to handle more cases (remainder and shifts) of zero.Nick Lewycky2009-06-211-0/+11
| | | | llvm-svn: 73839
* implement PR4424: 0/x is always 0 for integer division.Chris Lattner2009-06-211-0/+12
| | | | llvm-svn: 73835
* change TLS_ADDR lowering to lower to a real mem operand, instead of matching asChris Lattner2009-06-204-4/+4
| | | | | | | | | | | | a global with that gets printed with the :mem modifier. All operands to lea's should be handled with the lea32mem operand kind, and this allows the TLS stuff to do this. There are several better ways to do this, but I went for the minimal change since I can't really test this (beyond make check). This also makes the use of EBX explicit in the operand list in the 32-bit, instead of implicit in the instruction. llvm-svn: 73834
* no need for unwind infoChris Lattner2009-06-201-1/+1
| | | | llvm-svn: 73832
* no need for unwind info here.Chris Lattner2009-06-201-1/+1
| | | | llvm-svn: 73831
* Fix PR4419: handle defs of partial uses.Evan Cheng2009-06-201-0/+30
| | | | llvm-svn: 73816
* Tweak this test to be a little less unusual.Dan Gohman2009-06-201-2/+2
| | | | llvm-svn: 73808
* Generalize isLoopGuardedByCond's checking to consider twoDan Gohman2009-06-201-0/+107
| | | | | | | | | | SCEVUnknowns with identical Instructions to be equal. This allows it to analze cases such as the attached testcase, where the front-end has cloned the loop controlling expression. Along with r73805, this lets IndVarSimplify eliminate all the sign-extend casts in the loop in the attached testcase. llvm-svn: 73807
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