summaryrefslogtreecommitdiffstats
path: root/llvm/test
Commit message (Collapse)AuthorAgeFilesLines
* FileCheck: dump command line context with empty inputXinliang David Li2016-05-271-0/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D20716 llvm-svn: 271047
* Revert "[MC] Support symbolic expressions in assembly directives"Petr Hosek2016-05-273-47/+28
| | | | | | This reverts commit r271028, it causes the directive_fill.s to fail. llvm-svn: 271038
* [GVN] Preserve !range metadata when PRE'ing loadsSanjoy Das2016-05-271-0/+24
| | | | | | | | | | Reviewers: dberlin, reames, george.burgess.iv Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D20743 llvm-svn: 271034
* [X86] Detect SAD patterns and emit psadbw instructions.Michael Kuperstein2016-05-271-0/+1094
| | | | | | | | This recommits r267649 with a fix for PR27539. Differential Revision: http://reviews.llvm.org/D20598 llvm-svn: 271033
* [MC] Support symbolic expressions in assembly directivesPetr Hosek2016-05-273-28/+47
| | | | | | | | | This matches the behavior of GNU assembler which supports symbolic expressions in absolute expressions used in assembly directives. Differential Revision: http://reviews.llvm.org/D20656 llvm-svn: 271028
* Move test to X86 directory: I think it depends on X86 TTI.Tim Northover2016-05-271-0/+0
| | | | llvm-svn: 271019
* Vectorizer: track non-fast FP instructions through phis when finding reductions.Tim Northover2016-05-271-0/+75
| | | | | | | | When we traced through a phi node looking for floating-point reductions, we forgot whether we'd ever seen an instruction without fast-math flags (that would block vectorization). This propagates it through to the end. llvm-svn: 271015
* Remove sample profile dependency to instcombine, which is not a analysis pass.Dehao Chen2016-05-274-4/+4
| | | | | | | | | | | | Summary: This patch removes dependency from sample profile pass to instcombine pass. Reviewers: davidxl, dnovillo Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D20501 llvm-svn: 271009
* [X86][AVX] Removed some remains of old (pre-regeneration) filechecksSimon Pilgrim2016-05-271-36/+0
| | | | llvm-svn: 271007
* Disable lifetime-start-on-first-use analysis.Than McIntosh2016-05-271-3/+53
| | | | | | | | | | | | | | | | Summary: Turn off lifetime-start-on-first-use enhancement for the moment pending a fix for bug 27903. Bug: 27903 Reviewers: tejohnson, wmi, qcolombet, gbiv Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D20731 llvm-svn: 271003
* [mips] Weaken asm predicate for memory offsetsSimon Dardis2016-05-2715-0/+400
| | | | | | | | | | | | The isMemWithSimmOffset predicate rejects relocations which is incorrect behaviour. Linkers and other tools should handle|warn|error when the field overflows. Reviewers: dsanders, vkalintiris Differential Revision: http://reviews.llvm.org/D20727 llvm-svn: 270995
* [RewriteStatepointsForGC] All constant should have null base pointerIgor Laevsky2016-05-274-3/+147
| | | | | | | | | | | | | | | | | | Currently we consider that each constant has itself as a base value. I.e "base(const) = const". This introduces couple of problems when we are trying to avoid reporting constants in statepoint live sets: 1. When querying "base( phi(const1, const2) )" we will get "phi(const1, const2)" as a base pointer. Since it's not a constant we will record it in a stack map. However on practice we don't want this to happen (constant are never relocated). 2. base( phi(const, gc ptr) ) = phi( const, base(gc ptr) ). This particular case imposes challenge on our runtime - we don't expect to see constant base pointers other than null. This problems can be avoided by treating all constant as if they were derived from null pointer base. I.e in a first case we will not include constant pointer in a stack map at all. In a second case we will get "phi(null, base(gc ptr))" as a base pointer which is a lot more convenient. Differential Revision: http://reviews.llvm.org/D20584 llvm-svn: 270993
* Attemp to fix build bot after r270987George Rimar2016-05-271-1/+2
| | | | | | | | | | | It was: "Recommit 270977 - [llvm-mc] - Teach llvm-mc to generate zlib styled compression sections." Fix: since test requires no zlib available and r270987 changed the compression flag for llvm-mc to mandatory specify the compression style, then just add 2 available styles to this test. llvm-svn: 270992
* [AMDGPU][llvm-mc] Square-braced-syntax for registers - make ":expr2" optional.Artem Tamazov2016-05-271-0/+29
| | | | | | | | | | | | | | | | | Register numbers may be specified as assembly-time expressions. This feature can be useful in macros and alike. However, expressions are supported within sqare braces only. Sqare braces were initially intended to support specifying of multiple (pairs/quads...) registers. Syntax like v[8:8] which specifies single register is also supported. That allows expressions but looks a bit unnatural. This change supports syntax REG[EXPR]. Tests added. Differential Revision: http://reviews.llvm.org/D20588 llvm-svn: 270990
* Recommit 270977 - [llvm-mc] - Teach llvm-mc to generate zlib styled ↵George Rimar2016-05-271-18/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | compression sections. Fix: updated clang code which was not updated by mistake. Original commit message: [llvm-mc] - Teach llvm-mc to generate zlib styled compression sections. This patch is strongly based on previously reverted D20331. (because of gnuutils < 2.26 does not support compressed debug sections in non zlib-gnu style) Difference that this patch supports both zlib and zlib-gnu styles. -compress-debug-sections option now supports next values: -compress-debug-sections=zlib-gnu -compress-debug-sections=zlib -compress-debug-sections=none Previously specifying -compress-debug-sections enabled zlib-gnu compression, so anyone can put "-compress-debug-sections=zlib-gnu" to restore the behavior that was before this patch for case when compression was enabled. Differential revision: http://reviews.llvm.org/D20676 llvm-svn: 270987
* Revert r270977 ([llvm-mc] - Teach llvm-mc to generate zlib styled ↵George Rimar2016-05-271-51/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | compression sections.) It broke buildbot: http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/13585/steps/build/logs/stdio Initial commit message: [llvm-mc] - Teach llvm-mc to generate zlib styled compression sections. This patch is strongly based on previously reverted D20331. (because of gnuutils < 2.26 does not support compressed debug sections in non zlib-gnu style) Difference that this patch supports both zlib and zlib-gnu styles. -compress-debug-sections option now supports next values: -compress-debug-sections=zlib-gnu -compress-debug-sections=zlib -compress-debug-sections=none Previously specifying -compress-debug-sections enabled zlib-gnu compression, so anyone can put "-compress-debug-sections=zlib-gnu" to restore the behavior that was before this patch for case when compression was enabled. Differential revision: http://reviews.llvm.org/D20676 llvm-svn: 270978
* [llvm-mc] - Teach llvm-mc to generate zlib styled compression sections.George Rimar2016-05-271-18/+51
| | | | | | | | | | | | | | | | | | | | This patch is strongly based on previously reverted D20331. (because of gnuutils < 2.26 does not support compressed debug sections in non zlib-gnu style) Difference that this patch supports both zlib and zlib-gnu styles. -compress-debug-sections option now supports next values: -compress-debug-sections=zlib-gnu -compress-debug-sections=zlib -compress-debug-sections=none Previously specifying -compress-debug-sections enabled zlib-gnu compression, so anyone can put "-compress-debug-sections=zlib-gnu" to restore the behavior that was before this patch for case when compression was enabled. Differential revision: http://reviews.llvm.org/D20676 llvm-svn: 270977
* Revert: r270973 - [X86][SSE] Replace (V)PMOVSX and (V)PMOVZX integer ↵Simon Pilgrim2016-05-2713-350/+731
| | | | | | extension intrinsics with generic IR (llvm) llvm-svn: 270976
* [X86][SSE] Replace (V)PMOVSX and (V)PMOVZX integer extension intrinsics with ↵Simon Pilgrim2016-05-2713-731/+350
| | | | | | | | | | | | generic IR (llvm) This patch removes the llvm intrinsics VPMOVSX and (V)PMOVZX sign/zero extension intrinsics and auto-upgrades to SEXT/ZEXT calls instead. We already did this for SSE41 PMOVSX sometime ago so much of that implementation can be reused. A companion patch (D20684) removes/auto-upgrade the clang intrinsics. Differential Revision: http://reviews.llvm.org/D20686 llvm-svn: 270973
* Linker: teach the IR mover to return llvm::Error.Peter Collingbourne2016-05-274-2/+14
| | | | | | | | | This will be needed in order to consistently return an Error to clients of the API being developed in D20268. Differential Revision: http://reviews.llvm.org/D20550 llvm-svn: 270967
* Form objc_storeStrong in the presence of bitcasts.Pete Cooper2016-05-271-0/+26
| | | | | | | | | | | | | | | | objc_storeStrong can be formed from a sequence such as %0 = tail call i8* @objc_retain(i8* %p) nounwind %tmp = load i8*, i8** @x, align 8 store i8* %0, i8** @x, align 8 tail call void @objc_release(i8* %tmp) nounwind The code was already looking through bitcasts for most of the values involved, but had missed one case where the pointer operand for the store was a bitcast. Ultimately the pointer for the load and store have to be the same value, after stripping casts. llvm-svn: 270955
* [LoopUnrollAnalyzer] Bail out instead of dying with assert when facing huge ↵Michael Zolotukhin2016-05-271-0/+21
| | | | | | | | index. This fixes PR27902. llvm-svn: 270946
* pdbdump: print out the name of the stream 0.Rui Ueyama2016-05-271-2/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D20712 llvm-svn: 270943
* pdbdump: Add -raw-all to enable all -raw-* flags.Rui Ueyama2016-05-261-1/+490
| | | | | | Differential Revision: http://reviews.llvm.org/D20707 llvm-svn: 270937
* [CodeGen] Fix problem with X86 byte registers in CriticalAntiDepBreakerMitch Bodart2016-05-261-0/+87
| | | | | | | | | | | | CriticalAntiDepBreaker was not correctly tracking defs of the high X86 byte registers, leading to incorrect use of a busy register to break an antidependence. Fixes pr27681, and its duplicates pr27580, pr27804. Differential Revision: http://reviews.llvm.org/D20456 llvm-svn: 270935
* Attach profile summary in IR based instrumentation pass.Easwaran Raman2016-05-261-1/+3
| | | | | | Differential revision: http://reviews.llvm.org/D20655 llvm-svn: 270933
* [LoopUnrollAnalyzer] Fix a crash in analyzeLoopUnrollCost.Michael Zolotukhin2016-05-261-0/+30
| | | | | | | | | Condition might be simplified to a Constant, but it doesn't have to be ConstantInt, so we should dyn_cast, instead of cast. This fixes PR27886. llvm-svn: 270924
* [obj2yaml][yaml2obj] Support for MachO lazy bindingsChris Bieneman2016-05-261-0/+466
| | | | | | This adds support for YAML round tripping dyld info lazy bindings. The storage and format of these is the same as regular bind opcodes, they are just interpreted differently by dyld, and can have DONE opcodes in the middle of the opcode lists. llvm-svn: 270920
* [obj2yaml][yaml2obj] Support for MachO weak bindingsChris Bieneman2016-05-261-0/+133
| | | | | | This adds support for YAML round tripping dyld info weak bindings. The storage and format of these is the same as regular bind opcodes, they are just interpreted differently by dyld. llvm-svn: 270911
* coff: fix weak alias to local.Rafael Espindola2016-05-262-1/+64
| | | | | | | | | | We were creating a weak external that tried to reference a static symbol. That would always fail to link with link.exe. We now create an external symbol in the same position as the local and refer to that. This works with link.exe and matches what gas does. llvm-svn: 270906
* [obj2yaml][yaml2obj] Support for MachO bind opcodesChris Bieneman2016-05-261-0/+133
| | | | | | This adds support for YAML round tripping dyld info bind opcodes. Bind opcodes can have signed or unsigned LEB128 data, and they can have symbols associated with them. llvm-svn: 270901
* [Hexagon] Enable the post-RA schedulerKrzysztof Parzyszek2016-05-264-18/+9
| | | | | | | | | The aggressive anti-dependency breaker can rename the restored callee- saved registers. To prevent this, mark these registers are live on all paths to the return/tail-call instructions, and add implicit use operands for them to these instructions. llvm-svn: 270898
* [AArch64] Generate rev16/rev32 from bswap + srl when upper bits are known zero.Chad Rosier2016-05-261-0/+27
| | | | | | | | | | | | | | | | | Canonicalize (srl (bswap i32 x), 16) to (rotr (bswap i32 x), 16), if the high 16-bits of x are zero. Similarly, canonicalize (srl (bswap i64 x), 32) to (rotr (bswap i64 x), 32), if the high 32-bits of x are zero. test_rev_w_srl16: test_rev_w_srl16: and w8, w0, #0xffff and w8, w0, #0xffff rev w8, w8 ---> rev16 w0, w8 lsr w0, w8, #16 test_rev_x_srl32: test_rev_x_srl32: rev x8, x8 ---> rev32 x0, x8 lsr x0, x8, #32 llvm-svn: 270896
* AMDGPU/SI: Enable load-store-opt by default.Changpeng Fang2016-05-2625-92/+79
| | | | | | | | | | Summary: Enable load-store-opt by default, and update LIT tests. Reviewers: arsenm Differential Revision: http://reviews.llvm.org/D20694 llvm-svn: 270894
* [BasicAA] Extend inbound GEP negative offset logic to GlobalVariablesMichael Kuperstein2016-05-261-0/+11
| | | | | | | | | | | | | | r270777 improved the precision of alloca vs. inbounbds GEP alias queries: if we have (a) an inbounds GEP and (b) a pointer based on an alloca, and the beginning of the object the GEP points to would have a negative offset with respect to the alloca, then the GEP can not alias pointer (b). This makes the same logic fire when (b) is based on a GlobalVariable instead of an alloca. Differential Revision: http://reviews.llvm.org/D20652 llvm-svn: 270893
* [MemCpyOpt] Don't perform callslot optimization across may-throw callsDavid Majnemer2016-05-262-1/+35
| | | | | | | | | An exception could prevent a store from occurring but MemCpyOpt's callslot optimization would fire anyway, causing the store to occur. This fixes PR27849. llvm-svn: 270892
* coff: fix the section of weak symbols.Rafael Espindola2016-05-261-1/+1
| | | | llvm-svn: 270889
* [BBVectorize] Don't vectorize selects with a scalar condition and vector ↵Michael Kuperstein2016-05-261-0/+33
| | | | | | | | | | operands. This fixes PR27879. Differential Revision: http://reviews.llvm.org/D20659 llvm-svn: 270888
* Add test/CodeGen/MIR/Hexagon/lit.local.cfgKrzysztof Parzyszek2016-05-261-0/+2
| | | | | | Require that Hexagon is a registered target. llvm-svn: 270887
* Do not rename registers that do not start an independent live rangeKrzysztof Parzyszek2016-05-261-0/+35
| | | | llvm-svn: 270885
* coff: fix the value of weak definitions.Rafael Espindola2016-05-261-0/+33
| | | | | | It looks like this doesn't get a lot of use. llvm-svn: 270883
* [CaptureTracking] Volatile operations capture their memory locationDavid Majnemer2016-05-261-0/+8
| | | | | | | | | | The memory location that corresponds to a volatile operation is very special. They are observed by the machine in ways which we cannot reason about. Differential Revision: http://reviews.llvm.org/D20555 llvm-svn: 270879
* [NVPTX] Added NVVMIntrRange passArtem Belevich2016-05-261-13/+54
| | | | | | | | | | | | NVVMIntrRange adds !range metadata to calls of NVVM intrinsics that return values within known limited range. This allows LLVM to generate optimal code for indexing arrays based on tid/ctaid which is a frequently used pattern in CUDA code. Differential Revision: http://reviews.llvm.org/D20644 llvm-svn: 270872
* [AMDGPU][llvm-mc] s_getreg/setreg* - hwreg - factor out strings/literals etc.Artem Tamazov2016-05-261-11/+11
| | | | | | | | | | | Hwreg(...) syntax implementation unified with sendmsg(...). Common strings moved to Utils MathExtras.h functionality utilized. Added missing build dependency in Disassembler. Differential Revision: http://reviews.llvm.org/D20381 llvm-svn: 270871
* [X86][SSE] When lowering a 256-bit shuffle as PMOVZX, reduce the input ↵Simon Pilgrim2016-05-261-4/+2
| | | | | | | | vector to the lower 128-bit subvector. Most often as not this is what it started out as, the extraction is zero-cost on AVX and the PMOVZX/PMOVSX folding logic is based around 128-bit loads. llvm-svn: 270858
* [AMDGPU] Remove exit-on-error flag from test (PR27762)Diana Picus2016-05-261-1/+3
| | | | | | | | | | Similar to r269948, but for argument lowering. Fixes PR27762 Differential Revision: http://reviews.llvm.org/D20430 llvm-svn: 270856
* [BPF] Remove exit-on-error flag in test (PR27767)Diana Picus2016-05-261-1/+1
| | | | | | | | | | | | The exit-on-error flag is needed to avoid an assert where llvm::SelectionDAGISel::LowerArguments doesn't create enough arguments. Fill up with zeroes to reach the right number of args. Fixes PR27767. Differential Revision: http://reviews.llvm.org/D20571 llvm-svn: 270855
* [InstCombine] Catch more bswap cases missed due to zext and truncs.Chad Rosier2016-05-261-0/+38
| | | | | | | Fixes PR27824. Differential Revision: http://reviews.llvm.org/D20591. llvm-svn: 270853
* [X86][SSE] Added load_zext_16i8_to_8i32 testSimon Pilgrim2016-05-261-0/+56
| | | | | | Odd issue with input vector not being folded into pmovzx on AVX2+ targets llvm-svn: 270852
* [ThinLTO] Resolve LinkOnceAnyTeresa Johnson2016-05-263-11/+39
| | | | | | | | | | | | | | | | | Summary: Ensure we keep prevailing copy of LinkOnceAny by converting it to WeakAny. Rename odr_resolution test to the now more appropriate weak_resolution (weak in the linker sense includes linkonce). Reviewers: joker.eph Subscribers: llvm-commits, joker.eph Differential Revision: http://reviews.llvm.org/D20634 llvm-svn: 270850
OpenPOWER on IntegriCloud