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* ADCE: Remove debug info intrinsics in dead scopesDuncan P. N. Exon Smith2016-03-292-1/+102
| | | | | | | | | | | | | | | | | During ADCE, track which debug info scopes still have live references from the code, and delete debug info intrinsics for the dead ones. These intrinsics describe the locations of variables (in registers or stack slots). If there's no code left corresponding to a variable's scope, then there's no way to reference the variable in the debugger and it doesn't matter what its value is. I add a DEBUG printout when the described location in an SSA register, in case it helps some trying to track down why locations get lost. However, we still delete these; the scope itself isn't attached to any real code, so the ship has already sailed. llvm-svn: 264800
* Upgrade some wildly anachronistic debug info in testcases.Adrian Prantl2016-03-2914-35/+20
| | | | llvm-svn: 264797
* use FileCheck and auto-check-generation script for exact checkingSanjay Patel2016-03-291-5/+50
| | | | | | | | | | | | | | | | | | 1. Removed the run line for mingw32 and made the Darwin triples unknown. This is a test of 32-bit vs. 64-bit platform and the underlying hardware. We have other tests for checking behavioral differences of the OS platform. 2. Changed the CPU specifiers to the attributes they were meant to represent. Any CPU that doesn't have SSE4.2 is assumed to have slow unaligned 16-byte accesses, so it won't use those here. 3. Although the stores really could all be CHECK-DAG, I left them as CHECK-NEXT to show the strange behavior of the instruction scheduler in the SLOW_32 case. 4. The odd-looking instructions are due to the use of a null pointer in the IR, so we have integer immediate store addresses. Cute. llvm-svn: 264796
* Fix some bugs in the posix output of llvm-nm. Which is documented onKevin Enderby2016-03-294-5/+10
| | | | | | | | | | | | | | http://pubs.opengroup.org/onlinepubs/9699919799/utilities/nm.html . 1) For Mach-O files the code was not printing the values in hex as is the default. 2) The values printed had leading zeros which they should not have. 3) The address for undefined symbols was printed as spaces instead of 0. 4) With the -A option with posix output for an archive did not use square brackets around the archive member name. rdar://25311883 and rdar://25299678 llvm-svn: 264778
* Revert "[asan] Make the global_metadata_darwin.ll test require El Capitan or ↵Ryan Govostes2016-03-292-13/+0
| | | | | | newer" llvm-svn: 264764
* [asan] Make the global_metadata_darwin.ll test require El Capitan or newerRyan Govostes2016-03-292-0/+13
| | | | llvm-svn: 264758
* Add support for no-jump-tablesNirav Dave2016-03-292-0/+86
| | | | | | | | | | | | | Add function soft attribute to the generation of Jump Tables in CodeGen as initial step towards clang support of gcc's no-jump-table support Reviewers: hans, echristo Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D18321 llvm-svn: 264756
* Swift Calling Convention: add swiftself attribute.Manman Ren2016-03-295-0/+112
| | | | | | Differential Revision: http://reviews.llvm.org/D17866 llvm-svn: 264754
* [x86] add tests to show current memset codegenSanjay Patel2016-03-291-0/+88
| | | | llvm-svn: 264748
* regenerate checksSanjay Patel2016-03-291-10/+33
| | | | llvm-svn: 264738
* fix CHECK_NOT -> CHECK-NOTJunmo Park2016-03-291-1/+1
| | | | llvm-svn: 264706
* fixed typo - CHECK-LABELJunmo Park2016-03-291-1/+1
| | | | llvm-svn: 264704
* fixed typo - CHECK-LABELElena Demikhovsky2016-03-291-1/+1
| | | | llvm-svn: 264702
* AVX-512: fixed a bug in fp_to_uint pattern on KNLElena Demikhovsky2016-03-291-151/+499
| | | | | | | | | Fixed fp_to_uint instruction selection on KNL. One pattern was missing for <4 x double> to <4 x i32> Differential Revision: http://reviews.llvm.org/D18512 llvm-svn: 264701
* BitcodeReader: Allow METADATA_STRINGS to only have !""Duncan P. N. Exon Smith2016-03-291-0/+7
| | | | | | | Support parsing a METADATA_STRINGS record that only has a single piece of metadata, !"". Fixes a corner case in r264551. llvm-svn: 264699
* [SimlifyCFG] Prevent passes from destroying canonical loop structure, ↵Hyojin Sung2016-03-295-42/+42
| | | | | | | | | | | | | | | | | especially for nested loops When eliminating or merging almost empty basic blocks, the existence of non-trivial PHI nodes is currently used to recognize potential loops of which the block is the header and keep the block. However, the current algorithm fails if the loops' exit condition is evaluated only with volatile values hence no PHI nodes in the header. Especially when such a loop is an outer loop of a nested loop, the loop is collapsed into a single loop which prevent later optimizations from being applied (e.g., transforming nested loops into simplified forms and loop vectorization). The patch augments the existing PHI node-based check by adding a pre-test if the BB actually belongs to a set of loop headers and not eliminating it if yes. llvm-svn: 264697
* [PowerPC] Refactor popcnt[dw] target featuresHal Finkel2016-03-291-0/+2
| | | | | | | | | Instead of using two feature bits, one to indicate the availability of the popcnt[dw] instructions, and another to indicate whether or not they're fast, use a single enum. This allows more consistent control via target attribute strings, and via Clang's command line. llvm-svn: 264690
* [Codegen] Decrease minimum jump table density.Kyle Butt2016-03-298-30/+111
| | | | | | | | | | | Minimum density for both optsize and non optsize are now options -sparse-jump-table-density (default 10) for non optsize functions -dense-jump-table-density (default 40) for optsize functions, which matches the current default. This improves several benchmarks at google at the cost of a small codesize increase. For code compiled with -Os, the old behavior continues llvm-svn: 264689
* regenerate checksSanjay Patel2016-03-283-74/+107
| | | | llvm-svn: 264677
* fix checks: *_DAG -> *-DAGSanjay Patel2016-03-282-4/+4
| | | | llvm-svn: 264676
* [Coverage] Fix the expected counts in instrprof-comdat.hVedant Kumar2016-03-281-6/+3
| | | | llvm-svn: 264675
* fix CHECK_NEXT -> CHECK-NEXTSanjay Patel2016-03-282-2/+2
| | | | llvm-svn: 264674
* fix CHECK_DAG -> CHECK-DAGSanjay Patel2016-03-282-4/+4
| | | | llvm-svn: 264673
* fix CHECK_NEXT -> CHECK-NEXTSanjay Patel2016-03-281-4/+4
| | | | llvm-svn: 264672
* fix CHECK_LABEL -> CHECK-LABELSanjay Patel2016-03-281-16/+16
| | | | llvm-svn: 264671
* trailing whitespaceSanjay Patel2016-03-281-315/+315
| | | | llvm-svn: 264670
* Remove personality for declarations in CloneModule.Evgeniy Stepanov2016-03-281-0/+18
| | | | | | | | | | Personality is copied as part of copyFunctionAttributes, but it is invalid on a declaration. Remove the personality attribute it the function body is not cloned. Also add a verifier run over output modules in the llvm-split tool. llvm-svn: 264667
* [X86][SSE] Vectorize a bit (AND/XOR/OR) op if a BUILD_VECTOR has the same op ↵Simon Pilgrim2016-03-284-214/+119
| | | | | | | | | | | | | | for all their scalar elements. If all a BUILD_VECTOR's source elements are the same bit (AND/XOR/OR) operation type and each has one constant operand, lower to a pair of BUILD_VECTOR and just apply the bit operation to the vectors. The constant operands will form a constant vector meaning that we still only have a single BUILD_VECTOR to lower and we will have replaced all the scalarized operations with a single SSE equivalent. Its not in our interest to start make a general purpose vectorizer from this, but I'm seeing enough of these scalar bit operations from the later legalization/scalarization stages to support them at least. Differential Revision: http://reviews.llvm.org/D18492 llvm-svn: 264666
* fix CHECK_NEXT -> CHECK-NEXTSanjay Patel2016-03-281-15/+15
| | | | llvm-svn: 264661
* Reapply (2x) "[PGO] Fix name encoding for ObjC-like functions"Vedant Kumar2016-03-289-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | Function names in ObjC can have spaces in them. This interacts poorly with name compression, which uses spaces to separate PGO names. Fix the issue by using a different separator and update a test. I chose "\01" as the separator because 1) it's non-printable, 2) we strip it from PGO names, and 3) it's the next natural choice once "\00" is discarded (that one's overloaded). What's changed since the original commit? - I fixed up the covmap-V2 binary format tests using a linux VM. - I weakened the CHECK lines in instrprof-comdat.h to account for the fact that there have been bugfixes to clang coverage. These will be fixed up in a follow-up. - I added an assert to make sure we don't get bitten by this again. - I constructed the c-general.profraw file without name compression enabled to appease some bots. Differential Revision: http://reviews.llvm.org/D18516 llvm-svn: 264658
* Add an IR Verifier check for orphaned DICompileUnits.Adrian Prantl2016-03-283-2/+17
| | | | | | | | | A DICompileUnit that is not listed in llvm.dbg.cu will cause assertion failures and/or crashes in the backend. The Verifier should reject this. rdar://problem/25369499 llvm-svn: 264657
* [LVers] Change CHECK_LABEL to CHECK-LABEL (underscore->dash)Adam Nemet2016-03-281-1/+1
| | | | | | Thanks to Sanjoy for catching this. llvm-svn: 264656
* [asan] Fix testcase for r264645Ryan Govostes2016-03-281-6/+6
| | | | llvm-svn: 264652
* Handle section vs global name conflict.Evgeniy Stepanov2016-03-282-6/+138
| | | | | | | | | | | | | This is a fix for PR26941. When there is both a section and a global definition with the same name, the global wins. Section symbols are not added to the symbol table; section references are left undefined and fixed up in the object writer unless they've been satisfied by some other definition. llvm-svn: 264649
* [asan] Support dead code stripping on Mach-O platformsRyan Govostes2016-03-282-1/+38
| | | | | | | | | | | | | | | | | | On OS X El Capitan and iOS 9, the linker supports a new section attribute, live_support, which allows dead stripping to remove dead globals along with the ASAN metadata about them. With this change __asan_global structures are emitted in a new __DATA,__asan_globals section on Darwin. Additionally, there is a __DATA,__asan_liveness section with the live_support attribute. Each entry in this section is simply a tuple that binds together the liveness of a global variable and its ASAN metadata structure. Thus the metadata structure will be alive if and only if the global it references is also alive. Review: http://reviews.llvm.org/D16737 llvm-svn: 264645
* Revert "Reapply "[PGO] Fix name encoding for ObjC-like functions""Vedant Kumar2016-03-289-12/+7
| | | | | | | This reverts commit r264641 to investigate why c-general.test is failing on the bots. llvm-svn: 264643
* Reapply "[PGO] Fix name encoding for ObjC-like functions"Vedant Kumar2016-03-289-7/+12
| | | | | | | | | | | | | | | | | | | | | Function names in ObjC can have spaces in them. This interacts poorly with name compression, which uses spaces to separate PGO names. Fix the issue by using a different separator and update a test. I chose "\01" as the separator because 1) it's non-printable, 2) we strip it from PGO names, and 3) it's the next natural choice once "\00" is discarded (that one's overloaded). This reverts the revert commit beaf3d18. What's changed? - I fixed up the covmap-V2 binary format tests using a linux VM. - I updated the expected counts in instrprof-comdat.h to account for the fact that there have been bugfixes to clang coverage. - I added an assert to make sure we don't get bitten by this again. Differential Revision: http://reviews.llvm.org/D18516 llvm-svn: 264641
* MIRParser: Add %subreg.xxx syntax for subregister index operandsMatthias Braun2016-03-282-0/+58
| | | | | | Differential Revision: http://reviews.llvm.org/D18279 llvm-svn: 264608
* CodeGen: Correct specification of PHI nodesMatthias Braun2016-03-281-2/+2
| | | | | | | | | | They do have a def machine operand. Fixing the definition is necessary for an upcoming patch. Differential Revision: http://reviews.llvm.org/D18384 llvm-svn: 264607
* [AArch64] Do not lower scalar sdiv/udiv to a shifts + mul sequence when ↵Haicheng Wu2016-03-281-0/+45
| | | | | | | | optimizing for minsize Mimic what x86 does when optimizing sdiv/udiv for minsize. llvm-svn: 264606
* Revert "[SimlifyCFG] Prevent passes from destroying canonical loop ↵Reid Kleckner2016-03-284-40/+40
| | | | | | | | | | structure, especially for nested loops" This reverts commit r264596. It does not compile. llvm-svn: 264604
* [PowerPC] On the A2, popcnt[dw] are very slowHal Finkel2016-03-281-4/+18
| | | | | | | | | | | | | | | | The A2 cores support the popcntw/popcntd instructions, but they're microcoded, and slower than our default software emulation. Specifically, popcnt[dw] take approximately 74 cycles, whereas our software emulation takes only 24-28 cycles. I've added a new target feature to indicate a slow popcnt[dw], instead of just removing the existing target feature from the a2/a2q processor models, because: 1. This allows us to return more accurate information via the TTI interface (I recognize that this currently makes no practical difference) 2. Is hopefully easier to understand (it allows the core's features to match its manual while still having the desired effect). llvm-svn: 264600
* [SimlifyCFG] Prevent passes from destroying canonical loop structure, ↵Hyojin Sung2016-03-284-40/+40
| | | | | | | | | | | | | | | | especially for nested loops When eliminating or merging almost empty basic blocks, the existence of non-trivial PHI nodes is currently used to recognize potential loops of which the block is the header and keep the block. However, the current algorithm fails if the loops' exit condition is evaluated only with volatile values hence no PHI nodes in the header. Especially when such a loop is an outer loop of a nested loop, the loop is collapsed into a single loop which prevent later optimizations from being applied (e.g., transforming nested loops into simplified forms and loop vectorization). The patch augments the existing PHI node-based check by adding a pre-test if the BB actually belongs to a set of loop headers and not eliminating it if yes. llvm-svn: 264596
* Introduce MachineFunctionProperties and the AllVRegsAllocated propertyDerek Schuff2016-03-285-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | MachineFunctionProperties represents a set of properties that a MachineFunction can have at particular points in time. Existing examples of this idea are MachineRegisterInfo::isSSA() and MachineRegisterInfo::tracksLiveness() which will eventually be switched to use this mechanism. This change introduces the AllVRegsAllocated property; i.e. the property that all virtual registers have been allocated and there are no VReg operands left. With this mechanism, passes can declare that they require a particular property to be set, or that they set or clear properties by implementing e.g. MachineFunctionPass::getRequiredProperties(). The MachineFunctionPass base class verifies that the requirements are met, and handles the setting and clearing based on the delcarations. Passes can also directly query and update the current properties of the MF if they want to have conditional behavior. This change annotates the target-independent post-regalloc passes; future changes will also annotate target-specific ones. Reviewers: qcolombet, hfinkel Differential Revision: http://reviews.llvm.org/D18421 llvm-svn: 264593
* [llvm-size] Implement --common optionHemant Kulkarni2016-03-281-0/+29
| | | | | | Differential Revision: http://reviews.llvm.org/D16820 llvm-svn: 264591
* AMDGPU/SI: Limit load clustering to 16 bytes instead of 4 instructionsTom Stellard2016-03-283-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This helps prevent load clustering from drastically increasing register pressure by trying to cluster 4 SMRDx8 loads together. The limit of 16 bytes was chosen, because it seems like that was the original intent of setting the limit to 4 instructions, but more analysis could show that a different limit is better. This fixes yields small decreases in register usage with shader-db, but also helps avoid a large increase in register usage when lane mask tracking is enabled in the machine scheduler, because lane mask tracking enables more opportunities for load clustering. shader-db stats: 2379 shaders in 477 tests Totals: SGPRS: 49744 -> 48600 (-2.30 %) VGPRS: 34120 -> 34076 (-0.13 %) Code Size: 1282888 -> 1283184 (0.02 %) bytes LDS: 28 -> 28 (0.00 %) blocks Scratch: 495616 -> 492544 (-0.62 %) bytes per wave Max Waves: 6843 -> 6853 (0.15 %) Wait states: 0 -> 0 (0.00 %) Reviewers: nhaehnle, arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D18451 llvm-svn: 264589
* [SimplifyLibCalls] Transform printf("%s", "a") -> putchar('a').Davide Italiano2016-03-281-0/+12
| | | | llvm-svn: 264588
* [Hexagon] Improve handling of unaligned vector loads and storesKrzysztof Parzyszek2016-03-281-0/+31
| | | | llvm-svn: 264584
* [Hexagon] Only use restore functions for single register at -OzKrzysztof Parzyszek2016-03-281-0/+42
| | | | llvm-svn: 264581
* Sparc: silently ignore .proc assembler directiveDouglas Katzman2016-03-281-0/+4
| | | | | | Differential Revision: http://reviews.llvm.org/D18463 llvm-svn: 264579
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