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* [AArch64] Add test case for preferred function alignment (NFC). Florian Hahn2017-07-071-0/+26
| | | | | | | | | | | | Reviewers: evandro, joelkevinjones, mcrosier Reviewed By: joelkevinjones, mcrosier Subscribers: mcrosier, aemerson, llvm-commits, rengolin, evandro, javed.absar, joelkevinjones, kristof.beyls Differential Revision: https://reviews.llvm.org/D34951 llvm-svn: 307369
* [ARM] GlobalISel: Select hard G_FCMP for s32Diana Picus2017-07-072-0/+637
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We lower to a sequence consisting of: - MOVi 0 into a register - VCMPS to do the actual comparison and set the VFP flags - FMSTAT to move the flags out of the VFP unit - MOVCCi to either use the "zero register" that we have previously set with the MOVi, or move 1 into the result register, based on the values of the flags As was the case with soft-float, for some predicates (one, ueq) we actually need two comparisons instead of just one. When that happens, we generate two VCMPS-FMSTAT-MOVCCi sequences and chain them by means of using the result of the first MOVCCi as the "zero register" for the second one. This is a bit overkill, since one comparison followed by two non-flag-setting conditional moves should be enough. In any case, the backend manages to CSE one of the comparisons away so it doesn't matter much. Note that unlike SelectionDAG and FastISel, we always use VCMPS, and not VCMPES. This makes the code a lot simpler, and it also seems correct since the LLVM Lang Ref defines simple true/false returns if the operands are QNaN's. For SNaN's, even VCMPS throws an Invalid Operand exception, so they won't be slipping through unnoticed. Implementation-wise, this introduces a template so we can share the same code that we use for handling integer comparisons, since the only differences are in the details (exact opcodes to be used etc). Hopefully this will be easy to extend to s64 G_FCMP. llvm-svn: 307365
* [TableGen] Add a proper namespace to an Instruction in an AsmMatcher test. ↵Craig Topper2017-07-071-0/+1
| | | | | | This is required after r307358. llvm-svn: 307361
* [PDB] Teach libpdb to write DBI Stream ECNames.Zachary Turner2017-07-071-0/+50
| | | | | | | | | | | | | | | | | | | | | | | Based strictly on the name, this seems to have something to do width edit & continue. The goal of this patch has nothing to do with supporting edit and continue though. msvc link.exe writes very basic information into this area even when *not* compiling with support for E&C, and so the goal here is to bring lld-link to parity. Since we cannot know what assumptions standard tools make about the content of PDB files, we need to be as close as possible. This ECNames data structure is a standard PDB string hash table. link.exe puts a single string into this hash table, which is the full path to the PDB file on disk. It then references this string from the module descriptor for the compiler generated `* Linker *` module. With this patch, lld-link will generate the exact same sequence of bytes as MSVC link for this subsection for a given object file input (as reported by `llvm-pdbutil bytes -ec`). llvm-svn: 307356
* RegisterScavenging: Fix PR33687Matthias Braun2017-07-071-0/+66
| | | | | | | | | When scavenging for a use in instruction MI, we will reload after that instruction and hence cannot spill uses/defs of this instruction. This fixes http://llvm.org/PR33687 llvm-svn: 307352
* [InferAddressSpaces] Fix assertion about null pointerYaxun Liu2017-07-071-0/+12
| | | | | | | | | | | | | InferAddressSpaces does not check address space in collectFlatAddressExpressions, which causes values with non flat address space put into Postorder and causes assertion in cloneValueWithNewAddressSpace. This patch fixes assertion in OpenCL 2.0 conformance test generic_address_space subtest for amdgcn target. Differential Revision: https://reviews.llvm.org/D34991 llvm-svn: 307349
* [WebAssembly] Support weak defined symbolsSam Clegg2017-07-071-5/+27
| | | | | | | | | | | | Model weakly defined symbols as symbols that are both exports and imported and marked as weak. Local references to the symbols refer to the import but the linker can resolve this to the weak export if not strong symbol is found at link time. Differential Revision: https://reviews.llvm.org/D35029 llvm-svn: 307348
* Extend memcpy expansion in Transform/Utils to handle wider operand types.Sean Fertile2017-07-072-0/+73
| | | | | | | | | | | Adds loop expansions for known-size and unknown-sized memcpy calls, allowing the target to provide the operand types through TTI callbacks. The default values for the TTI callbacks use int8 operand types and matches the existing behaviour if they aren't overridden by the target. Differential revision: https://reviews.llvm.org/D32536 llvm-svn: 307346
* Revert r307342, r307343.Evgeniy Stepanov2017-07-071-48/+0
| | | | | | | | | | Revert "Copy arguments passed by value into explicit allocas for ASan." Revert "[asan] Add end-to-end tests for overflows of byval arguments." Build failure on lldb-x86_64-ubuntu-14.04-buildserver. Test failure on clang-cmake-aarch64-42vma and sanitizer-x86_64-linux-android. llvm-svn: 307345
* Copy arguments passed by value into explicit allocas for ASan.Evgeniy Stepanov2017-07-071-0/+48
| | | | | | | | | | | | | | ASan determines the stack layout from alloca instructions. Since arguments marked as "byval" do not have an explicit alloca instruction, ASan does not produce red zones for them. This commit produces an explicit alloca instruction and copies the byval argument into the allocated memory so that red zones are produced. Patch by Matt Morehouse. Differential revision: https://reviews.llvm.org/D34789 llvm-svn: 307342
* [ConstHoisting] Turn on consthoist-with-block-frequency by default.Wei Mi2017-07-071-4/+1
| | | | | | | | | | | Using profile information to guide consthoisting is generally helpful for performance, so the patch turns it on by default. No compile time or perf regression were found using spec2000 and spec2006 on x86. Some significant improvement (>20%) was seen on internal benchmarks. Differential Revision: https://reviews.llvm.org/D35063 llvm-svn: 307338
* Reverting r307326 because it breaks clang tests.Michael Kuperstein2017-07-063-93/+0
| | | | llvm-svn: 307334
* [ConstHoisting] choose to hoist when frequency is the same.Wei Mi2017-07-061-4/+48
| | | | | | | | | | | | The patch is to adjust the strategy of frequency based consthoisting: Previously when the candidate block has the same frequency with the existing blocks containing a const, it will not hoist the const to the candidate block. For that case, now we change the strategy to hoist the const if only existing blocks have more than one block member. This is helpful for reducing code size. Differential Revision: https://reviews.llvm.org/D35084 llvm-svn: 307328
* [NVPTX] Add lowering of i128 params.Michael Kuperstein2017-07-063-0/+93
| | | | | | | | | | | | | | | | | The patch adds support of i128 params lowering. The changes are quite trivial to support i128 as a "special case" of integer type. With this patch, we lower i128 params the same way as aggregates of size 16 bytes: .param .b8 _ [16]. Currently, NVPTX can't deal with the 128 bit integers: * in some cases because of failed assertions like ValVTs.size() == OutVals.size() && "Bad return value decomposition" * in other cases emitting PTX with .i128 or .u128 types (which are not valid [1]) [1] http://docs.nvidia.com/cuda/parallel-thread-execution/index.html#fundamental-types Differential Revision: https://reviews.llvm.org/D34555 Patch by: Denys Zariaiev (denys.zariaiev@gmail.com) llvm-svn: 307326
* Change remaining references to lit.util.capture to use subprocess.check_output.David L. Jones2017-07-062-4/+6
| | | | | | | | | | | | | | Summary: The capture() function was removed in r306625. This should fix PGO breakages reported by Michael Zolotukhin. Reviewers: mzolotukhin Subscribers: sanjoy, llvm-commits Differential Revision: https://reviews.llvm.org/D35088 llvm-svn: 307320
* Use @LINE in two more tests.Rafael Espindola2017-07-062-4/+2
| | | | llvm-svn: 307318
* AMDGPU: Add macro fusion schedule DAG mutationMatt Arsenault2017-07-0614-305/+422
| | | | | | Try to increase opportunities to shrink vcc uses. llvm-svn: 307313
* AMDGPU: Remove unnecessary IR from MIR testsMatt Arsenault2017-07-067-358/+113
| | | | llvm-svn: 307311
* [AMDGPU] Always use rcp + mul with fast mathStanislav Mekhanoshin2017-07-062-43/+32
| | | | | | | | | | | | | | | | | | | | | | | | | Regardless of relaxation options such as -cl-fast-relaxed-math we are producing rather long code for fdiv via amdgcn_fdiv_fast intrinsic. This intrinsic is used to replace fdiv with 2.5ulp metadata and does not handle denormals, thus believed to be fast. An fdiv instruction can also have fast math flag either by itself or together with fpmath metadata. Clang used with a relaxation flag always produces both metadata and fast flag: %div = fdiv fast float %v, %0, !fpmath !12 !12 = !{float 2.500000e+00} Current implementation ignores fast flag and favors metadata. An instruction with just fast flag would be lowered to a fastest rcp + mul, but that never happen on practice because of described mutual clang and BE behavior. This change allows an "fdiv fast" to be always lowered as rcp + mul. Differential Revision: https://reviews.llvm.org/D34844 llvm-svn: 307308
* [ValueTracking] Support icmps fed by 'and' and 'or'.Chad Rosier2017-07-062-0/+224
| | | | | | | | | | This patch adds support for handling some forms of ands and ors in ValueTracking's isImpliedCondition API. PR33611 https://reviews.llvm.org/D34901 llvm-svn: 307304
* [LTO] Fix the interaction between linker redefined symbols and ThinLTODavide Italiano2017-07-061-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | This is the same as r304719 but for ThinLTO. The substantial difference is that in this case we don't have whole visibility, just the summary. In the LTO case, when we got the resolution for the input file we could just see if the linker told us whether a symbol was linker redefined (using --wrap or --defsym) and switch the linkage directly for the GV. Here, we have the summary. So, we record that the linkage changed from <whatever it was> to $weakany to prevent IPOs across this symbol boundaries and actually just switch the linkage at FunctionImport time. This patch should also fixes the lld bits (as all the scaffolding for communicating if a symbol is linker redefined should be there & should be the same), but I'll make sure to add some tests there as well. Fixes PR33192. Differential Revision: https://reviews.llvm.org/D35064 llvm-svn: 307303
* [X86][SSE] Tests for bitcasting iX integers to vXi1 boolean vectorsSimon Pilgrim2017-07-063-0/+7447
| | | | | | Including sign/zero extension to legal types llvm-svn: 307301
* Add @LINE to checks in a test.Rafael Espindola2017-07-061-22/+29
| | | | | | This makes it a lot easier to see which error failed a check. llvm-svn: 307300
* Modify constraints in `llvm::canReplaceOperandWithVariable`Leo Li2017-07-061-0/+24
| | | | | | | | | | | | | | | | | Summary: `Instruction::Switch`: only first operand can be set to a non-constant value. `Instruction::InsertValue` both the first and the second operand can be set to a non-constant value. `Instruction::Alloca` return true for non-static allocation. Reviewers: efriedma Reviewed By: efriedma Subscribers: srhines, pirama, llvm-commits Differential Revision: https://reviews.llvm.org/D34905 llvm-svn: 307294
* [LoopUnrollRuntime] Bailout when multiple exiting blocks to the unique latch ↵Anna Thomas2017-07-061-0/+30
| | | | | | | | | | | | | | exit block Currently, we do not support multiple exiting blocks to the latch exit block. However, this bailout wasn't triggered when we had a unique exit block (which is the latch exit), with multiple exiting blocks to that unique exit. Moved the bailout so that it's triggered in both cases and added testcase. llvm-svn: 307291
* [X86][SSE] Dropped -mcpu from bitcast+setcc testsSimon Pilgrim2017-07-062-100/+475
| | | | | | | | Use triple and attribute only for consistency Added SSE2/AVX tests on 256-bit vectors to test PACKSS behaviour llvm-svn: 307289
* Bitcode: Include any strings added to the string table in the module hash.Peter Collingbourne2017-07-064-4/+39
| | | | | | Differential Revision: https://reviews.llvm.org/D35037 llvm-svn: 307286
* [InstCombine] Add single use checks to SimplifyBSwap to ensure we are really ↵Craig Topper2017-07-061-6/+4
| | | | | | | | | | | | saving instructions Bswap isn't a simple operation so we need to make sure we are really removing a call to it before doing these simplifications. For the case when both LHS and RHS are bswaps I've allowed it to be moved if either LHS or RHS has a single use since that at least allows us to move it later where it might find another bswap to combine with and it decreases the use count on the other side so maybe the other user can be optimized. Differential Revision: https://reviews.llvm.org/D34974 llvm-svn: 307273
* [LSR] Narrow search space by filtering non-optimal formulae with the same ↵Wei Mi2017-07-063-3/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ScaledReg and Scale. When the formulae search space is huge, LSR uses a series of heuristic to keep pruning the search space until the number of possible solutions are within certain limit. The big hammer of the series of heuristics is NarrowSearchSpaceByPickingWinnerRegs, which picks the register which is used by the most LSRUses and deletes the other formulae which don't use the register. This is a effective way to prune the search space, but quite often not a good way to keep the best solution. We saw cases before that the heuristic pruned the best formula candidate out of search space. To relieve the problem, we introduce a new heuristic called NarrowSearchSpaceByFilterFormulaWithSameScaledReg. The basic idea is in order to reduce the search space while keeping the best formula, we want to keep as many formulae with different Scale and ScaledReg as possible. That is because the central idea of LSR is to choose a group of loop induction variables and use those induction variables to represent LSRUses. An induction variable candidate is often represented by the Scale and ScaledReg in a formula. If we have more formulae with different ScaledReg and Scale to choose, we have better opportunity to find the best solution. That is why we believe pruning search space by only keeping the best formula with the same Scale and ScaledReg should be more effective than PickingWinnerReg. And we use two criteria to choose the best formula with the same Scale and ScaledReg. The first criteria is to select the formula using less non shared registers, and the second criteria is to select the formula with less cost got from RateFormula. The patch implements the heuristic before NarrowSearchSpaceByPickingWinnerRegs, which is the last resort. Testing shows we get 1.8% and 2% on two internal benchmarks on x86. llvm nightly testsuite performance is neutral. We also tried lsr-exp-narrow and it didn't help on the two improved internal cases we saw. Differential Revision: https://reviews.llvm.org/D34583 llvm-svn: 307269
* [X86][SSE4A] Add support for shuffle combining to INSERTQI.Simon Pilgrim2017-07-061-13/+4
| | | | llvm-svn: 307268
* [CGP, x86] update test checks; NFCSanjay Patel2017-07-061-38/+39
| | | | | | | | This was auto-generated using an older version of the script, and that version does not work with phis, so if we enable expansion it will go bad. llvm-svn: 307267
* [X86][SSE4A] Add test showing missed opportunities to combine INSERTQI shuffleSimon Pilgrim2017-07-061-0/+20
| | | | llvm-svn: 307265
* [x86] fix over-specified triple and auto-generate checks; NFCSanjay Patel2017-07-061-17/+25
| | | | llvm-svn: 307262
* [MachineVerifier] Add check that tied physregs aren't different.Mikael Holmen2017-07-061-0/+22
| | | | | | | | | | | | | | | | Summary: Added MachineVerifier code to check register ties more thoroughly, especially so that physical registers that are tied are the same. This may help e.g. when creating MIR files. Original patch by Jesper Antonsson Reviewers: stoklund, sanjoy, qcolombet Reviewed By: qcolombet Subscribers: qcolombet, llvm-commits Differential Revision: https://reviews.llvm.org/D34394 llvm-svn: 307259
* [X86][SSE4A] Add support for shuffle combining to EXTRQ.Simon Pilgrim2017-07-061-24/+12
| | | | llvm-svn: 307254
* [X86][SSE4A] Add scheduling tests for SSE4A instructionsSimon Pilgrim2017-07-061-0/+95
| | | | llvm-svn: 307251
* Revert "Revert "Revert "[IndVars] Canonicalize comparisons between ↵Max Kazantsev2017-07-064-58/+6
| | | | | | | | | non-negative values and indvars""" It appears that the problem is still there. Needs more analysis to understand why SaturatedMultiply test fails. llvm-svn: 307249
* [RegisterCoalescer] Fix for SubRange join unreachableDavid Stuttard2017-07-061-0/+162
| | | | | | | | | | | | | | | | Summary: During remat, some subranges might end up having invalid segments which caused problems for later coalescing. Added in a check to remove segments that are invalidated as part of the remat. See http://llvm.org/PR33524 Subscribers: MatzeB, qcolombet Differential Revision: https://reviews.llvm.org/D34391 llvm-svn: 307247
* [ARM] GlobalISel: Map s32 G_FCMP in reg bank selectDiana Picus2017-07-061-0/+29
| | | | | | Map hard G_FCMP operands to FPR and the result to GPR. llvm-svn: 307245
* Revert "Revert "[IndVars] Canonicalize comparisons between non-negative ↵Max Kazantsev2017-07-064-6/+58
| | | | | | | | | | | | | values and indvars"" It seems that the patch was reverted by mistake. Clang testing showed failure of the MathExtras.SaturatingMultiply test, however I was unable to reproduce the issue on the fresh code base and was able to confirm that the transformation introduced by the change does not happen in the said test. This gives a strong confidence that the actual reason of the failure of the initial patch was somewhere else, and that problem now seems to be fixed. Re-submitting the change to confirm that. llvm-svn: 307244
* [ARM] GlobalISel: Legalize G_FCMP for s32Diana Picus2017-07-061-0/+654
| | | | | | | | | | | | | | | | | | | | | This covers both hard and soft float. Hard float is easy, since it's just Legal. Soft float is more involved, because there are several different ways to handle it based on the predicate: one and ueq need not only one, but two libcalls to get a result. Furthermore, we have large differences between the values returned by the AEABI and GNU functions. AEABI functions return a nice 1 or 0 representing true and respectively false. GNU functions generally return a value that needs to be compared against 0 (e.g. for ogt, the value returned by the libcall is > 0 for true). We could introduce redundant comparisons for AEABI as well, but they don't seem easy to remove afterwards, so we do different processing based on whether or not the result really needs to be compared against something (and just truncate if it doesn't). llvm-svn: 307243
* [globalisel][tablegen] Import rules containing intrinsic_wo_chain.Daniel Sanders2017-07-061-39/+76
| | | | | | | | | | | | | | | | | Summary: As of this patch, 1018 out of 3938 rules are currently imported. Depends on D32275 Reviewers: qcolombet, kristof.beyls, rovka, t.p.northover, ab, aditya_nandakumar Reviewed By: qcolombet Subscribers: dberris, igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D32278 llvm-svn: 307240
* [ARM] GlobalISel: Widen s1, s8, s16 G_CONSTANTDiana Picus2017-07-061-0/+15
| | | | | | Get the legalizer to widen small constants. llvm-svn: 307239
* [GlobalOpt] Remove unreachable blocks before optimizing a function.Davide Italiano2017-07-051-0/+17
| | | | | | | | | | | | | | | | | LLVM's definition of dominance allows instructions that are cyclic in unreachable blocks, e.g.: %pat = select i1 %condition, @global, i16* %pat because any instruction dominates an instruction in a block that's not reachable from entry. So, remove unreachable blocks from the function, because a) there's no point in analyzing them and b) GlobalOpt should otherwise grow some more complicated logic to break these cycles. Differential Revision: https://reviews.llvm.org/D35028 llvm-svn: 307215
* Fix libcall expansion creating DAG nodes with invalid type post type ↵Vadim Chugunov2017-07-051-0/+21
| | | | | | | | | | | | legalization. If we are lowering a libcall after legalization, we'll split the return type into a pair of legal values. Patch by Jatin Bhateja and Eli Friedman. Differential Revision: https://reviews.llvm.org/D34240 llvm-svn: 307207
* [DependenceAnalysis] Make sure base objects are the same when comparing GEPsBrendon Cahoon2017-07-051-0/+80
| | | | | | | | | | | | | | | The dependence analysis was returning incorrect information when using the GEPs to compute dependences. The analysis uses the GEP indices under certain conditions, but was doing it incorrectly when the base objects of the GEP are aliases, but pointing to different locations in the same array. This patch adds another check for the base objects. If the base pointer SCEVs are not equal, then the dependence analysis should fall back on the path that uses the whole SCEV for the dependence check. This fixes PR33567. Differential Revision: https://reviews.llvm.org/D34702 llvm-svn: 307203
* [WebAssembly] Fix types for address taken functionsSam Clegg2017-07-051-20/+29
| | | | | | Differential Revision: https://reviews.llvm.org/D34966 llvm-svn: 307198
* [WebAssembly] MC: Don't generate extra types for weak aliasSam Clegg2017-07-051-1/+8
| | | | | | | | | | Previously we were generating a void(void) function type for a weak alias. Update the weak-alias test case to catch this. Differential Revision: https://reviews.llvm.org/D34734 llvm-svn: 307194
* Add a test for relocation addend on mips.Rafael Espindola2017-07-051-0/+21
| | | | | | | An lld test found a bug in a llvm patch I am working on. It is better to have test coverage for that in llvm too. llvm-svn: 307192
* [PDB] Add a test that verifies every known type record.Zachary Turner2017-07-058-52/+622
| | | | | | | | | | | | | | We had a lot of one-off tests for this type and that type, or "every type that happens to be generated by this program I built". Eventually I got a bug report filed where we were crashing on a type that was not covered by any of these tests. So this test carefully constructs a minimal C++ program that will cause every type we support to be emitted. This ensures full coverage for type records. Differential Revision: https://reviews.llvm.org/D34915 llvm-svn: 307187
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