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* [SimplifyCFG] Update the name of switch generated lookup table.Sumanth Gundapaneni2017-06-303-18/+18
| | | | | | | | | | This patch appends the name of the function to the switch generated lookup table. This will ease the visual debugging in identifying the function the table is generated from. Differential Revision: https://reviews.llvm.org/D34817 llvm-svn: 306867
* ARM: fix big-endian 64-bit cmpxchg.Tim Northover2017-06-301-0/+26
| | | | | | | | | | On big-endian machines the high and low parts of the value accessed by ldrexd and strexd are swapped around. To account for this we swap inputs and outputs in ISelLowering. Patch by Bharathi Seshadri. llvm-svn: 306865
* [PowerPC] auto-generate check lines; NFCSanjay Patel2017-06-301-70/+58
| | | | | | | | | | | The existing check lines were more flexible, but these are small enough tests that there shouldn't be much question about register allocation. I've been hand-modifying this file as I change the CGP memcmp expansion, but that's more error-prone and time-consuming than just running the update script. llvm-svn: 306861
* Fix test broken by parameter mixup.Zachary Turner2017-06-302-15/+15
| | | | llvm-svn: 306856
* Fix bug in symbol generation for resource COFFEric Beckmann2017-06-301-0/+33
| | | | | | | | | | | | Symbols in the resource COFF file should be for .rsrc$02, where the actual resource data is, not .rsrc$01, which contains the directory tree. Differential Revision: https://reviews.llvm.org/D34832 Patch by Joe Ranieri. llvm-svn: 306853
* [llvm-pdbutil] Add the ability to dump the dependency tree for a typeZachary Turner2017-06-301-0/+30
| | | | | | | | | | | | | | | Previously we had the -type-index option which would dump the record of a single, but we had no way to follow the dependency graph backwards and also dump all dependent types. Having this option makes test-writing better, because we can limit the test to only those records that are of importance for the thing we're trying to test, which allows us to use things like CHECK-NEXT to reduce fragility. Differential Revision: https://reviews.llvm.org/D34899 llvm-svn: 306852
* [RuntimeUnrolling] Add logic for loops with multiple exit blocksAnna Thomas2017-06-301-0/+279
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: Runtime unrolling is done for loops with a single exit block and a single exiting block (and this exiting block should be the latch block). This patch adds logic to support unrolling in the presence of multiple exit blocks (which also means multiple exiting blocks). Currently this is under an off-by-default option and is supported when epilog code is generated. Support in presence of prolog code will be in a future patch (we just need to add more tests, and update comments). This patch is essentially an implementation patch. I have not added any heuristic (in terms of branches added or code size) to decide when this should be enabled. Reviewers: mkuper, sanjoy, reames, evstupac Reviewed by: reames Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33001 llvm-svn: 306846
* Revert "[lit] Clean output directories before running tests."Zachary Turner2017-06-3012-53/+35
| | | | | | | | | This reverts commit da6318a92fba793e4f2447ec478b001392d57d43. This is causing failures on some build bots due to what appears to be some kind of lit ordering dependency. llvm-svn: 306833
* [lit] Clean output directories before running tests.Zachary Turner2017-06-3012-35/+53
| | | | | | | | | | | | | | | | | | Presently lit leaks files in the tests' output directories. Specifically, if a test creates output files, lit makes no effort to remove them prior to the next test run. This is problematic because it leads to false positives whenever a test passes because stale files were present. In general it is a source of flakiness that should be removed. This patch addresses this by building the list of all test directories that are part of the current run set, and then deleting those directories and recreating them anew. This gives each test a clean baseline to start from. Differential Revision: https://reviews.llvm.org/D34732 llvm-svn: 306832
* [MIPS] Handle PIC load address macro instructions in N64.Simon Dardis2017-06-302-0/+71
| | | | | | | | | | | | | | | | | | | | In particular, use CALL16 (similar to O32) for address loads into T9 for certain cases. Otherwise use a %got_disp relocation to load the address of a symbol. Small offsets (small enough to fit in a 16-bit signed immediate) can be used and are added to the symbol address after it is loaded from the GOT. Larger offsets are currently unsupported and result in an error from the assembler. Reviewers: sdardis Reviewed By: sdardis Patch by: John Baldwin Subscribers: llvm-commits, seanbruno, arichardson, emaste, dim Differential Revision: https://reviews.llvm.org/D33948 llvm-svn: 306831
* [SLP] A test for limiting vectorization of instructions, NFC.Alexey Bataev2017-06-301-0/+70
| | | | llvm-svn: 306828
* [LTO] Remove values from non-prevailing comdatsTeresa Johnson2017-06-302-0/+65
| | | | | | | | | | | | | | | | | | | | | | | Summary: When linking a regular LTO module, if it has any non-prevailing values (dropped to available_externally) in comdats, we need to do more than just remove those values from their comdat. We also remove all values from that comdat, so as to avoid leaving an incomplete comdat. This is necessary in case we are compiling in mixed regular and ThinLTO mode, since the resulting regularLTO native object is always linked into the final binary first. We need to prevent the linker from selecting an incomplete comdat that was not the prevailing copy. Fixes PR32980. Reviewers: pcc, rafael Subscribers: mehdi_amini, david2050, llvm-commits, inglorion Differential Revision: https://reviews.llvm.org/D34803 llvm-svn: 306826
* [SystemZ] Add missing high-word facility instructionsUlrich Weigand2017-06-304-0/+454
| | | | | | | | | | | There are a few instructions provided by the high-word facility (z196) that we cannot easily exploit for code generation. This patch at least adds those missing instructions for the assembler and disassembler. This means that now all nonprivileged instructions up to z13 are supported by the LLVM assembler / disassembler. llvm-svn: 306821
* Revert "[DAG] Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset"Nirav Dave2017-06-308-163/+209
| | | | | | | This reverts commit r306819 which appears be exposing underlying issues in a stage1 ppc64be build llvm-svn: 306820
* [DAG] Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffsetNirav Dave2017-06-308-209/+163
| | | | | | | | | | | | | | | | | | | | | | | | As discussed in D34087, rewrite areNonVolatileConsecutiveLoads using generic checks. Also, propagate missing local handling from there to BaseIndexOffset checks. Tests of note: * test/CodeGen/X86/build-vector* - Improved. * test/CodeGen/BPF/undef.ll - Improved store alignment allows an additional store merge * test/CodeGen/X86/clear_upper_vector_element_bits.ll - This is a case we already do not handle well. Here, the DAG is improved, but scheduling causes a code size degradation. Reviewers: RKSimon, craig.topper, spatel, andreadb, filcab Subscribers: nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D34472 llvm-svn: 306819
* [X86] Updated 32-bit memcmp tests to run with/without SSE2Simon Pilgrim2017-06-301-347/+402
| | | | llvm-svn: 306816
* Revert of r306525: "Canonicalize clamp of float types to minmax"Nikolai Bozhenov2017-06-301-28/+27
| | | | llvm-svn: 306815
* [YAML] - Teach yaml2obj/obj2yaml to work with numeric relocation values.George Rimar2017-06-301-0/+29
| | | | | | | | | | | | | That may be useful if we want to produce or parse object containing broken relocation values using yaml2obj/obj2yaml. Previously that was impossible because only enum values were parsed correctly, this patch allows to put any numeric value as a relocation type. Differential revision: https://reviews.llvm.org/D34758 llvm-svn: 306814
* fix trivial typos, NFCHiroshi Inoue2017-06-301-2/+2
| | | | llvm-svn: 306808
* [LV] Optimize for size when vectorizing loops with tiny trip countAyal Zaks2017-06-302-5/+32
| | | | | | | | | | | | | | | | | It may be detrimental to vectorize loops with very small trip count, as various costs of the vectorized loop body as well as enclosing overheads including runtime tests and scalar iterations may outweigh the gains of vectorizing. The current cost model measures the cost of the vectorized loop body only, expecting it will amortize other costs, and loops with known or expected very small trip counts are not vectorized at all. This patch allows loops with very small trip counts to be vectorized, but under OptForSize constraints, which ensure the cost of the loop body is dominant, having no runtime guards nor scalar iterations. Patch inspired by D32451. Differential Revision: https://reviews.llvm.org/D34373 llvm-svn: 306803
* [InstCombine] Add test cases to demonstrate failure to fold (a | b) ^ (~a | ↵Craig Topper2017-06-302-0/+152
| | | | | | ~b) --> ~(a ^ b) and its commuted variants. llvm-svn: 306801
* [InstCombine] In foldXorToXor, move the commutable matcher from the LHS ↵Craig Topper2017-06-302-8/+8
| | | | | | | | | | match to the RHS match. No meaningful change intended. There are two conditions ORed here with similar checks and each contain two matches that must be true for the if to succeed. With the commutable match on the first half of the OR then both ifs basically have the same first part and only the second part distinguishs. With this change we move the commutable match to second half and make the first half unique. This caused some tests to change because we now produce a commuted result, but this shouldn't matter in practice. llvm-svn: 306800
* Remove the BBVectorize pass.Chandler Carruth2017-06-3032-2833/+1
| | | | | | | | | | | | | It served us well, helped kick-start much of the vectorization efforts in LLVM, etc. Its time has come and past. Back in 2014: http://lists.llvm.org/pipermail/llvm-dev/2014-November/079091.html Time to actually let go and move forward. =] I've updated the release notes both about the removal and the deprecation of the corresponding C API. llvm-svn: 306797
* [llvm-readobj] Improve printouts for COFF ARM64 binariesMartin Storsjo2017-06-302-0/+17
| | | | | | Differential Revision: https://reviews.llvm.org/D34835 llvm-svn: 306795
* [llvm-readobj] Include the PE magic value in printoutsMartin Storsjo2017-06-302-0/+2
| | | | | | | | This is useful for a testcase in lld. Differential Revision: https://reviews.llvm.org/D34836 llvm-svn: 306794
* Revert "r306541 - Add zero-length check to memcpy/memset load store loop ↵Daniel Jasper2017-06-301-4/+0
| | | | | | | | | expansion" Segfaults in non-optimized builds. I'll get a stack trace and a reproducer to Teresa. llvm-svn: 306793
* Revert "r306473 - re-commit r306336: Enable vectorizer-maximize-bandwidth by ↵Daniel Jasper2017-06-3011-76/+67
| | | | | | | | | default." This still breaks PPC tests we have. I'll forward reproduction instructions to dehao. llvm-svn: 306792
* [SCEV] Use depth limit instead of local cache for SExt and ZExtMax Kazantsev2017-06-301-1/+57
| | | | | | | | | | | | | | | | In rL300494 there was an attempt to deal with excessive compile time on invocations of getSign/ZeroExtExpr using local caching. This approach only helps if we request the same SCEV multiple times throughout recursion. But in the bug PR33431 we see a case where we request different values all the time, so caching does not help and the size of the cache grows enormously. In this patch we remove the local cache for this methods and add the recursion depth limit instead, as we do for arithmetics. This gives us a guarantee that the invocation sequence is limited and reasonably short. Differential Revision: https://reviews.llvm.org/D34273 llvm-svn: 306785
* [Dominators] Don't compute DFS InOut numbers eagerly.Jakub Kuderski2017-06-301-1/+1
| | | | | | | | | | | | | | | | | Summary: DFS InOut numbers currently get eagerly computer upon DomTree construction. They are only needed to answer dome dominance queries and they get invalidated by updates and recalculations. Because of that, it is faster in practice to compute them lazily when they are actually needed. Clang built without this patch takes 6m 45s to boostrap on my machine, and with the patch applied 6m 38s. Reviewers: sanjoy, dberlin, chandlerc Reviewed By: dberlin Subscribers: davide, llvm-commits Differential Revision: https://reviews.llvm.org/D34296 llvm-svn: 306778
* [WebAssembly] Add support for exception handling instructionsHeejin Ahn2017-06-301-0/+22
| | | | | | | | | | | | | | | | | | | Summary: This adds backend support for throw, rethrow, try, and try_end instructions. This needs the corresponding clang builtin support: https://reviews.llvm.org/D34783 This follows the Wasm exception handling proposal in https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md Reviewers: sunfish, dschuff Reviewed By: dschuff Subscribers: jfb, sbc100, jgravelle-google Differential Revision: https://reviews.llvm.org/D34826 llvm-svn: 306774
* Unified logic for computing target ABI in backend and front end by moving ↵Eric Christopher2017-06-306-7/+7
| | | | | | | | | | this common code to Support/TargetParser. Modeled Triple::GNU after front end code (aapcs abi) and updated tests that expect apcs abi. Based heavily on a patch by Ana Pazos! llvm-svn: 306768
* [GISel]: New Opcode G_FLOG/G_FLOG2Aditya Nandakumar2017-06-291-0/+19
| | | | | | https://reviews.llvm.org/D34837 llvm-svn: 306766
* Remove redundant copy in recurrencesTaewook Oh2017-06-292-1/+234
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: If there is a chain of instructions formulating a recurrence, commuting operands can help removing a redundant copy. In the following example code, ``` BB#1: ; Loop Header %vreg0<def> = COPY %vreg13<kill>; GR32:%vreg0,%vreg13 ... BB#6: ; Loop Latch %vreg2<def> = COPY %vreg15<kill>; GR32:%vreg2,%vreg15 %vreg10<def,tied1> = ADD32rr %vreg1<kill,tied0>, %vreg0<kill>, %EFLAGS<imp-def,dead>; GR32:%vreg10,%vreg1,%vreg0 %vreg3<def,tied1> = ADD32rr %vreg2<kill,tied0>, %vreg10<kill>, %EFLAGS<imp-def,dead>; GR32:%vreg3,%vreg2,%vreg10 CMP32ri8 %vreg3, 10, %EFLAGS<imp-def>; GR32:%vreg3 %vreg13<def> = COPY %vreg3<kill>; GR32:%vreg13,%vreg3 JL_1 <BB#1>, %EFLAGS<imp-use,kill> ``` Existing two-address generation pass generates following code: ``` BB#1: %vreg0<def> = COPY %vreg13<kill>; GR32:%vreg0,%vreg13 ... BB#6: Predecessors according to CFG: BB#5 BB#4 %vreg2<def> = COPY %vreg15<kill>; GR32:%vreg2,%vreg15 %vreg10<def> = COPY %vreg1<kill>; GR32:%vreg10,%vreg1 %vreg10<def,tied1> = ADD32rr %vreg10<tied0>, %vreg0<kill>, %EFLAGS<imp-def,dead>; GR32:%vreg10,%vreg0 %vreg3<def> = COPY %vreg10<kill>; GR32:%vreg3,%vreg10 %vreg3<def,tied1> = ADD32rr %vreg3<tied0>, %vreg2<kill>, %EFLAGS<imp-def,dead>; GR32:%vreg3,%vreg2 CMP32ri8 %vreg3, 10, %EFLAGS<imp-def>; GR32:%vreg3 %vreg13<def> = COPY %vreg3<kill>; GR32:%vreg13,%vreg3 JL_1 <BB#1>, %EFLAGS<imp-use,kill> JMP_1 <BB#7> ``` This is suboptimal because the assembly code generated has a redundant copy at the end of #BB6 to feed %vreg13 to BB#1: ``` .LBB0_6: addl %esi, %edi addl %ebx, %edi cmpl $10, %edi movl %edi, %esi jl .LBB0_1 ``` This redundant copy can be elimiated by making instructions in the recurrence chain to compute the value "into" the register that actually holds the feedback value. In this example, this can be achieved by commuting %vreg0 and %vreg1 to compute %vreg10. With that change, code after two-address generation becomes ``` BB#1: %vreg0<def> = COPY %vreg13<kill>; GR32:%vreg0,%vreg13 ... BB#6: derived from LLVM BB %bb7 Predecessors according to CFG: BB#5 BB#4 %vreg2<def> = COPY %vreg15<kill>; GR32:%vreg2,%vreg15 %vreg10<def> = COPY %vreg0<kill>; GR32:%vreg10,%vreg0 %vreg10<def,tied1> = ADD32rr %vreg10<tied0>, %vreg1<kill>, %EFLAGS<imp-def,dead>; GR32:%vreg10,%vreg1 %vreg3<def> = COPY %vreg10<kill>; GR32:%vreg3,%vreg10 %vreg3<def,tied1> = ADD32rr %vreg3<tied0>, %vreg2<kill>, %EFLAGS<imp-def,dead>; GR32:%vreg3,%vreg2 CMP32ri8 %vreg3, 10, %EFLAGS<imp-def>; GR32:%vreg3 %vreg13<def> = COPY %vreg3<kill>; GR32:%vreg13,%vreg3 JL_1 <BB#1>, %EFLAGS<imp-use,kill> JMP_1 <BB#7> ``` and the final assembly does not have redundant copy: ``` .LBB0_6: addl %edi, %eax addl %ebx, %eax cmpl $10, %eax jl .LBB0_1 ``` Reviewers: qcolombet, MatzeB, wmi Reviewed By: wmi Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31821 llvm-svn: 306758
* [ThinkLTO] Invoke build(Thin)?LTOPreLinkDefaultPipeline.Tim Shen2017-06-291-6/+6
| | | | | | | | | | | | | Previously it doesn't actually invoke the designated new PM builder functions. This patch moves NameAnonGlobalPass out from PassBuilder, as Chandler points out that PassBuilder is used for non-O0 builds, and for optimizations only. Differential Revision: https://reviews.llvm.org/D34728 llvm-svn: 306756
* Revert "[mips] Fix multiprecision arithmetic."Simon Dardis2017-06-296-444/+233
| | | | | | | This reverts commit r305389. This broke chromium builds, so reverting while I investigate further. llvm-svn: 306741
* [CodeGenPrepare] Don't create inttoptr for ni ptrsKeno Fischer2017-06-291-0/+68
| | | | | | | | | | | | | Summary: Arguably non-integral pointers probably shouldn't show up here at all, but since the backend doesn't complain and this takes valid (according to the Verifier) IR and makes it invalid, make sure not to introduce any inttoptr instructions if we're dealing with non-integral pointers. Reviewed By: sanjoy Differential Revision: https://reviews.llvm.org/D33110 llvm-svn: 306737
* [DWARF] Added verification checks for the .apple_names section.Spyridoula Gravani2017-06-297-366/+219
| | | | | | | | This patch verifies the number of atoms, the validity of the form for each atom, as well as the validity of the hashdata. For hashdata, we're verifying that the hashdata offset is correct and that the offset in the .debug_info for each DIE in the hashdata is also valid. llvm-svn: 306735
* [AliasSetTracker] Don't drop AA MD so eagerlyKeno Fischer2017-06-291-0/+90
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: When we have patterns like loop: %la = load %ptr, !tbaa %lba = load %ptr, !tbaa !noalias AliasSetTracker would previously think that the two types of annotation for the pointer conflict, dropping both for the purpose of determining alias sets. That is clearly way too conservative, as the tbaa is still valid whether or not one of the memory accesses has additional AA metadata. We could go one step further and attempt to properly merge the AA metadata, but it's not clear that that would be worth it since that may introduce additional MD nodes, which may be undesirable since this is merely an Analysis. Reviewers: hfinkel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32139 llvm-svn: 306727
* Reverting r306695 while investigating failing test case.Alexandre Isoard2017-06-292-37/+0
| | | | | | | Failing test case: Transforms/LoopVectorize.iv_outside_user.ll llvm-svn: 306723
* llvm-nm: Add support for symbol demangling (-C/--demangle)Sam Clegg2017-06-291-0/+37
| | | | | | Differential Revision: https://reviews.llvm.org/D34668 llvm-svn: 306718
* [ConstantHoisting] Avoid hoisting constants in GEPs that index into a struct ↵Leo Li2017-06-291-0/+37
| | | | | | | | | | | | | | | | | | | | | type. Summary: Indices for GEPs that index into a struct type should always be constants. This added more checks in `collectConstantCandidates:` which make sure constants for GEP pointer type are not hoisted. This fixed Bug https://bugs.llvm.org/show_bug.cgi?id=33538 Reviewers: ributzka, rnk Reviewed By: ributzka Subscribers: efriedma, llvm-commits, srhines, javed.absar, pirama Differential Revision: https://reviews.llvm.org/D34576 llvm-svn: 306704
* ScalarEvolution: Add URem supportAlexandre Isoard2017-06-292-0/+37
| | | | | | | | | | | | | | | | | | | | In LLVM IR the following code: %r = urem <ty> %t, %b is equivalent to: %q = udiv <ty> %t, %b %s = mul <ty> nuw %q, %b %r = sub <ty> nuw %t, %q ; (t / b) * b + (t % b) = t As UDiv, Mul and Sub are already supported by SCEV, URem can be implemented with minimal effort this way. Note: While SRem and SDiv are also related this way, SCEV does not provides SDiv yet. llvm-svn: 306695
* [Hexagon] Keep all phi nodes when building DFG in addr-mode-optKrzysztof Parzyszek2017-06-291-0/+30
| | | | | | | The dead phis are needed for finding correct would-be reaching defs in register propagation. llvm-svn: 306690
* [llvm-objdump] Handle invalid instruction gracefully on ARMEugene Leviant2017-06-291-0/+9
| | | | | | Differential revision: https://reviews.llvm.org/D34813 llvm-svn: 306687
* bpf: remove unnecessary truncate operationYonghong Song2017-06-292-0/+152
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For networking-type bpf program, it often needs to access packet data. A context data structure is provided to the bpf programs with two fields: u32 data; u32 data_end; User can access these two fields with ctx->data and ctx->data_end. During program verification process, the kernel verifier modifies the bpf program with loading of actual pointer value from kernel data structure. r = ctx->data ===> r = actual data start ptr r = ctx->data_end ===> r = actual data end ptr A typical program accessing ctx->data like char *data_ptr = (char *)(long)ctx->data will result in a 32-bit load followed by a zero extension. Such an operation is combined into a single LDW in DAG combiner as bpf LDW does zero extension automatically. In cases like the below (which can be a result of global value numbering and partial redundancy elimination before insn selection): B1: u32 a = load-32-bit &ctx->data u64 pa = zext a ... B2: u32 b = load-32-bit &ctx->data u64 pb = zext b ... B3: u32 m = PHI(a, b) u64 pm = zext m In B3, "pm = zext m" cannot be removed, which although is legal from compiler perspective, will generate incorrect code after kernel verification. This patch recognizes this pattern and traces through PHI node to see whether the operand of "zext m" is defined with LDWs or not. If it is, the "zext m" itself can be removed. The patch also recognizes the pattern where the load and use of the load value not in the same basic block, where truncate operation may be removed as well. The patch handles 1-byte, 2-byte and 4-byte truncation. Two test cases are added to verify the transformation happens properly for the above code pattern. Signed-off-by: Yonghong Song <yhs@fb.com> llvm-svn: 306685
* [NFC] Use stdin for some tests instead of positional argument.Nikolai Bozhenov2017-06-293-4/+4
| | | | | | | | | | | | | | | | Summary: Otherwise unexpected matches with the path to the tests might happen. Reviewers: rengolin, spatel, efriedma, RKSimon Reviewed By: spatel Subscribers: n.bozhenov, javed.absar, llvm-commits Patch by Andrei Elovikov <andrei.elovikov@intel.com> Differential Revision: https://reviews.llvm.org/D32994 llvm-svn: 306684
* Restore original intent of memset instcombine testDaniel Neilson2017-06-291-4/+13
| | | | | | | | | | | | | | | | | Summary: The original intent of test/Transforms/InstCombine/memset.ll was to test for lowering of llvm.memset into stores when the size of the memset is 1, 2, 4, or 8. Sometime between then and now the test has stopped testing for that, but remained passing due to testing for the absence of llvm.memset calls rather than the presence of store instructions. Right now this test ends up with an empty function body because the alloca is eliminated as safe-to-remove, which results in the llvm.memset calls's being eliminated due to their pointer args being undef; so it is not testing for conversion of llvm.memset into store instructions at all. This change alters the test to verify that store instructions are created, and moves the target of the memset to an arg of the proc to avoid it being eliminated as unused. Reviewers: anna, efriedma Reviewed By: efriedma Subscribers: efriedma, llvm-commits Differential Revision: https://reviews.llvm.org/D34642 llvm-svn: 306681
* Explicitly check for presence of correct results in instcombine memmove testDaniel Neilson2017-06-291-17/+31
| | | | | | | | | | | | | | | | | Summary: Rather than testing for expected results, test/Transforms/InstCombine/memmove.ll is testing for the absence of calls to llvm.memmove. In the case of test3, the test has stopped testing for materialization of loads/stores, but remained passing due to testing for the absence of llvm.memset calls rather than the presence of load/store instructions. Right now this test ends up with an empty function body because the alloca is eliminated as safe-to-remove, which results in the llvm.memmove calls being eliminated due to a pointer arg being undef; so it is not testing for conversion of llvm.memmove into load/store instructions at all. Reviewers: eli.friedman, anna, efriedma Reviewed By: efriedma Subscribers: efriedma, llvm-commits Differential Revision: https://reviews.llvm.org/D34645 llvm-svn: 306679
* [PowerPC] fix potential verification error on __tls_get_addrHiroshi Inoue2017-06-292-0/+131
| | | | | | | | | | This patch fixes a verification error with -verify-machineinstrs while expanding __tls_get_addr by not creating ADJCALLSTACKUP and ADJCALLSTACKDOWN if there is another ADJCALLSTACKUP in this basic block since nesting ADJCALLSTACKUP/ADJCALLSTACKDOWN is not allowed. Here, ADJCALLSTACKUP and ADJCALLSTACKDOWN are created as a fence for instruction scheduling to avoid _tls_get_addr is scheduled before mflr in the prologue (https://bugs.llvm.org//show_bug.cgi?id=25839). So if another ADJCALLSTACKUP exists before _tls_get_addr, we do not need to create a new ADJCALLSTACKUP. Differential Revision: https://reviews.llvm.org/D34347 llvm-svn: 306678
* Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"Daniel Jasper2017-06-2955-1058/+243
| | | | | | | | | | I am 99% sure that this breaks the PPC ASAN build bot: http://lab.llvm.org:8011/builders/sanitizer-ppc64be-linux/builds/3112/steps/64-bit%20check-asan/logs/stdio If it doesn't go back to green, we can recommit (and fix the original commit message at the same time :) ). llvm-svn: 306676
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