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* [InstCombine] Add test cases for BITWISE_OP( BSWAP(x), CONSTANT ) -> BSWAP( B...Craig Topper2017-07-031-0/+33
* [InstCombine] Support BITWISE_OP(BSWAP(A),BSWAP(B))->BSWAP(BITWISE_OP(A, B)) ...Craig Topper2017-07-031-12/+9
* [InstCombine] Add test cases showing missed opportunity to fold BITWISE_OP(BS...Craig Topper2017-07-031-0/+40
* AMDGPU: Add operand target flags serializationMatt Arsenault2017-07-021-0/+29
* [X86][AVX512] Test AVX512VPOPCNTDQ CTPOP with/without AVX512BWSimon Pilgrim2017-07-021-29/+57
* [X86][AVX512VPOPCNTDQ] Improve support for v16i8/v8i16/v16i16/ CTPOPSimon Pilgrim2017-07-026-156/+111
* [X86][AVX512] Cleanup tzcnt tests triples and attributesSimon Pilgrim2017-07-021-36/+36
* [X86][AVX512] Cleanup popcnt tests triples and attributesSimon Pilgrim2017-07-021-15/+15
* [InstCombine] fix crash when folding cmp+bswap vectorSanjay Patel2017-07-022-30/+36
* [x86] auto-generate complete checks for tests; NFCSanjay Patel2017-07-024-72/+126
* [x86] remove unnecessary RUN for test after auto-generating checks; NFCSanjay Patel2017-07-021-5/+21
* [x86] update test to use FileCheck and auto-generate checks; NFCSanjay Patel2017-07-021-1/+50
* [x86] auto-generate complete checks for tests; NFCSanjay Patel2017-07-024-32/+41
* [InstCombine] look through bswap/bitreverse for equality comparisonsSanjay Patel2017-07-021-12/+4
* llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll: -debug is availab...NAKAMURA Takumi2017-07-021-0/+1
* [X86][SSE] Attempt to combine 64-bit and 32-bit shuffles to unary shuffles be...Simon Pilgrim2017-07-022-2/+2
* [X86][SSE] Attempt to combine 64-bit and 16-bit shuffles to unary shuffles be...Simon Pilgrim2017-07-021-5/+2
* [X86][SSE] Add test showing missed opportunity to combine to pshuflwSimon Pilgrim2017-07-021-0/+18
* [X86][CM] update add\sub costs of vectors of 64 in X86\SLM archMohammed Agabaria2017-07-022-7/+69
* [X86] Rerun "update_llc_test_checks" tool on CodeGen tests. NFC.Gadi Haber2017-07-023-0/+75
* [GlobalISel][X86] Support G_GLOBAL_VALUE operation.Igor Breger2017-07-024-0/+220
* [GlobalISel][X86] Support vector type G_UNMERGE_VALUES selection.Igor Breger2017-07-023-17/+283
* fix trivial typos; NFCHiroshi Inoue2017-07-021-1/+1
* [InstCombine] Fold (a | b) ^ (~a | ~b) --> ~(a ^ b) and (a & b) ^ (~a & ~b) -...Craig Topper2017-07-022-32/+16
* [X86][RDSEED] Split off i64 intrinsic tests and test i16/i32 on 32-bit target...Simon Pilgrim2017-07-012-29/+56
* [X86][RDRAND] Split off i64 intrinsic tests and test i16/i32 on 32-bit target...Simon Pilgrim2017-07-012-36/+102
* [X86] Removed reference to update_test_checks.pySimon Pilgrim2017-07-011-1/+1
* [X86][AVX] Remove duplicate autogeneration noteSimon Pilgrim2017-07-011-3/+2
* fix trivial typos, NFCHiroshi Inoue2017-07-011-2/+2
* [AVR] Remove a bunch of now-obselete testsDylan McKay2017-07-014-20/+0
* Remove the default ARMSubtarget from the ARM TargetMachine.Eric Christopher2017-07-011-10/+0
* [Cloner] Re-map simplfied cloned instructions.Davide Italiano2017-07-011-0/+25
* Recommit "r306541 - Add zero-length check to memcpy/memset load store loop ex...Teresa Johnson2017-07-011-0/+4
* Revert "r306473 - re-commit r306336: Enable vectorizer-maximize-bandwidth by ...Teresa Johnson2017-07-0111-76/+67
* re-commit r306336: Enable vectorizer-maximize-bandwidth by default.Teresa Johnson2017-07-0111-67/+76
* revert r306336 for breaking ppc test.Teresa Johnson2017-07-0111-76/+67
* Enable vectorizer-maximize-bandwidth by default.Teresa Johnson2017-07-0111-67/+76
* Rewrite ARM execute only support to avoid the use of a command line flag and ...Eric Christopher2017-07-014-15/+15
* [ORE] Add diagnostics hotness thresholdBrian Gesiak2017-06-302-1/+44
* [llvm-pdbutil] Output the symbol offset when dumping.Zachary Turner2017-06-301-50/+50
* [codeview] Use the first valid source location at the top of every MBBReid Kleckner2017-06-302-1/+98
* [Hexagon] Implement frame pointer elimination with -fomit-frame-pointerKrzysztof Parzyszek2017-06-303-24/+92
* [LV] Sink casts to unravel first order recurrenceAyal Zaks2017-06-301-0/+80
* Fix ODR violations due to abuse of LLVM_YAML_IS_(FLOW_)?SEQUENCE_VECTORRichard Smith2017-06-304-8/+19
* [Hexagon] Guard the generation of lookup tableSumanth Gundapaneni2017-06-302-0/+67
* [SystemZ] Add all remaining instructionsUlrich Weigand2017-06-309-3/+4172
* GlobalISel: add G_IMPLICIT_DEF instruction.Tim Northover2017-06-306-22/+52
* [Hexagon] Emit jump tables in text section based on a flagSumanth Gundapaneni2017-06-301-0/+57
* Revert "[Hexagon] Guard the generation of lookup table"Sumanth Gundapaneni2017-06-301-57/+0
* [Hexagon] Guard the generation of lookup tableSumanth Gundapaneni2017-06-301-0/+57
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