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* [EarlyCSE] Correctly handle simplified, but live, instructionsDavid Majnemer2016-07-291-0/+14
| | | | | | | | | Some instructions may have their uses replaced with a symbolic constant. However, the instruction may still have side effects which percludes it from being removed from the function. EarlyCSE treated such an instruction as if it were removed, resulting in PR28763. llvm-svn: 277114
* [ConstantFolding] Fold bitcasts of vectors w/ undef elementsDavid Majnemer2016-07-291-0/+6
| | | | | | | | An undef vector element can be treated as if it had any value. Folding such a vector element to 0 in a bitcast can open up further folding opportunities. llvm-svn: 277104
* [ConstantFolding] Use ConstantExpr::getWithOperandsDavid Majnemer2016-07-292-2/+2
| | | | | | | | | ConstantExpr::getWithOperands does much of the hard work that ConstantFoldInstOperandsImpl tries to do but more completely. This lets us fold ExtractValue/InsertValue expressions. llvm-svn: 277100
* [ConstnatFolding] Teach the folder how to fold ConstantVectorDavid Majnemer2016-07-291-3/+1
| | | | | | | | | | | A ConstantVector can have ConstantExpr operands and vice versa. However, the folder had no ability to fold ConstantVectors which, in some cases, was an optimization barrier. Instead, rephrase the folder in terms of Constants instead of ConstantExprs and teach callers how to deal with failure. llvm-svn: 277099
* [AVX512] Remove the intrinsic forms of VMOVSS/VMOVSD. We don't need two ↵Craig Topper2016-07-292-2/+2
| | | | | | | | different forms of 'rr' and 'rm'. This matches SSE/AVX. I'm not convinced the patterns for the rm_Int was correct anyway. It had a tied source that should't exist for the unmasked version. The load form of MOVSS always zeros the most significant bits. I've left the patterns off the masked load instructions as I'm not sure what the correct pattern should be and we don't have any tests currently. Nor do we implement masked scalar load intrinsics in clang currently. llvm-svn: 277098
* Capture stderr when checking for gold versionTeresa Johnson2016-07-291-3/+5
| | | | | | | On MacOS the ld version is emitted to stderr, resulting in lots of messages in the ninja check output. llvm-svn: 277092
* Added ThinLTO inlining statisticsPiotr Padlewski2016-07-291-0/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: copypasta doc of ImportedFunctionsInliningStatistics class \brief Calculate and dump ThinLTO specific inliner stats. The main statistics are: (1) Number of inlined imported functions, (2) Number of imported functions inlined into importing module (indirect), (3) Number of non imported functions inlined into importing module (indirect). The difference between first and the second is that first stat counts all performed inlines on imported functions, but the second one only the functions that have been eventually inlined to a function in the importing module (by a chain of inlines). Because llvm uses bottom-up inliner, it is possible to e.g. import function `A`, `B` and then inline `B` to `A`, and after this `A` might be too big to be inlined into some other function that calls it. It calculates this statistic by building graph, where the nodes are functions, and edges are performed inlines and then by marking the edges starting from not imported function. If `Verbose` is set to true, then it also dumps statistics per each inlined function, sorted by the greatest inlines count like - number of performed inlines - number of performed inlines to importing module Reviewers: eraman, tejohnson, mehdi_amini Subscribers: mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D22491 llvm-svn: 277089
* [IR] Introduce a non-integral pointer typeSanjoy Das2016-07-281-0/+45
| | | | | | | | | | | | | | | Summary: This change adds a `ni` specifier in the `datalayout` string to denote pointers in some given address spaces as "non-integral", and adds some typing rules around these special pointers. Reviewers: majnemer, chandlerc, atrick, dberlin, eli.friedman, tstellarAMD, arsenm Subscribers: arsenm, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D22488 llvm-svn: 277085
* [BPI] Add new LazyBPI analysisAdam Nemet2016-07-282-4/+11
| | | | | | | | | | | | | | | | | | | | | | Summary: The motivation is the same as in D22141: In order to add the hotness attribute to optimization remarks we need BFI to be available in all passes that emit optimization remarks. BFI depends on BPI so unless we make this lazy as well we would still compute BPI unconditionally. The solution is to use the new LazyBPI pass in LazyBFI and only compute BPI when computation of BFI is requested by the client. I extended the laziness test using a LoopDistribute test to also cover BPI. Reviewers: hfinkel, davidxl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D22835 llvm-svn: 277083
* AMDGPU/SI: Don't handle a loop if there is no loop at all for a terminator BB.Changpeng Fang2016-07-281-0/+71
| | | | | | | | Differential Revision: http://reviews.llvm.org/D22021 Reviewed by: arsenm llvm-svn: 277073
* Do not remove empty lifetime.start/lifetime.end rangesVitaly Buka2016-07-281-0/+35
| | | | | | | | | | | | | | | | | | | | | | | Summary: Asan stack-use-after-scope check should poison alloca even if there is no access between start and end. This is possible for code like this: for (int i = 0; i < 3; i++) { int x; p = &x; } "Loop Invariant Code Motion" will move "p = &x;" out of the loop, making start/end range empty. PR27453 Reviewers: eugenis Differential Revision: https://reviews.llvm.org/D22842 llvm-svn: 277072
* Should be committed as one CL.Vitaly Buka2016-07-281-35/+0
| | | | | | This reverts commits r277068 r277067 r277066. llvm-svn: 277071
* Do not remove empty lifetime.start/lifetime.end rangesVitaly Buka2016-07-281-10/+8
| | | | | | | | | | | | | | | | | | | | | | | Summary: Asan stack-use-after-scope check should poison alloca even if there is no access between start and end. This is possible for code like this: for (int i = 0; i < 3; i++) { int x; p = &x; } "Loop Invariant Code Motion" will move "p = &x;" out of the loop, making start/end range empty. PR27453 Reviewers: eugenis Differential Revision: https://reviews.llvm.org/D22842 llvm-svn: 277068
* manedVitaly Buka2016-07-281-0/+37
| | | | llvm-svn: 277067
* [PM] Port LowerGuardIntrinsic to the new PM.Michael Kuperstein2016-07-281-0/+1
| | | | llvm-svn: 277057
* [coroutines] Part 3 of N: Adding Boilerplate for Coroutine PassesDavid Majnemer2016-07-281-0/+24
| | | | | | | | | | | | | This adds boilerplate code for all coroutine passes, the passes are no-ops for now. Also, a small test has been added to verify that passes execute in the expected order or not at all if coroutine support is disabled. Patch by Gor Nishanov! Differential Revision: https://reviews.llvm.org/D22847 llvm-svn: 277033
* Fix build breaks after r277028Krzysztof Parzyszek2016-07-281-1/+4
| | | | llvm-svn: 277031
* [Hexagon] Implement MI-level constant propagationKrzysztof Parzyszek2016-07-2810-2/+184
| | | | llvm-svn: 277028
* [Hexagon] Insert CFI instructions before throwing callsKrzysztof Parzyszek2016-07-281-0/+72
| | | | | | | | Normally, CFI instructions should be inserted after allocframe, but if allocframe is in the same packet with a call, the CFI instructions should be inserted before that packet. llvm-svn: 277020
* [AArch64][GlobalISel] Select G_BR.Ahmed Bougacha2016-07-281-0/+18
| | | | | | | This is the first unsized instruction we support; move down the 'sized' check to binops. llvm-svn: 277007
* [MIRParser] Accept unsized generic instructions.Ahmed Bougacha2016-07-282-22/+19
| | | | | | | Since r276158, we require generic instructions to have a sized type. G_BR doesn't; relax the restriction. llvm-svn: 277006
* [AArch64][GlobalISel] Select GPR G_SUB.Ahmed Bougacha2016-07-281-0/+51
| | | | llvm-svn: 277003
* [AArch64][GlobalISel] Select GPR G_AND.Ahmed Bougacha2016-07-281-0/+51
| | | | llvm-svn: 277002
* [GlobalISel] Remove types on selected insts instead of using LLT().Ahmed Bougacha2016-07-281-2/+2
| | | | | | | | | | LLT() has a particular meaning: it's one invalid type. But we really want selected instructions to have no type whatsoever. Also verify that types don't linger after ISel, and enable the verifier on the AArch64 select test. llvm-svn: 277001
* [AArch64][GlobalISel] Remove 'alignment' from MIR tests. NFC.Ahmed Bougacha2016-07-281-4/+0
| | | | llvm-svn: 277000
* AMDGPU : Add intrinsics for compare with the full wavefront resultWei Ding2016-07-282-0/+400
| | | | | | Differential Revision: http://reviews.llvm.org/D22482 llvm-svn: 276998
* Revert r276982 and r276984: [mips][fastisel] Handle 0-4 arguments without ↵Daniel Sanders2016-07-2824-50/+50
| | | | | | | | | SelectionDAG It seems that the stack offset in callabi.ll varies between machines. I'll look into it. llvm-svn: 276989
* [X86] Remove CustomInserter for FMA3 instructions. Looks like since we got ↵Craig Topper2016-07-281-2/+2
| | | | | | | | full commuting support for FMAs after this was added, the coalescer can now get this right on its own. Differential Revision: https://reviews.llvm.org/D22799 llvm-svn: 276987
* [mips][fastisel] Handle 0-4 arguments without SelectionDAG.Daniel Sanders2016-07-2824-50/+50
| | | | | | | | | | | | | | | | | | | Summary: Implements fastLowerArguments() to avoid the need to fall back on SelectionDAG for 0-4 argument functions that don't do tricky things like passing double in a pair of i32's. This allows us to move all except one test to -fast-isel-abort=3. The remaining one has function prototypes of the form 'i32 (i32, double, double)' which requires floats to be passed in GPR's. Reviewers: sdardis Subscribers: dsanders, llvm-commits, sdardis Differential Revision: https://reviews.llvm.org/D22680 llvm-svn: 276982
* AMDGPU: add execfix flag to SI_ELSENicolai Haehnle2016-07-281-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: SI_ELSE is lowered into two parts: s_or_saveexec_b64 dst, src (at the start of the basic block) s_xor_b64 exec, exec, dst (at the end of the basic block) The idea is that dst contains the exec mask of the preceding IF block. It can happen that SIWholeQuadMode decides to switch from WQM to Exact mode inside the basic block that contains SI_ELSE, in which case it introduces an instruction s_and_b64 exec, exec, s[...] which masks out bits that can correspond to both the IF and the ELSE paths. So the resulting sequence must be: s_or_savexec_b64 dst, src s_and_b64 exec, exec, s[...] <-- added by SIWholeQuadMode s_and_b64 dst, dst, exec <-- added by SILowerControlFlow s_xor_b64 exec, exec, dst Whether to add the additional s_and_b64 dst, dst, exec is currently determined via the ExecModified tracking. With this change, it is instead determined by an additional flag on SI_ELSE which is set by SIWholeQuadMode. Finally: It also occured to me that an alternative approach for the long run is for SILowerControlFlow to unconditionally emit s_or_saveexec_b64 dst, src ... s_and_b64 dst, dst, exec s_xor_b64 exec, exec, dst and have a pass that detects and cleans up the "redundant AND with exec" pattern where possible. This could be useful anyway, because we also add instructions s_and_b64 vcc, exec, vcc before s_cbranch_scc (in moveToALU), and those are often redundant. I have some pending changes to how KILL is lowered that could also benefit from such a cleanup pass. In any case, this current patch could help in the short term with the whole ExecModified business. Reviewers: tstellarAMD, arsenm Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: https://reviews.llvm.org/D22846 llvm-svn: 276972
* [ConstantFolding] Don't bail on folding if ConstantFoldConstantExpression failsDavid Majnemer2016-07-281-2/+1
| | | | | | | | | | | | When folding an expression, we run ConstantFoldConstantExpression on each operand of that expression. However, ConstantFoldConstantExpression can fail and retur nullptr. Previously, we would bail on further refining the expression. Instead, use the original operand and see if we can refine a later operand. llvm-svn: 276959
* [CodeView] Don't crash on functions without subprogramsDavid Majnemer2016-07-282-1/+45
| | | | | | | | | A function may have instructions annotated with debug info without having a subprogram. This fixes PR28747. llvm-svn: 276956
* [InstCombine] Handle failures from ConstantFoldConstantExpressionDavid Majnemer2016-07-281-0/+8
| | | | | | | | ConstantFoldConstantExpression returns null when folding fails. This fixes PR28745. llvm-svn: 276952
* Fix the assertion error in collectLoopUniforms caused by empty Worklist ↵Wei Mi2016-07-271-0/+19
| | | | | | | | | | before expanding. Contributed-by: David Callahan Differential Revision: https://reviews.llvm.org/D22886 llvm-svn: 276943
* [CFLAA] Add getModRefBehavior to CFLAnders.George Burgess IV2016-07-276-0/+25
| | | | | | | | | | | This patch lets CFLAnders respond to mod-ref queries. It also includes a small bugfix to CFLSteens. Patch by Jia Chen. Differential Revision: https://reviews.llvm.org/D22823 llvm-svn: 276939
* [llvm-cov] Add a debug mode for source range highlighting (in html)Vedant Kumar2016-07-271-18/+19
| | | | | | | llvm-cov's `-dump' option now emits information which helps debug source range highlighting in html mode. llvm-svn: 276924
* [LSV] Don't assume that bitcast ops are Instructions.Justin Lebar2016-07-271-0/+14
| | | | | | | | | | | | | | Summary: When we ask the builder to create a bitcast on a constant, we get back a constant, not an instruction. Reviewers: asbirlea Subscribers: jholewinski, mzolotukhin, llvm-commits, arsenm Differential Revision: https://reviews.llvm.org/D22878 llvm-svn: 276922
* [Hexagon] Find speculative loop preheader in hardware loop generationKrzysztof Parzyszek2016-07-271-0/+44
| | | | | | | | Before adding a new preheader block, check if there is a candidate block where the loop setup could be placed speculatively. This will be off by default. llvm-svn: 276919
* [Hexagon] Do not optimize volatile stack spill slotsKrzysztof Parzyszek2016-07-271-0/+29
| | | | llvm-svn: 276916
* Revert EH-specific checks in BranchFolding that were causing blow ups in ↵Andrew Kaylor2016-07-272-27/+28
| | | | | | | | compile time. Differential Revision: https://reviews.llvm.org/D22839 llvm-svn: 276898
* GlobalISel: support zero-sized allocasTim Northover2016-07-271-0/+3
| | | | | | | All allocas must be at least 1 byte at the MachineIR level so we allocate just one byte. llvm-svn: 276897
* [MC][X86] Fix Intel Operand assembly parsing for .set idsNirav Dave2016-07-272-0/+18
| | | | | | | | | | | | | Fix intel syntax special case identifier operands that refer to a constant (e.g. .set <ID> n) to be interpreted as immediate not memory in parsing. Reviewers: rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D22585 llvm-svn: 276895
* [X86][SSE] Updated test so that both are applying the post-multiplySimon Pilgrim2016-07-271-11/+14
| | | | | | This is to ensure that there are no diffs other than due to buildvector/legalization llvm-svn: 276882
* [ARM] Check that the thumb COFF segment flag gets set on thumb windowsRenato Golin2016-07-271-0/+16
| | | | | | Patch by Martin Storsjö. llvm-svn: 276877
* [GlobalISel] Introduce an instruction selector.Ahmed Bougacha2016-07-271-0/+118
| | | | | | | | And implement it for AArch64, supporting x/w ADD/OR. Differential Revision: https://reviews.llvm.org/D22373 llvm-svn: 276875
* [mips][ias] Check '$rs = $rd' constraints when both registers are in AsmText.Daniel Sanders2016-07-274-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is one possible solution to the problem of ignoring constraints that Simon raised in D21473 but it's a bit of a hack. The integrated assembler currently ignores violations of the tied register constraints when the operands involved in a tie are both present in the AsmText. For example, 'dati $rs, $rt, $imm' with the '$rs = $rt' will silently replace $rt with $rs. So 'dati $2, $3, 1' is processed as if the user provided 'dati $2, $2, 1' without any diagnostic being emitted. This is difficult to solve properly because there are multiple parts of the matcher that are silently forcing these constraints to be met. Tied operands are rendered to instructions by cloning previously rendered operands but this is unnecessary because the matcher was already instructed to render the operand it would have cloned. This is also unnecessary because earlier code has already replaced the MCParsedOperand with the one it was tied to (so the parsed input is matched as if it were 'dati <RegIdx 2>, <RegIdx 2>, <Imm 1>'). As a result, it looks like fixing this properly amounts to a rewrite of the tied operand handling which affects all targets. This patch however, merely inserts a checking hook just before the substitution of MCParsedOperands and the Mips target overrides it. It's not possible to accurately check the registers are the same this early (because numeric registers haven't been bound to a register class yet) so it cheats a bit and checks that the tokens that produced the operand are lexically identical. This works because tied registers need to have the same register class but it does have a flaw. It will reject 'dati $4, $a0, 1' for violating the constraint even though $a0 ends up as the same register as $4. Reviewers: sdardis Subscribers: dsanders, llvm-commits, sdardis Differential Revision: https://reviews.llvm.org/D21994 llvm-svn: 276867
* [test/gold] Add gold test subdirectory tests needing v1.12 (or higher)Teresa Johnson2016-07-273-0/+63
| | | | | | | | | | | | | | | | Summary: As discussed in the review for D22677, added a subdirectory to enable tests that require at least version 1.12 of gold. Add an initial test requiring this version. Reviewers: davidxl, mehdi_amini Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D22827 llvm-svn: 276860
* [ARM] Set a non-conflicting comment character for assembly in MSVC modeRenato Golin2016-07-271-0/+13
| | | | | | | | | | | | | | | | | | | | | | | Currently, for ARMCOFFMCAsmInfoMicrosoft, no comment character is set, thus the idefault, '#', is used. The hash character doesn't work as comment character in ARM assembly, since '#' is used for immediate values. The comment character is set to ';', which is the comment character used by MS armasm.exe. (The microsoft armasm.exe uses a different directive syntax than what LLVM currently supports though, similar to ARM's armasm.) This allows inline assembly with immediate constants to be built (and brings the assembly output from clang -S closer to being possible to assemble). A test is added that verifies that ';' is correctly interpreted as comments in this mode, and verifies that assembling code that includes literal constants with a '#' works. Patch by Martin Storsjö. llvm-svn: 276859
* [ARM] Adds test for immediate encodingRenato Golin2016-07-271-0/+29
| | | | | | | | | The encoding of expressions as immediates wasn't correct, and was reported in PR23000. However, we have done some refactoring on how immediates are handled and now it seems the problem is fixed. This is a test just to make sure it won't regress again. llvm-svn: 276858
* [DAGCombiner] Use APInt directly to detect out of range shift constantsSimon Pilgrim2016-07-271-9/+94
| | | | | | | | Using getZExtValue() will assert if the value doesn't fit into uint64_t - SHL was already doing this, I've just updated ASHR/LSHR to match As mentioned on D22726 llvm-svn: 276855
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