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* fix PR6332, allowing an index of zero into a zero sized array Chris Lattner2010-04-171-0/+8
| | | | | | even if the element of the array has no size. llvm-svn: 101662
* teach the x86 asm parser how to handle segment prefixesChris Lattner2010-04-172-2/+4
| | | | | | in memory operands. rdar://7874844 llvm-svn: 101661
* testcase for r101538, patch by Nico Schmidt!Chris Lattner2010-04-171-0/+3
| | | | llvm-svn: 101642
* Start function numbering at 0.Dan Gohman2010-04-1734-646/+646
| | | | llvm-svn: 101638
* a bunch of ssse3 instructions are misencoded to think they have an Chris Lattner2010-04-171-0/+7
| | | | | | i8 field when they really do not. This fixes rdar://7840289 llvm-svn: 101629
* Add nounwind.Evan Cheng2010-04-171-6/+6
| | | | llvm-svn: 101613
* Re-commit my previous SSAUpdater changes. The previous version naively triedBob Wilson2010-04-171-0/+46
| | | | | | | | | | | to determine where to place PHIs by iteratively comparing reaching definitions at each block. That was just plain wrong. This version now computes the dominator tree within the subset of the CFG where PHIs may need to be placed, and then places the PHIs in the iterated dominance frontier of each definition. The rest of the patch is mostly the same, with a few more performance improvements added in. llvm-svn: 101612
* Minor change to make the test case comply with Vd<0> == '0' when Q == '1'.Johnny Chen2010-04-161-1/+1
| | | | llvm-svn: 101559
* Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for aJohnny Chen2010-04-161-0/+3
| | | | | | | | | | case. Also, the 0xFF hex literal involved in the shift for ESize64 should be suffixed "ul" to preserve the shift result. Implemented printHex*ImmOperand() by copying from ARMAsmPrinter.cpp and added a test case for DisassembleN1RegModImmFrm()/printHex64ImmOperand(). llvm-svn: 101557
* In the same spirit of r101524, which removed the assert() from ↵Johnny Chen2010-04-161-0/+3
| | | | | | | | printAddrMode2OffsetOperand(), this patch removes the assert() from printAddrMode3OffsetOperand() and adds a test case. llvm-svn: 101529
* Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. ChangedJohnny Chen2010-04-161-0/+3
| | | | | | | | | to the UAL syntax of LDCL<c>, instead. Add a test case for this change which also tests the removal of assert() from printAddrMode2OffsetOperand(). llvm-svn: 101527
* Revert r101455, which fails on the llvm-arm-linux buildbot.Dan Gohman2010-04-161-41/+0
| | | | llvm-svn: 101515
* Disable inlining of recursive calls. It can complicate tailcallelim andDan Gohman2010-04-161-0/+29
| | | | | | | dependent analyses, and increase code size, so doing it profitably would require more complex heuristics. llvm-svn: 101471
* Refine the detection of seemingly infinitely recursive calls where theDan Gohman2010-04-161-1/+25
| | | | | | | callee is expected to be expanded to something else by codegen, so that normal infinitely recursive calls are still transformed. llvm-svn: 101468
* Add JIT exception handling test.Bill Wendling2010-04-161-0/+41
| | | | llvm-svn: 101455
* move comment.Chris Lattner2010-04-161-1/+1
| | | | llvm-svn: 101433
* fix PR6832: we were using the alignment of a pointer when we Chris Lattner2010-04-161-0/+32
| | | | | | wanted the alignment of the pointee. llvm-svn: 101432
* Added another test case for am3offset operand, testing Rn, #+/-imm8.Johnny Chen2010-04-151-0/+3
| | | | | | Previous checkin tested Rn, #+/-Rm. llvm-svn: 101418
* Add test case for machine-sink on critical edgesJakob Stoklund Olesen2010-04-151-0/+58
| | | | llvm-svn: 101416
* Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, notJohnny Chen2010-04-151-0/+3
| | | | | | am2offset. Modified the instruction table entry and added a new test case. llvm-svn: 101415
* Use default lowering of DYNAMIC_STACKALLOC. As far as I can tell, ARM isle ↵Evan Cheng2010-04-151-8/+8
| | | | | | is doing the right thing and codegen looks correct for both Thumb and Thumb2. llvm-svn: 101410
* Fix PR6847. RegScavenger should ignore DebugValues.Jakob Stoklund Olesen2010-04-151-0/+26
| | | | llvm-svn: 101392
* ARM SelectDYN_ALLOC should emit a copy from SP rather than referencing SP ↵Evan Cheng2010-04-151-0/+23
| | | | | | | | directly. In cases where there are two dyn_alloc in the same BB it would have caused the old SP value to be reused and badness ensues. rdar://7493908 llvm is generating poor code for dynamic alloca, I'll fix that later. llvm-svn: 101383
* enhance the load/store narrowing optimization to handle aChris Lattner2010-04-151-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | tokenfactor in between the load/store. This allows us to optimize test7 into: _test7: ## @test7 ## BB#0: ## %entry movl (%rdx), %eax ## kill: SIL<def> ESI<kill> movb %sil, 5(%rdi) ret instead of: _test7: ## @test7 ## BB#0: ## %entry movl 4(%esp), %ecx movl $-65281, %eax ## imm = 0xFFFFFFFFFFFF00FF andl 4(%ecx), %eax movzbl 8(%esp), %edx shll $8, %edx addl %eax, %edx movl 12(%esp), %eax movl (%eax), %eax movl %edx, 4(%ecx) ret llvm-svn: 101355
* teach codegen to turn trunc(zextload) into load when possible.Chris Lattner2010-04-151-13/+39
| | | | | | | | This doesn't occur much at all, it only seems to formed in the case when the trunc optimization kicks in due to phase ordering. In that case it is saves a few bytes on x86-32. llvm-svn: 101350
* add a simple dag combine to replace trivial shl+lshr withChris Lattner2010-04-151-1/+1
| | | | | | and. This happens with the store->load narrowing stuff. llvm-svn: 101348
* Implement rdar://7860110 (also in target/readme.txt) narrowingChris Lattner2010-04-151-0/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a load/or/and/store sequence into a narrower store when it is safe. Daniel tells me that clang will start producing this sort of thing with bitfields, and this does trigger a few dozen times on 176.gcc produced by llvm-gcc even now. This compiles code like CodeGen/X86/2009-05-28-DAGCombineCrash.ll into: movl %eax, 36(%rdi) instead of: movl $4294967295, %eax ## imm = 0xFFFFFFFF andq 32(%rdi), %rax shlq $32, %rcx addq %rax, %rcx movq %rcx, 32(%rdi) and each of the testcases into a single store. Each of them used to compile into craziness like this: _test4: movl $65535, %eax ## imm = 0xFFFF andl (%rdi), %eax shll $16, %esi addl %eax, %esi movl %esi, (%rdi) ret llvm-svn: 101343
* further tweak this to do something useful.Chris Lattner2010-04-151-6/+4
| | | | llvm-svn: 101341
* remove undef control flow.Chris Lattner2010-04-151-22/+1
| | | | llvm-svn: 101340
* tests: MC/Disassembler tests depend on ARM support being compiler in.Daniel Dunbar2010-04-151-1/+3
| | | | llvm-svn: 101337
* Remove unneeded types from test.Jakob Stoklund Olesen2010-04-141-69/+3
| | | | llvm-svn: 101286
* Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operandBob Wilson2010-04-141-0/+16
| | | | | | | does not have a legal type. The legalizer does not know how to handle those nodes. Radar 7854640. llvm-svn: 101282
* Trim tests and convert to FileCheck.Evan Cheng2010-04-142-48/+13
| | | | llvm-svn: 101277
* Revert r101213.Nick Lewycky2010-04-141-0/+1
| | | | llvm-svn: 101231
* implement mc asmparser support for '.', which gets theChris Lattner2010-04-141-0/+11
| | | | | | | | | | | | | | | | | | | current PC. rdar://7834775 We now produce an identical .o file compared to the cctools assembler for something like this: _f0: L0: jmp L1 .long . - L0 L1: jmp A .long . - L1 .zerofill __DATA,_bss,A,0 llvm-svn: 101227
* Commit testcase for r101213.Nick Lewycky2010-04-141-0/+12
| | | | llvm-svn: 101214
* XFAIL this test for powerpc. Devang Patel2010-04-131-1/+1
| | | | | | This test relies on iSel lowering dbg_declare intrinsic when CodeGen::OptLevel is None. On PPC side, CodeGen::OptLevel stays to default when -O0 is used on the command line. llvm-svn: 101190
* Add test for post-ra machine licm.Evan Cheng2010-04-131-7/+53
| | | | llvm-svn: 101182
* Handle a v2f64 formal parameter that is split between registers and memoryBob Wilson2010-04-131-0/+7
| | | | | | such that the entire second half is in memory. Radar 7855014. llvm-svn: 101181
* Do not include types without any definition in pubtypes list.Devang Patel2010-04-131-0/+48
| | | | llvm-svn: 101171
* Fix test on non-x86 hosts.Evan Cheng2010-04-131-1/+1
| | | | llvm-svn: 101163
* Re-apply 101075 and fix it properly. Just reuse the debug info of the branch ↵Evan Cheng2010-04-132-0/+81
| | | | | | instruction being optimized. There is no need to --I which can deref off start of the BB. llvm-svn: 101162
* Temporarily revert r101075, it's causing invalid iterator assertionsEric Christopher2010-04-131-39/+0
| | | | | | in a nightly tester. llvm-svn: 101158
* Teach ScalarEvolution to simplify smax and umax when it can proveDan Gohman2010-04-131-0/+52
| | | | | | that one operand is always greater than another. llvm-svn: 101142
* Teach IndVarSimplify how to eliminate remainder operators where theDan Gohman2010-04-131-0/+121
| | | | | | | | | | | | numerator is an induction variable. For example, with code like this: for (i=0;i<n;++i) x[i%n] = 0; IndVarSimplify will now recognize that i is always less than n inside the loop, and eliminate the remainder. llvm-svn: 101113
* add llvm codegen support for -ffunction-sections and -fdata-sections,Chris Lattner2010-04-131-0/+10
| | | | | | patch by Sylvere Teissier! llvm-svn: 101106
* Use .set expression for x86 pic jump table reference to reduce assembly ↵Evan Cheng2010-04-121-2/+7
| | | | | | relocation. rdar://7738756 llvm-svn: 101085
* Third time's a charm...Bill Wendling2010-04-121-1/+1
| | | | llvm-svn: 101081
* Genericize the label test.Bill Wendling2010-04-121-1/+1
| | | | llvm-svn: 101079
* Correct test to test what I mean it to test.Bill Wendling2010-04-121-1/+2
| | | | llvm-svn: 101077
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