summaryrefslogtreecommitdiffstats
path: root/llvm/test/tools
Commit message (Collapse)AuthorAgeFilesLines
...
* [llvm-mca][X86] Add add/adc + sub/sbb resource tests to all modelsSimon Pilgrim2018-04-298-8/+3016
| | | | llvm-svn: 331140
* [llvm-mca][X86] Add double shift resource tests to all relevant modelsSimon Pilgrim2018-04-288-8/+608
| | | | llvm-svn: 331109
* [llvm-mca][X86] Add shift/rotate resource tests to all relevant modelsSimon Pilgrim2018-04-288-0/+4386
| | | | | | I intend to add further instruction tests to the resources-x86_64.s test file as required, but this initial commit is to help remove a load of unnecessary InstRW overrides in a future patch llvm-svn: 331108
* [llvm-objcopy] Add --weaken-symbol (-W) optionPaul Semel2018-04-271-0/+75
| | | | llvm-svn: 331070
* [llvm-objcopy] Add --globalize-symbol optionPaul Semel2018-04-271-0/+75
| | | | llvm-svn: 331068
* typoSam Clegg2018-04-272-0/+0
| | | | llvm-svn: 331006
* [WebAssembly] Section symbols must have local bindingSam Clegg2018-04-272-0/+0
| | | | | | | | | | Summary: Also test for symbols information in test/MC/WebAssembly/debug-info.ll. Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D46160 llvm-svn: 331005
* [llvm-objcopy] Implement --redefine-sym optionAlexander Shaposhnikov2018-04-261-0/+81
| | | | | | | | | | | This diff implements --redefine-sym option for changing the name of a symbol. Test plan: make check-all Differential revision: https://reviews.llvm.org/D46029 llvm-svn: 330973
* [WebAssembly] Add version to object file metadataSam Clegg2018-04-267-3/+6
| | | | | | | | | | Summary: See https://github.com/WebAssembly/tool-conventions/issues/54 Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D46069 llvm-svn: 330969
* [llvm-objcopy] Add --localize-symbol optionPaul Semel2018-04-261-0/+81
| | | | llvm-svn: 330963
* [WebAssembly] objdump: Don't assume all relocations have symbolsSam Clegg2018-04-261-4/+12
| | | | | | | | Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D46134 llvm-svn: 330959
* [WebAssembly] Implement getRelocationValueString()Sam Clegg2018-04-261-1/+1
| | | | | | | | And use it in llvm-objdump. Differential Revision: https://reviews.llvm.org/D46092 llvm-svn: 330957
* [llvm-mca][X86] Updated fma3 tests after rL330820Simon Pilgrim2018-04-252-10/+10
| | | | llvm-svn: 330822
* [llvm-mca] Default to the native host cpu if flag -mcpu is not specified.Andrea Di Biagio2018-04-251-1/+0
| | | | llvm-svn: 330809
* [X86] Split off PHMINPOSUW to their own schedule classSimon Pilgrim2018-04-242-6/+6
| | | | | | This also fixes Jaguar's schedule which was treating it as the WriteVecIMul default. llvm-svn: 330756
* [WebAssembly] Use section index in relocation section headerSam Clegg2018-04-242-0/+0
| | | | | | | | | | | Rather than referring to sections my their code, use the absolute index of the target section within the module. See https://github.com/WebAssembly/tool-conventions/issues/52 Differential Revision: https://reviews.llvm.org/D45980 llvm-svn: 330749
* [X86][F16C] Add WriteCvtF2FSt scheduling classSimon Pilgrim2018-04-241-5/+5
| | | | | | Fixes the classification of VCVTPS2PHmr/VCVTPS2PHYmr which were tagged as WriteCvtF2FLd_WriteRMW (PR36887) llvm-svn: 330737
* [X86][BtVer2] Fix VCVTPS2PHmr/VCVTPS2PHYmr latenciesSimon Pilgrim2018-04-241-11/+5
| | | | | | These are stores, not loads, so don't need to account for load latency. llvm-svn: 330735
* [X86][IVB] Add F16C resource tests.Simon Pilgrim2018-04-241-0/+58
| | | | | | Note this is IvyBridge (which shares the model) NOT SandyBridge. llvm-svn: 330734
* [llvm-mca] Default the output asm dialect used by the instruction printer to ↵Andrea Di Biagio2018-04-241-0/+37
| | | | | | | | | | | | | | | | the input asm dialect. The instruction printer used by llvm-mca to generate the performance report now defaults the output assembly format to the format used for the input assembly file. On x86, the asm format can be either AT&T or Intel, depending on the presence/absence of directive `.intel_syntax`. Users can still specify a different assembly dialect with the command line flag -output-asm-variant=<uint>. llvm-svn: 330733
* [X86] Remove unnecessary FMA reg-mem InstRW scheduler overrides.Simon Pilgrim2018-04-242-4/+4
| | | | llvm-svn: 330720
* [X86] Add vector element insertion/extraction scheduler classesSimon Pilgrim2018-04-242-10/+10
| | | | | | | | | | | | Split off pinsr/pextr and extractps instructions. (Mostly) fixes PR36887. Note: It might be worth adding a WriteFInsertLd class as well in the future. Differential Revision: https://reviews.llvm.org/D45929 llvm-svn: 330714
* Recommit "[llvm-objcopy] Switch over to using TableGen for parsing arguments"Alexander Shaposhnikov2018-04-248-8/+8
| | | | | | | | | Add explicit dependency on ObjcopyTableGen and rerun the tests on Windows. I will double-check the build bots and revert this commit if necessary. llvm-svn: 330685
* Fix computeSymbolSizes SEGFAULT on invalid fileAdrian Prantl2018-04-231-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | We use llvm-symbolizer in some production systems, and we run it against all possibly related files, including some that are not ELF. We noticed that for some of those invalid files, llvm-symbolizer would crash with SEGFAULT. Here is an example of such a file. It is due to that in computeSymbolSizes, a loop uses condition for (unsigned I = 0, N = Addresses.size() - 1; I < N; ++I) { where if Addresses.size() is 0, N would overflow and causing the loop to access invalid memory. Instead of patching the loop conditions, the commit makes so that the function returns early if Addresses is empty. Validated by checking that llvm-symbolizer no longer crashes. Patch by Teng Qin! Differential Revision: https://reviews.llvm.org/D44285 llvm-svn: 330610
* [llvm-mca][X86] Add BMI/LZCNT/POPCNT resource tests to all relevant modelsSimon Pilgrim2018-04-2225-0/+2322
| | | | | | The SandyBridge BMI tests are actually run on IvyBridge as that's the first lowest CPU that actually support the ISAs (but still use the SandyBridge model). llvm-svn: 330556
* [X86] Remove unnecessary WriteFVarBlend/WriteVarBlend InstRW overrides.Simon Pilgrim2018-04-222-28/+30
| | | | | | This also fixes some of the ReadAfterLd issues due to InstRW. llvm-svn: 330544
* [llvm-mca][X86] Add POPCNT resource testSimon Pilgrim2018-04-222-0/+108
| | | | llvm-svn: 330540
* [llvm-mca][X86] Add AVX2 resource testsSimon Pilgrim2018-04-215-0/+5387
| | | | llvm-svn: 330512
* [llvm-mca][X86] Add SSE resource tests to all modelsSimon Pilgrim2018-04-2135-0/+13352
| | | | llvm-svn: 330506
* [llvm-mca][X86] Add MMX resource testsSimon Pilgrim2018-04-216-0/+2376
| | | | llvm-svn: 330502
* [llvm-mca][X86] Add X87 resource testsSimon Pilgrim2018-04-218-0/+4194
| | | | llvm-svn: 330499
* [llvm-mca][X86] Add MMX/SSE/AES/CLMUL resource SandyBridge testsSimon Pilgrim2018-04-209-0/+2733
| | | | llvm-svn: 330486
* [llvm-objcopy] Fix sh_linkAlexander Shaposhnikov2018-04-202-1/+49
| | | | | | | | | | | | This diff fixes sh_link for various types of sections (i.e. for SHT_ARM_EXIDX, SHT_HASH). In particular, this change enables us to use llvm-objcopy with clang -gsplit-dwarf for the target android-arm. Test plan: make check-all Differential revision: https://reviews.llvm.org/D45851 llvm-svn: 330478
* Fix test by allowing it to accept an upper or lower case letter as the first ↵Douglas Yung2018-04-201-1/+1
| | | | | | | | character. Windows for some reason uses a lower case letter, while linux uses upper case. llvm-svn: 330438
* Require asserts for stats-file-option tests.Florian Hahn2018-04-202-0/+4
| | | | llvm-svn: 330417
* [LTO] Add stats-file option to LTO/Config.h.Florian Hahn2018-04-202-0/+46
| | | | | | | | | | | | | This patch adds a StatsFile option to LTO/Config.h and updates both LLVMGold and llvm-lto2 to set it. Reviewers: MatzeB, tejohnson, espindola Reviewed By: tejohnson Differential Revision: https://reviews.llvm.org/D45531 llvm-svn: 330411
* [llvm-mca][X86] Add prefetch instruction resource testsSimon Pilgrim2018-04-191-1/+14
| | | | llvm-svn: 330371
* [llvm-mca][FMA] Add FMA resource testsSimon Pilgrim2018-04-195-0/+3522
| | | | llvm-svn: 330366
* [llvm-mca][X86] Add resource test for every out-of-order scheduler modelSimon Pilgrim2018-04-197-0/+14536
| | | | | | | | | | I've copied and regenerated a resource file from btver2 to every x86 scheduler model supported by llvm-mca so we have at least some basic coverage. For most this has been the avx1 tests, but for silvermont I've used sse42 as thats the latest it supports. More will be added later. llvm-svn: 330352
* [llvm-objdump] Remove test object fileFrancis Visoiu Mistrih2018-04-191-0/+0
| | | | | | Forgot to remove it from the previous commit. llvm-svn: 330343
* [llvm-objdump] Print "..." instead of random data for virtual sectionsFrancis Visoiu Mistrih2018-04-192-0/+9
| | | | | | | | | | | | | | | | | When disassembling with -D, skip virtual sections by printing "..." for each symbol. This patch also implements `MachOObjectFile::isSectionVirtual`. Test case comes from: ``` .zerofill __DATA,__common,_data64unsigned,472,3 ``` Differential Revision: https://reviews.llvm.org/D45824 llvm-svn: 330342
* [llvm-mca][X86] Add mmx instruction to btver2 resource testsSimon Pilgrim2018-04-193-8/+569
| | | | | | Useful to see scheduler class deltas against xmm equivalents llvm-svn: 330335
* [llvm-mca][X86] Add mmx versions of SSSE3 instructionsSimon Pilgrim2018-04-182-23/+135
| | | | | | Move PABS instructions incorrectly tested under SSE2 llvm-svn: 330295
* [gold] Add support for optimization remarksTeresa Johnson2018-04-181-0/+76
| | | | | | | | | | | | | | Summary: Adds support for LTO opt remarks (optionally with hotness) to gold-plugin. Reviewers: anemet Subscribers: fhahn, mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D45752 llvm-svn: 330252
* [UpdateTestChecks] Add update_mca_test_checks.py scriptGreg Bedwell2018-04-1834-166/+1025
| | | | | | | | | | | This script can be used to regenerate tests in the test/tools/llvm-mca directory (PR36904). Regenerated a number of tests using the pattern: test/tools/llvm-mca/*/*/*.s Differential Revision: https://reviews.llvm.org/D45369 llvm-svn: 330246
* [X86] Add separate scheduling class for PSADBW instruction.Craig Topper2018-04-171-2/+2
| | | | llvm-svn: 330204
* [test] Avoid spurious failure in debug-names-find.s. NFC.Pavel Labath2018-04-161-3/+3
| | | | | | | Have llvm-dwarfdump take input from stdin to avoid leaking the host paths into the tests, causing nondeterministic failures. llvm-svn: 330121
* Add PPC64_GLINK dynamic tag.Sean Fertile2018-04-132-0/+11
| | | | | | | | Add support for the PPC64_GLINK dynamic tag which is used in the ElfV2 abi. Differential Revision: https://reviews.llvm.org/D45574 llvm-svn: 330038
* [llvm-mca] Ensure that instructions with a schedule read-advance are always ↵Andrea Di Biagio2018-04-131-0/+44
| | | | | | | | | | | | | | issued in the right order. Normally, the Scheduler prioritizes older instructions over younger instructions during the instruction issue stage. In one particular case where a dependent instruction had a schedule read-advance associated to one of the input operands, this rule was not correctly applied. This patch fixes the issue and adds a test to verify that we don't regress that particular case. llvm-svn: 330032
* Enable debug fission for thinLTO linked via gold-pluginYunlian Jiang2018-04-131-0/+63
| | | | | | | | | | | | | | Summary: This enables debug fission on implicit ThinLTO when linked with gold. It will put the .dwo files in a directory specified by user. Reviewers: tejohnson, pcc, dblaikie Reviewed By: pcc Subscribers: JDevlieghere, mehdi_amini, inglorion Differential Revision: https://reviews.llvm.org/D44792 llvm-svn: 329988
OpenPOWER on IntegriCloud