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* [dsymutil] Gather global and local symbol addresses in the main executable.Jonas Devlieghere2018-11-305-0/+24
| | | | | | | | | | | | | | | | | | | | | | Usually local symbols will have their address described in the debug map. Global symbols have to have their address looked up in the symbol table of the main executable. By playing with 'ld -r' and export lists, you can get a symbol described as global by the debug map while actually being a local symbol as far as the link in concerned. By gathering the address of local symbols, we fix this issue. Also, we prefer a global symbol in case of a name collision to preserve the previous behavior. Note that using the 'ld -r' tricks, people can actually cause symbol names collisions that dsymutil has no way to figure out. This fixes the simple case where there is only one symbol of a given name. rdar://problem/32826621 Differential revision: https://reviews.llvm.org/D54922 llvm-svn: 348021
* [llvm-objcopy] Move elf-specific tests into subfolderAlexander Shaposhnikov2018-11-30142-0/+0
| | | | | | | | | | | | | | In this diff the elf-specific tests are moved into the subfolder llvm-objcopy/ELF (the change was discussed in the comments on https://reviews.llvm.org/D54674). A separate code reivew wasn't sent for this change since Phabricator is failing to create such a large diff. Test plan: make check-all make check-llvm-tools make check-llvm-tools-llvm-objcopy llvm-svn: 347958
* [obj2yaml] [COFF] Write RVA instead of VA for sections, fix roundtripping ↵Martin Storsjo2018-11-291-3/+8
| | | | | | | | | | executables yaml2obj writes the yaml value as is to the output file. Differential Revision: https://reviews.llvm.org/D54965 llvm-svn: 347916
* [llvm-rc] Support EXSTYLE statement.Martin Storsjo2018-11-292-0/+61
| | | | | | | | Patch by Jacek Caban! Differential Revision: https://reviews.llvm.org/D55020 llvm-svn: 347858
* [llvm-mca][MC] Add the ability to declare which processor resources model ↵Andrea Di Biagio2018-11-292-89/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | load/store queues (PR36666). This patch adds the ability to specify via tablegen which processor resources are load/store queue resources. A new tablegen class named MemoryQueue can be optionally used to mark resources that model load/store queues. Information about the load/store queue is collected at 'CodeGenSchedule' stage, and analyzed by the 'SubtargetEmitter' to initialize two new fields in struct MCExtraProcessorInfo named `LoadQueueID` and `StoreQueueID`. Those two fields are identifiers for buffered resources used to describe the load queue and the store queue. Field `BufferSize` is interpreted as the number of entries in the queue, while the number of units is a throughput indicator (i.e. number of available pickers for loads/stores). At construction time, LSUnit in llvm-mca checks for the presence of extra processor information (i.e. MCExtraProcessorInfo) in the scheduling model. If that information is available, and fields LoadQueueID and StoreQueueID are set to a value different than zero (i.e. the invalid processor resource index), then LSUnit initializes its LoadQueue/StoreQueue based on the BufferSize value declared by the two processor resources. With this patch, we more accurately track dynamic dispatch stalls caused by the lack of LS tokens (i.e. load/store queue full). This is also shown by the differences in two BdVer2 tests. Stalls that were previously classified as generic SCHEDULER FULL stalls, are not correctly classified either as "load queue full" or "store queue full". About the differences in the -scheduler-stats view: those differences are expected, because entries in the load/store queue are not released at instruction issue stage. Instead, those are released at instruction executed stage. This is the main reason why for the modified tests, the load/store queues gets full before PdEx is full. Differential Revision: https://reviews.llvm.org/D54957 llvm-svn: 347857
* [llvm-objcopy] Hook up the -V alias to --version, output "GNU strip"Martin Storsjo2018-11-282-1/+4
| | | | | | | | | | | This allows libtool to detect the presence of llvm-strip and use it with the options --strip-debug and --strip-unneeded. Also hook up the -V alias for objcopy. Differential Revision: https://reviews.llvm.org/D54936 llvm-svn: 347731
* [yaml2obj] Treat COFF/ARM64 as a 64 bit architectureMartin Storsjo2018-11-271-0/+89
| | | | | | Differential Revision: https://reviews.llvm.org/D54935 llvm-svn: 347703
* [llvm-mca] pass -dispatch-stats flag to a couple of tests. NFCAndrea Di Biagio2018-11-272-2/+202
| | | | | | | | | | | | | | | | This change is in preparation for a patch that fixes PR36666. llvm-mca currently doesn't know if a buffered processor resource describes a load or store queue. So, any dynamic dispatch stall caused by the lack of load/store queue entries is normally reported as a generic SCHEDULER stall. See for example the -dispatch-stats output from the two tests modified by this patch. In future, processor models will be able to tag processor resources that are used to describe load/store queues. That information would then be used by llvm-mca to correctly classify dynamic dispatch stalls caused by the lack of tokens in the LS. llvm-svn: 347662
* [cfi] Help sanstats to find binary if they are not at the original locationVitaly Buka2018-11-261-0/+10
| | | | | | | | | | | | | | | | | Summary: By default sanstats search binaries at the same location where they were when stats was collected. Sometime you can not print report immediately or you need to move post-processing to another workstation. To support this use-case when original binary is missing sanstats will fall-back to directory with sanstats file. Reviewers: pcc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D53857 llvm-svn: 347601
* [cfi] Make sanstats print address of the checkVitaly Buka2018-11-261-12/+12
| | | | | | | | | | | | Summary: Help with off-line symbolization or other type debugging. Reviewers: pcc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D53606 llvm-svn: 347600
* [AArch64] Refactor the scheduling predicates (2/3) (NFC)Evandro Menezes2018-11-261-5/+5
| | | | | | | | | Refactor the scheduling predicates based on `MCInstPredicate`. In this case, `AArch64InstrInfo::hasShiftedReg()`. Differential revision: https://reviews.llvm.org/D54820 llvm-svn: 347598
* [AArch64] Refactor the scheduling predicates (1/3) (NFC)Evandro Menezes2018-11-261-6/+6
| | | | | | | | | Refactor the scheduling predicates based on `MCInstPredicate`. In this case, `AArch64InstrInfo::isScaledAddr()` Differential revision: https://reviews.llvm.org/D54777 llvm-svn: 347597
* [llvm-mca] Add support for instructions with a variadic number of operands.Andrea Di Biagio2018-11-251-0/+65
| | | | | | | | | | | | | | | | | | | By default, llvm-mca conservatively assumes that a register operand from the variadic sequence is both a register read and a register write. That is because MCInstrDesc doesn't describe extra variadic operands; we don't have enough dataflow information to tell which register operands from the variadic sequence is a definition, and which is a use instead. However, if a variadic instruction is flagged 'mayStore' (but not 'mayLoad'), and it has no 'unmodeledSideEffects', then llvm-mca (very) optimistically assumes that any register operand in the variadic sequence is a register read only. Conversely, if a variadic instruction is marked as 'mayLoad' (but not 'mayStore'), and it has no 'unmodeledSideEffects', then llvm-mca optimistically assumes that any extra register operand is a register definition only. These assumptions work quite well for variadic load/store multiple instructions defined by the ARM backend. llvm-svn: 347522
* [TableGen] Emit more variant transitionsEvandro Menezes2018-11-233-8/+48
| | | | | | | | | | | | | | | | | | | | | | `llvm-mca` relies on the predicates to be based on `MCSchedPredicate` in order to resolve the scheduling for variant instructions. Otherwise, it aborts the building of the instruction model early. However, the scheduling model emitter in `TableGen` gives up too soon, unless all processors use only such predicates. In order to allow more processors to be used with `llvm-mca`, this patch emits scheduling transitions if any processor uses these predicates. The transition emitted for the processors using legacy predicates is the one specified with `NoSchedPred`, which is based on `MCSchedPredicate`. Preferably, `llvm-mca` should instead assume a reasonable default when a variant transition is not based on `MCSchedPredicate` for a given processor. This issue should be revisited in the future. Differential revision: https://reviews.llvm.org/D54648 llvm-svn: 347504
* [llvm-mca] Refactor some of the logic in InstrBuilder, and add a ↵Andrea Di Biagio2018-11-231-0/+72
| | | | | | | | | | | | | | | | | | | | verifyOperands method. With this change, InstrBuilder emits an error if the MCInst sequence contains an instruction with a variadic opcode, and a non-zero number of variadic operands. Currently we don't know how to correctly analyze variadic opcodes. The problem with variadic operands is that there is no information for them in the opcode descriptor (i.e. MCInstrDesc). That means, we don't know which variadic operands are defs, and which are uses. In future, we could try to conservatively assume that any extra register operands is both a register use and a register definition. This patch fixes a subtle bug in the evaluation of read/write operands for ARM VLD1 with implicit index update. Added test vld1-index-update.s llvm-svn: 347503
* Revert r347490 as it breaks address sanitizer buildsLuke Cheeseman2018-11-231-1/+1
| | | | llvm-svn: 347499
* [llvm-mca][View] Improved Retire Control Unit Statistics.Andrea Di Biagio2018-11-236-0/+24
| | | | | | | | | | | | | | | | | | | | | RetireControlUnitStatistics now reports extra information about the ROB and the avg/maximum number of entries consumed over the entire simulation. Example: Retire Control Unit - number of cycles where we saw N instructions retired: [# retired], [# cycles] 0, 109 (17.9%) 1, 102 (16.7%) 2, 399 (65.4%) Total ROB Entries: 64 Max Used ROB Entries: 35 ( 54.7% ) Average Used ROB Entries per cy: 32 ( 50.0% ) Documentation in llvm/docs/CommandGuide/llvmn-mca.rst has been updated to reflect this change. llvm-svn: 347493
* Revert r343341Luke Cheeseman2018-11-231-1/+1
| | | | | | | - Cannot reproduce the build failure locally and the build logs have been deleted. llvm-svn: 347490
* [llvm-mca] Fix an invalid memory read introduced by r346487.Andrea Di Biagio2018-11-221-0/+104
| | | | | | | | | | | | | | | | | | | | This patch fixes an invalid memory read introduced by r346487. Before this patch, partial register write had to query the latency of the dependent full register write by calling a method on the full write descriptor. However, if the full write is from an already retired instruction, chances are that the EntryStage already reclaimed its memory. In some parial register write tests, valgrind was reporting an invalid memory read. This change fixes the invalid memory access problem. Writes are now responsible for tracking dependent partial register writes, and notify them in the event of instruction issued. That means, partial register writes no longer need to query their associated full write to check when they are ready to execute. Added test X86/BtVer2/partial-reg-update-7.s llvm-svn: 347459
* [llvm-mca] Add test case (NFC)Evandro Menezes2018-11-221-0/+7
| | | | | | Add test case that will serve as the base for D54820. llvm-svn: 347440
* [llvm-mca] Add test case (NFC)Evandro Menezes2018-11-211-2/+2
| | | | | | Fix previous commit r347434. llvm-svn: 347437
* [llvm-mca] Add test case (NFC)Evandro Menezes2018-11-211-0/+9
| | | | | | Add test case that will serve as the base for D54777. llvm-svn: 347434
* [commit-test] Add blank line for test/tools/llvm-objdump/symbol-table-elf.testXing GUO2018-11-151-0/+1
| | | | | | | | | | | | | | Summary: Test commit Reviewers: Higuoxing Reviewed By: Higuoxing Subscribers: llvm-commits, Higuoxing Differential Revision: https://reviews.llvm.org/D54562 llvm-svn: 346924
* Make dsymutil more robust when parsing load commands.Adrian Prantl2018-11-132-1/+1
| | | | | | rdar://problem/45883463 llvm-svn: 346815
* [llvm-objcopy] Rename --keep to --keep-section.Jordan Rupprecht2018-11-136-8/+8
| | | | | | | | | | | | | | | | Summary: llvm-objcopy/strip support `--keep` (for sections) and `--keep-symbols` (for symbols). For consistency and clarity, rename `--keep` to `--keep-section`. In fact, for GNU compatability, -K is --keep-symbol, so it's weird that the alias `-K` is not the same as the short-ish `--keep`. Reviewers: jakehehrlich, jhenderson, alexshap, MaskRay, espindola Reviewed By: jakehehrlich, MaskRay Subscribers: emaste, arichardson, llvm-commits Differential Revision: https://reviews.llvm.org/D54477 llvm-svn: 346782
* [commit test] Add blank line to test/tools/llvm-objdump/full-contents.testXing GUO2018-11-131-0/+1
| | | | llvm-svn: 346729
* [libObject] Fix getDesc for Elf_Note_ImplJake Ehrlich2018-11-131-0/+32
| | | | | | | This change fixes a bug in Elf_Note_Impl in which Elf_Word was used where uint8_t should have been used. llvm-svn: 346724
* [llvm-readelf] Make llvm-readelf more compatible with GNU readelf.Jordan Rupprecht2018-11-124-12/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This change adds a bunch of options that GNU readelf supports. There is one breaking change when invoked as `llvm-readobj`, and three breaking changes when invoked as `llvm-readelf`: - Add --all (implies --file-header, --program-headers, etc.) - [Breaking] -a is --all instead of --arm-attributes - Add --file-header as an alias for --file-headers - Replace --sections with --sections-headers, keeping --sections as an alias for it - Add --relocs as an alias for --relocations - Add --dynamic as an alias for --dynamic-table - Add --segments as an alias for --program-headers - Add --section-groups as an alias for --elf-section-groups - Add --dyn-syms as an alias for --dyn-symbols - Add --syms as an alias for --symbols - Add --histogram as an alias for --elf-hash-histogram - [Breaking] When invoked as `llvm-readelf`, -s is --symbols instead of --sections - [Breaking] When invoked as `llvm-readelf`, -t is no longer an alias for --symbols Reviewers: MaskRay, phosek, mcgrathr, jhenderson Reviewed By: MaskRay, jhenderson Subscribers: sbc100, aheejin, edd, jhenderson, silvas, echristo, compnerd, kristina, javed.absar, kristof.beyls, llvm-commits, Bigcheese Differential Revision: https://reviews.llvm.org/D54124 llvm-svn: 346685
* [llvm-mca] Correctly update the resource strategy for processor resources ↵Andrea Di Biagio2018-11-1221-125/+125
| | | | | | | | | | | | | | | | | | | | | | | with multiple units. When looking at the tests committed by Roman at r346587, I noticed that numbers reported by the resource pressure for PdAGU01 were wrong. In particular, according to the aut-generated CHECK lines in tests memcpy-like-test.s and store-throughput.s, resource pressure for PdAGU01 was not uniformly distributed among the two AGEN pipes. It turns out that the reason why pressure was not correctly distributed, was because the "resource selection strategy" object associated with PdAGU01 was not correctly updated on the event of AGEN pipe used. As a result, llvm-mca was not simulating a round-robin pipeline allocation for PdAGU01. Instead, PdAGU1 was always prioritized over PdAGU0. This patch fixes the issue; now processor resource strategy objects for resources declaring multiple units, are correctly notified in the event of "resource used". llvm-svn: 346650
* [llvm-objdump] add more constraints for testsFangrui Song2018-11-122-4/+8
| | | | | | | | | | | | Patch by Higuoxing (Xing) Reviewers: jhenderson Reviewed By: jhenderson Differential Revision: https://reviews.llvm.org/D54299 llvm-svn: 346636
* [llvm-nm] Use WithColor for error reportingJonas Devlieghere2018-11-111-1/+1
| | | | | | Use helpers from Support/WithError.h to print errors. llvm-svn: 346624
* [llvm-objdump] Add symbol 'O' for object dataKristina Brooks2018-11-114-11/+11
| | | | | | | | | | | | | Improve compatibility with GNU objdump by showing `O` next to global symbol names, instead of a blank space. Patch by Higuoxing (Xing). Reviewers: MaskRay Differential Revision: https://reviews.llvm.org/D54380 llvm-svn: 346610
* [llvm-cxxdump] Use error reporting helpers from supportJonas Devlieghere2018-11-111-1/+1
| | | | | | | This patch makes llvm-cxxdump use the error reporting helpers from Support/WithColor.h llvm-svn: 346602
* [X86][BdVer2] Fix loads/stores throughput for Piledriver (PR39465)Roman Lebedev2018-11-1065-3806/+4046
| | | | | | | | | | | | | There are two AGU units, and per 1cy, there can be either two loads, or a load and a store; but not two stores, or two loads and a store. Additionally, loads shouldn't affect the store scheduler and vice versa. (but *should* affect the PdEX scheduler.) Required rL346545. Fixes https://bugs.llvm.org/show_bug.cgi?id=39465 llvm-svn: 346587
* [NFC][MCA][BdVer2] Add bdver2 runline into register-file-statistics.s testRoman Lebedev2018-11-101-0/+11
| | | | | | | Missed this one by accident when adding the initial version in rL345463 / rL345462 llvm-svn: 346585
* Add total function byte size and inline function byte size to ↵Greg Clayton2018-11-091-0/+3
| | | | | | | | "llvm-dwarfdump --statistics" Differential Revision: https://reviews.llvm.org/D54217 llvm-svn: 346531
* [llvm-strings] Fix whitespaces to match strings output.Jordan Rupprecht2018-11-095-30/+67
| | | | | | | | | | | | | | | | | Summary: The current implementation prepends a space on every line, making it difficult to compare against GNU strings. The space appears to have come from handling --radix in rL292707. The space is for making sure there's a space between the radix and the value; however the space is still emitted even when there is no radix. This change fixes that so the space is only emitted when there is a radix. Reviewers: jhenderson Reviewed By: jhenderson Subscribers: llvm-commits, compnerd Differential Revision: https://reviews.llvm.org/D54238 llvm-svn: 346529
* [llvm-cov] Add lcov tracefile export format.Max Moroz2018-11-091-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | Summary: lcov tracefiles are used by various coverage reporting tools and build systems (e.g., Bazel). It is a simple text-based format to parse and more convenient to use than the JSON export format, which needs additional processing to map regions/segments back to line numbers. It's a little unfortunate that "text" format is now overloaded to refer specifically to JSON for export, but I wanted to avoid making any breaking changes to the UI of the llvm-cov tool at this time. Patch by Tony Allevato (@allevato). Reviewers: Dor1s, vsk Reviewed By: Dor1s, vsk Subscribers: mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D54266 llvm-svn: 346506
* [X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX.Clement Courbet2018-11-096-18/+18
| | | | | | | | | | | | | | | | | | | | | | | Summary: Starting from SNB, VZEROUPPER is handled by the renamer and uses no proc resources. After HSW, it also has zero latency. This fixes PR35606. To reproduce: Uops: llvm-exegesis -mode=uops -opcode-name=VZEROUPPER Latency: echo -e '#LLVM-EXEGESIS-DEFREG XMM0 1\n#LLVM-EXEGESIS-DEFREG XMM1 1\nvzeroupper' | /tmp/llvm-exegesis -mode=latency -snippets-file=- echo -e '#LLVM-EXEGESIS-DEFREG XMM0 1\n#LLVM-EXEGESIS-DEFREG XMM1 1\nvzeroupper\naddps %xmm0, %xmm1' | /tmp/llvm-exegesis -mode=latency -snippets-file=- Reviewers: RKSimon, craig.topper, andreadb Subscribers: gbedwell, llvm-commits Differential Revision: https://reviews.llvm.org/D54107 llvm-svn: 346482
* [llvm-rc] Support joined or separate spelling for /fo flagPetr Hosek2018-11-092-0/+4
| | | | | | | | | CMake invokes rc using the joined spelling which appears to be supported by Microsoft's rc implementation, so we should support it as well. Differential Revision: https://reviews.llvm.org/D54191 llvm-svn: 346470
* [llvm-rc] Support absolute filenames in manifestsPetr Hosek2018-11-081-0/+3
| | | | | | | | | | CMake generate manifests that contain absolute filenames and these currently result in assertion error. This change ensures that we handle these correctly. Differential Revision: https://reviews.llvm.org/D54194 llvm-svn: 346450
* [NFC][BdVer2] Load and store throughput tests: also check sched stats (PR39465)Roman Lebedev2018-11-082-2/+240
| | | | | | | | As noted by Andrea Di Biagio in https://bugs.llvm.org/show_bug.cgi?id=39465 both the loads and stores occupy both the store and load queues. This is clearly wrong. llvm-svn: 346425
* [dsymutil] Copy the LC_BUILD_VERSION load command into the companion binary.Adrian Prantl2018-11-082-0/+11
| | | | | | | | | | | | | LC_BUILD_VERSION contains platform information that is useful for LLDB to match up dSYM bundles with binaries. This patch copies the load command over into the dSYM. rdar://problem/44145175 rdar://problem/45883463 Differential Revision: https://reviews.llvm.org/D54233 llvm-svn: 346412
* [NFC][BdVer2] Tests for load and store throughput (PR39465)Roman Lebedev2018-11-082-0/+1209
| | | | | | | | | | | | | | | | During review it was noted that while it appears that the Piledriver can do two [consecutive] loads per cycle, it can only do one store per cycle. It was suggested that the sched model incorrectly models that, but it was opted to fix this afterwards. These tests show that the two consecutive loads are modelled correctly, and one consecutive stores is not modelled incorrectly. Unless i'm missing the point. https://bugs.llvm.org/show_bug.cgi?id=39465 llvm-svn: 346404
* [llvm-readobj] Implement LLVM style printer for --notesJordan Rupprecht2018-11-073-31/+119
| | | | | | | | | | | | | | | | | Summary: Port the GNU style printNotes method to the LLVMStyle subclass. This is basically just a heavy refactor so that the note parsing/formatting logic from the GNUStyle::printNotes can be shared with LLVMStyle::printNotes. Reviewers: MaskRay Reviewed By: MaskRay Subscribers: dschuff, fedor.sergeev, llvm-commits Differential Revision: https://reviews.llvm.org/D54220 llvm-svn: 346371
* Fix spelling errorAdrian Prantl2018-11-071-1/+1
| | | | llvm-svn: 346359
* [llvm-exegesis] Correclty handle all X86 memory encoding formats.Clement Courbet2018-11-077-0/+42
| | | | | | | | | | | | | | Summary: Add unit tests to check the support for each supported format to avoid regressions such as the one in PR36906. Reviewers: gchatelet Subscribers: tschuett, lebedev.ri, llvm-commits Differential Revision: https://reviews.llvm.org/D54144 llvm-svn: 346330
* [WebAssembly] Update test cases after FixFunctionBitcastsHeejin Ahn2018-11-078-19/+32
| | | | | | | | | | | | | | Summary: This updates generated binaries and corresponding test cases up to date after applying FixFunctionBitcasts pass. Reviewers: sbc100 Subscribers: dschuff, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54070 llvm-svn: 346286
* [XRay] Update XRayRecord to support Custom/Typed EventsDean Michael Berris2018-11-0612-71/+71
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: This change cuts across LLVM and compiler-rt to add support for rendering custom events in the XRayRecord type, to allow for including user-provided annotations in the output YAML (as raw bytes). This work enables us to add custom event and typed event records into the `llvm::xray::Trace` type for user-provided events. This can then be programmatically handled through the C++ API and can be included in some of the tooling as well. For now we support printing the raw data we encounter in the custom events in the converted output. Future work will allow us to start interpreting these custom and typed events through a yet-to-be-defined API for extending the trace analysis library. Reviewers: mboerger Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D54139 llvm-svn: 346214
* [DWARF v5] Verifier: Add checks for DW_FORM_strx* forms.Wolfgang Pieb2018-11-032-2/+90
| | | | | | | | | Adding functionality to the DWARF verifier for DWARF v5 strx* forms which index into the string offsets table. Differential Revision: https://reviews.llvm.org/D54049 llvm-svn: 346061
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