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* Merging r339492:Hans Wennborg2018-08-133-9/+9
| | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r339492 | tstellar | 2018-08-11 03:08:34 +0200 (Sat, 11 Aug 2018) | 9 lines [gold] Fix Tests cases on i686 Reviewers: tejohnson Reviewed By: tejohnson Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D50583 ------------------------------------------------------------------------ llvm-svn: 339544
* Merging r339073:Hans Wennborg2018-08-137-7/+7
| | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r339073 | stella.stamenova | 2018-08-07 00:37:44 +0200 (Tue, 07 Aug 2018) | 14 lines [lit, python] Always add quotes around the python path in lit Summary: The issue with the python path is that the path to python on Windows can contain spaces. To make the tests always work, the path to python needs to be surrounded by quotes. This change updates several configuration files which specify the path to python as a substitution and also remove quotes from existing tests. Reviewers: asmith, zturner, alexshap, jakehehrlich Reviewed By: zturner, alexshap, jakehehrlich Subscribers: mehdi_amini, nemanjai, eraman, kbarton, jakehehrlich, steven_wu, dexonsmith, stella.stamenova, delcypher, llvm-commits Differential Revision: https://reviews.llvm.org/D50206 ------------------------------------------------------------------------ llvm-svn: 339541
* Merging r338703 and r338709:Hans Wennborg2018-08-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r338703 | bd1976llvm | 2018-08-02 13:27:38 +0200 (Thu, 02 Aug 2018) | 8 lines [llvm-ar] Correct help text Corrected and simplified the help text. It was clearly too difficult to maintain before (see e.g. @227296) making it simpler and more consistent it should help people keep it up to date. Differential Revision: https://reviews.llvm.org/D48577 ------------------------------------------------------------------------ ------------------------------------------------------------------------ r338709 | bd1976llvm | 2018-08-02 14:27:01 +0200 (Thu, 02 Aug 2018) | 3 lines [llvm-ar] Fix help text test. NFC. Missed from @338703 ------------------------------------------------------------------------ llvm-svn: 338840
* [llvm-mca][x86] Add CMPS/LODS/MOVS/STOS string instruction resource testsSimon Pilgrim2018-08-0110-9/+529
| | | | llvm-svn: 338532
* [llvm-mca][x86] Add STC + STD instruction resource testsSimon Pilgrim2018-08-0110-10/+80
| | | | llvm-svn: 338514
* Revert "Enrich inline messages", tests failDavid Bolvansky2018-08-011-4/+2
| | | | llvm-svn: 338496
* Enrich inline messagesDavid Bolvansky2018-08-011-2/+4
| | | | | | | | | | | | | | | | | | | | | | Summary: This patch improves Inliner to provide causes/reasons for negative inline decisions. 1. It adds one new message field to InlineCost to report causes for Always and Never instances. All Never and Always instantiations must provide a simple message. 2. Several functions that used to return the inlining results as boolean are changed to return InlineResult which carries the cause for negative decision. 3. Changed remark priniting and debug output messages to provide the additional messages and related inline cost. 4. Adjusted tests for changed printing. Patch by: yrouban (Yevgeny Rouban) Reviewers: craig.topper, sammccall, sgraenitz, NutshellySima, shchenz, chandlerc, apilipenko, javed.absar, tejohnson, dblaikie, sanjoy, eraman, xbolva00 Reviewed By: tejohnson, xbolva00 Subscribers: xbolva00, llvm-commits, arsenm, mehdi_amini, eraman, haicheng, steven_wu, dexonsmith Differential Revision: https://reviews.llvm.org/D49412 llvm-svn: 338494
* [DWARF] Support for .debug_addr (consumer)Victor Leschuk2018-07-3115-0/+343
| | | | | | | This patch implements basic support for parsing and dumping DWARFv5 .debug_addr section. llvm-svn: 338447
* [llvm-objcopy] Make --strip-debug strip .gdb_indexFangrui Song2018-07-311-1/+7
| | | | | | | | | | | | | | | | | Summary: See binutils-gdb/bfd/elf.c, GNU objcopy also strips .stab* (STABS) .line* (DWARF 1) .gnu.linkonce.wi.* (linkonce section for .debug_info) but I'm not sure we need to be compatible with it. Reviewers: dblaikie, alexshap, jakehehrlich, jhenderson Reviewed By: alexshap, jakehehrlich Subscribers: aprantl, JDevlieghere, jakehehrlich, llvm-commits Differential Revision: https://reviews.llvm.org/D50100 llvm-svn: 338443
* [llvm-mca][x86] Add 32-bit instruction resource testsSimon Pilgrim2018-07-3110-0/+792
| | | | | | These aren't exhaustive, but cover some instructions that are only available in 32-bit mode (where would we be without good BCD math performance?). llvm-svn: 338404
* Revert Enrich inline messagesDavid Bolvansky2018-07-311-4/+2
| | | | llvm-svn: 338389
* Enrich inline messagesDavid Bolvansky2018-07-311-2/+4
| | | | | | | | | | | | | | | | | | | | | | Summary: This patch improves Inliner to provide causes/reasons for negative inline decisions. 1. It adds one new message field to InlineCost to report causes for Always and Never instances. All Never and Always instantiations must provide a simple message. 2. Several functions that used to return the inlining results as boolean are changed to return InlineResult which carries the cause for negative decision. 3. Changed remark priniting and debug output messages to provide the additional messages and related inline cost. 4. Adjusted tests for changed printing. Patch by: yrouban (Yevgeny Rouban) Reviewers: craig.topper, sammccall, sgraenitz, NutshellySima, shchenz, chandlerc, apilipenko, javed.absar, tejohnson, dblaikie, sanjoy, eraman, xbolva00 Reviewed By: tejohnson, xbolva00 Subscribers: xbolva00, llvm-commits, arsenm, mehdi_amini, eraman, haicheng, steven_wu, dexonsmith Differential Revision: https://reviews.llvm.org/D49412 llvm-svn: 338387
* [llvm-mca][BtVer2] Teach how to identify dependency-breaking idioms.Andrea Di Biagio2018-07-314-104/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch teaches llvm-mca how to identify dependency breaking instructions on btver2. An example of dependency breaking instructions is the zero-idiom XOR (example: `XOR %eax, %eax`), which always generates zero regardless of the actual value of the input register operands. Dependency breaking instructions don't have to wait on their input register operands before executing. This is because the computation is not dependent on the inputs. Not all dependency breaking idioms are also zero-latency instructions. For example, `CMPEQ %xmm1, %xmm1` is independent on the value of XMM1, and it generates a vector of all-ones. That instruction is not eliminated at register renaming stage, and its opcode is issued to a pipeline for execution. So, the latency is not zero. This patch adds a new method named isDependencyBreaking() to the MCInstrAnalysis interface. That method takes as input an instruction (i.e. MCInst) and a MCSubtargetInfo. The default implementation of isDependencyBreaking() conservatively returns false for all instructions. Targets may override the default behavior for specific CPUs, and return a value which better matches the subtarget behavior. In future, we should teach to Tablegen how to automatically generate the body of isDependencyBreaking from scheduling predicate definitions. This would allow us to expose the knowledge about dependency breaking instructions to the machine schedulers (and, potentially, other codegen passes). Differential Revision: https://reviews.llvm.org/D49310 llvm-svn: 338372
* [dsymutil] Simplify temporary file handling.Jonas Devlieghere2018-07-293-12/+0
| | | | | | | | | | | Dsymutil's update functionality was broken on Windows because we tried to rename a file while we're holding open handles to that file. TempFile provides a solution for this through its keep(Twine) method. This patch changes dsymutil to make use of that functionality. Differential revision: https://reviews.llvm.org/D49860 llvm-svn: 338216
* Handle the lack of a symbol table correctly.Stephen Hines2018-07-261-0/+7
| | | | | | | | | | | | | | | | | Summary: These two cases will trigger a dereference on a nullptr, since the SymbolTable can be nonexistent for a given library, in addition to just being empty. Reviewers: alexshap Reviewed By: alexshap Subscribers: meikeb, kongyi, chh, jakehehrlich, llvm-commits, pirama Differential Revision: https://reviews.llvm.org/D49534 llvm-svn: 338062
* [test] Disable dsymutil update test on windowsJonas Devlieghere2018-07-263-2/+8
| | | | | | | | | | | | | | | | Apparently, the issue with dsymutil update functionality on Windows was that Windows doesn't like dsymutil renaming files that have open handles to them. This disables the new accelerator test and updates the comment in the other two test. We should be able to enable the tests again once we updated the implementation to use TempFile::keep() to keep the temporary files in MachOUtils. A big thank you to Jeremy Morse from Sony for figuring this out and bringing it to my attention. llvm-svn: 338030
* [test] Do dsymutil update in placeJonas Devlieghere2018-07-261-6/+6
| | | | | | | | Update the dSYM bundle in place when swapping out the accelerator tables. This should unbreak the windows bot that have been failing with an access denied. llvm-svn: 338014
* [dsymutil] Add support for generating DWARF5 accelerator tables.Jonas Devlieghere2018-07-252-0/+39
| | | | | | | | | | | | | | | | | | This patch add support for emitting DWARF5 accelerator tables (.debug_names) from dsymutil. Just as with the Apple style accelerator tables, it's possible to update existing dSYMs. This patch includes a test that show how you can convert back and forth between the two types. If no kind of table is specified, dsymutil will default to generating Apple-style accelerator tables whenever it finds those in its input. The same is true when there are no accelerator tables at all. Finally, in the remaining case, where there's at least one DWARF v5 table and no Apple ones, the output will contains a DWARF accelerator tables (.debug_names). Differential revision: https://reviews.llvm.org/D49137 llvm-svn: 337980
* [llvm-objdump] Add dynamic section printing to private-headers optionPaul Semel2018-07-254-0/+96
| | | | | | Differential Revision: https://reviews.llvm.org/D49016 llvm-svn: 337902
* [llvm-readobj] Generic hex-dump optionPaul Semel2018-07-251-0/+5
| | | | | | | | | | Helpers are available to make this option file format independant. This patch adds the feature for Wasm file format. It doesn't change the behavior of the other file format handling. Differential Revision: https://reviews.llvm.org/D49545 llvm-svn: 337896
* [DWARF v5] Refactor range lists dumping by using a more generic way of ↵Wolfgang Pieb2018-07-232-26/+26
| | | | | | | | | | | | | handling tables of lists. The intent is to use it for location list tables as well. Change is almost NFC with the exception of the spelling of some strings used during dumping (all lowercase now). Reviewer: JDevlieghere Differential Revision: https://reviews.llvm.org/D49500 llvm-svn: 337763
* [yaml2obj] Add default sh_entsize for dynamic sectionsPaul Semel2018-07-231-0/+17
| | | | | | | | | | Dynamic section holds a table, so the sh_entsize might be set. As the dynamic section entry size never changes, we can default it to the size of a dynamic entry. Differential Revision: https://reviews.llvm.org/D49619 llvm-svn: 337725
* [NFC][MCA] ZnVer1: Update RegisterFile to identify false dependencies on ↵Roman Lebedev2018-07-235-95/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | partially written registers. Summary: Pretty mechanical follow-up for D49196. As microarchitecture.pdf notes, "20 AMD Ryzen pipeline", "20.8 Register renaming and out-of-order schedulers": The integer register file has 168 physical registers of 64 bits each. The floating point register file has 160 registers of 128 bits each. "20.14 Partial register access": The processor always keeps the different parts of an integer register together. ... An instruction that writes to part of a register will therefore have a false dependence on any previous write to the same register or any part of it. Reviewers: andreadb, courbet, RKSimon, craig.topper, GGanesh Reviewed By: GGanesh Subscribers: gbedwell, llvm-commits Differential Revision: https://reviews.llvm.org/D49393 llvm-svn: 337676
* [NFC][MCA] ZnVer1: add partial-reg-update testsRoman Lebedev2018-07-237-0/+460
| | | | | | | | | | | | Reviewers: andreadb, courbet, RKSimon, craig.topper, GGanesh Reviewed By: GGanesh Subscribers: gbedwell, llvm-commits Differential Revision: https://reviews.llvm.org/D49392 llvm-svn: 337675
* [COFF] Adjust how we flag weak externalsMartin Storsjo2018-07-203-5/+58
| | | | | | | | | | This fixes PR36096. Originally based on a patch by Martell Malone. Differential Revision: https://reviews.llvm.org/D44357 llvm-svn: 337613
* [llvm-objcopy] Add basic support for --rename-sectionJordan Rupprecht2018-07-202-0/+71
| | | | | | | | | | | | | | | Summary: Add basic support for --rename-section=old=new to llvm-objcopy. A full replacement for GNU objcopy requires also modifying flags (i.e. --rename-section=old=new,flag1,flag2); I'd like to keep that in a separate change to keep this simple. Reviewers: jakehehrlich, alexshap Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D49576 llvm-svn: 337604
* [llvm-mca][x86] Add movsx/movzx instructions to general x86_64 resource testsSimon Pilgrim2018-07-2010-10/+700
| | | | llvm-svn: 337586
* [llvm-objcopy, tests] Fix several llvm-objcopy testsStella Stamenova2018-07-201-1/+9
| | | | | | | | | | | | | | Summary: In Python 3, sys.stdout.write expects a string rather than bytes. In order to be able to write the bytes to stdout, we need to use the buffer directly instead. This change is borrowing the implementation for writing to stdout that cat.py uses. Note that we cannot use cat.py directly because the file we are trying to open is a gzip file. Reviewers: asmith, bkramer, alexshap, jakehehrlich Reviewed By: alexshap, jakehehrlich Subscribers: jakehehrlich, llvm-commits Differential Revision: https://reviews.llvm.org/D49515 llvm-svn: 337567
* [X86][BtVer2] correctly model the latency/throughput of LEA instructions.Andrea Di Biagio2018-07-191-171/+171
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the latency/throughput of LEA instructions in the BtVer2 scheduling model. On Jaguar, A 3-operands LEA has a latency of 2cy, and a reciprocal throughput of 1. That is because it uses one cycle of SAGU followed by 1cy of ALU1. An LEA with a "Scale" operand is also slow, and it has the same latency profile as the 3-operands LEA. An LEA16r has a latency of 3cy, and a throughput of 0.5 (i.e. RThrouhgput of 2.0). This patch adds a new TIIPredicate named IsThreeOperandsLEAFn to X86Schedule.td. The tablegen backend (for instruction-info) expands that definition into this (file X86GenInstrInfo.inc): ``` static bool isThreeOperandsLEA(const MachineInstr &MI) { return ( ( MI.getOpcode() == X86::LEA32r || MI.getOpcode() == X86::LEA64r || MI.getOpcode() == X86::LEA64_32r || MI.getOpcode() == X86::LEA16r ) && MI.getOperand(1).isReg() && MI.getOperand(1).getReg() != 0 && MI.getOperand(3).isReg() && MI.getOperand(3).getReg() != 0 && ( ( MI.getOperand(4).isImm() && MI.getOperand(4).getImm() != 0 ) || (MI.getOperand(4).isGlobal()) ) ); } ``` A similar method is generated in the X86_MC namespace, and included into X86MCTargetDesc.cpp (the declaration lives in X86MCTargetDesc.h). Back to the BtVer2 scheduling model: A new scheduling predicate named JSlowLEAPredicate now checks if either the instruction is a three-operands LEA, or it is an LEA with a Scale value different than 1. A variant scheduling class uses that new predicate to correctly select the appropriate latency profile. Differential Revision: https://reviews.llvm.org/D49436 llvm-svn: 337469
* [llvm-readobj] - Do not report invalid amount of sections.George Rimar2018-07-191-1/+2
| | | | | | | | | | | When output style is GNU and amount of sections is >= SHN_LORESERVE, llvm-readobj reports zero number of sections instead of actual value. The patch fixes that. Differential revision: https://reviews.llvm.org/D49544 llvm-svn: 337462
* [llvm-readobj] Generic -string-dump optionPaul Semel2018-07-181-0/+8
| | | | | | Differential Revision: https://reviews.llvm.org/D49470 llvm-svn: 337408
* [llvm-objdump] Add -demangle (-C) optionPaul Semel2018-07-181-0/+47
| | | | | | Differential Revision: https://reviews.llvm.org/D49043 llvm-svn: 337401
* [llvm-objcopy] %python wants to be in quotes, because it might contain spacesBenjamin Kramer2018-07-184-4/+4
| | | | llvm-svn: 337399
* [llvm-objdump] - Stop reporting bogus section IDs.George Rimar2018-07-181-0/+25
| | | | | | | | | | | | | | | | Imagine we have a file with few sections, and one of them is .foo with index N != 0. Problem is that when llvm-objdump is given a -section=.foo parameter it lists .foo as a section at index 0. That makes impossible to write test cases which needs to find the index of the particular section, while ignoring dumping of others. The patch fixes that. Differential revision: https://reviews.llvm.org/D49372 llvm-svn: 337361
* [llvm-readobj] - Teach tool to dump objects with >= SHN_LORESERVE of sections.George Rimar2018-07-183-0/+36
| | | | | | | | | | | | | | | | | | http://www.sco.com/developers/gabi/2003-12-17/ch4.eheader.html says that e_shnum and/or e_shstrndx may have special values if "the number of sections is greater than or equal to SHN_LORESERVE" or "the section name string table section index is greater than or equal to SHN_LORESERVE (0xff00)" Previously llvm-readobj was unable to dump such files, patch changes that. I had to add a precompiled test case because it does not seem possible to prepare a test using yaml2obj or llvm-mc (not clear how to make .shstrtab to have index >= SHN_LORESERVE). Differential revision: https://reviews.llvm.org/D49369 llvm-svn: 337360
* [llvm-mca][x86] Add extend, carry-flag and CMP instructions to general ↵Simon Pilgrim2018-07-1710-10/+1200
| | | | | | x86_64 resource tests llvm-svn: 337306
* [llvm-mca][x86] Add MOVBE resource tests to all supporting targetsSimon Pilgrim2018-07-179-0/+462
| | | | | | SNB doesn't support MOVBE but the numbers in Generic (which use the SNB model) look sane. llvm-svn: 337305
* [llvm-mca][x86] Add BSWAP resource testsSimon Pilgrim2018-07-1710-10/+80
| | | | llvm-svn: 337302
* [llvm-mca][x86] Add displacement-only and additional scale=1 LEA testsSimon Pilgrim2018-07-171-1/+82
| | | | llvm-svn: 337298
* [llvm-mca][x86] Add LEA resource tests (PR32326)Simon Pilgrim2018-07-171-0/+362
| | | | | | Add llvm-mca tests demonstrating how LEA instructions are currently modelled. Once this is working on btver2 I'll copy the test file to the other target directories. llvm-svn: 337297
* [llvm-objcopy] Run not with any python, but the python configured in lit.Benjamin Kramer2018-07-174-4/+4
| | | | llvm-svn: 337262
* [llvm-objcopy] Add support for large indexesJake Ehrlich2018-07-166-0/+80
| | | | | | | | | | | | | | | | | | | This patch is an update of an older patch that never landed (see here: https://reviews.llvm.org/D42516) Recently various users have run into this issue and it just 100% has to be solved at this point. The main difference in this patch is that I use gunzip instead of unzip which should hopefully allow tests to pass. Please review this as if it is a new patch however. I found some issues along the way and made some minor modifications. The binary used in this patch for testing (a zip file to make it small) can be found here: https://drive.google.com/file/d/1UjsnTO9edLttZibbr-2T1bJl92KEQFAO/view?usp=sharing Differential Revision: https://reviews.llvm.org/D49206 llvm-svn: 337204
* [cfi-verify] Abort on unsupported targetsJoel Galenson2018-07-162-0/+234
| | | | | | | | As suggested in the review for r337007, this makes cfi-verify abort on unsupported targets instead of producing incorrect results. It also updates the design document to reflect this. Differential Revision: https://reviews.llvm.org/D49304 llvm-svn: 337181
* [llvm-mca] Regenerate X86 specific tests. NFCAndrea Di Biagio2018-07-1513-15/+15
| | | | | | Not all tests were correctly updated by the update script after r336797. llvm-svn: 337124
* [llvm-mca][BtVer2] teach how to identify false dependencies on partially writtenAndrea Di Biagio2018-07-155-62/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | registers. The goal of this patch is to improve the throughput analysis in llvm-mca for the case where instructions perform partial register writes. On x86, partial register writes are quite difficult to model, mainly because different processors tend to implement different register merging schemes in hardware. When the code contains partial register writes, the IPC (instructions per cycles) estimated by llvm-mca tends to diverge quite significantly from the observed IPC (using perf). Modern AMD processors (at least, from Bulldozer onwards) don't rename partial registers. Quoting Agner Fog's microarchitecture.pdf: " The processor always keeps the different parts of an integer register together. For example, AL and AH are not treated as independent by the out-of-order execution mechanism. An instruction that writes to part of a register will therefore have a false dependence on any previous write to the same register or any part of it." This patch is a first important step towards improving the analysis of partial register updates. It changes the semantic of RegisterFile descriptors in tablegen, and teaches llvm-mca how to identify false dependences in the presence of partial register writes (for more details: see the new code comments in include/Target/TargetSchedule.h - class RegisterFile). This patch doesn't address the case where a write to a part of a register is followed by a read from the whole register. On Intel chips, high8 registers (AH/BH/CH/DH)) can be stored in separate physical registers. However, a later (dirty) read of the full register (example: AX/EAX) triggers a merge uOp, which adds extra latency (and potentially affects the pipe usage). This is a very interesting article on the subject with a very informative answer from Peter Cordes: https://stackoverflow.com/questions/45660139/how-exactly-do-partial-registers-on-haswell-skylake-perform-writing-al-seems-to In future, the definition of RegisterFile can be extended with extra information that may be used to identify delays caused by merge opcodes triggered by a dirty read of a partial write. Differential Revision: https://reviews.llvm.org/D49196 llvm-svn: 337123
* Attempt to get test/tools/llvm-lib/help.test passing on ↵Nico Weber2018-07-141-1/+4
| | | | | | | | | | | sanitizer-x86_64-linux-fast The bot has a /b directory, so /? matches against that and gets expanded to it. (Thanks to Hans's r187366, which solved the same problem for clang-cl a while ago and which saved me much head scratching.) llvm-svn: 337092
* Give llvm-lib rudimentary help output.Nico Weber2018-07-141-0/+3
| | | | | | https://reviews.llvm.org/D49318 llvm-svn: 337084
* [dwarfdump] Add pretty printer for accelerator table based on Atom.Jonas Devlieghere2018-07-131-1/+1
| | | | | | | | For instance, When dumping .apple_types, the second atom represents the DW_TAG. In addition to printing the raw value, we now also pretty print the value if the ATOM tells us how. llvm-svn: 337026
* [llvm-mca][BtVer2] Add tests for dependency breaking instructions.Andrea Di Biagio2018-07-136-1/+412
| | | | llvm-svn: 337024
* [cfi-verify] Only run AArch64 tests when it is a supported targetJoel Galenson2018-07-131-0/+2
| | | | | | This stops the tests I added in r337007 from running when AArch64 is not a supported target. llvm-svn: 337012
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