summaryrefslogtreecommitdiffstats
path: root/llvm/test/tools/llvm-objdump/AArch64
Commit message (Collapse)AuthorAgeFilesLines
* [AArch64][ELF] Add support for PLT decoding with BTI instructions presentPeter Smith2019-06-041-1/+56
| | | | | | | | | | | | | | | | | | | | | | Arm Architecture v8.5a introduces Branch Target Identification (BTI). When enabled all indirect branches must target a bti instruction of the appropriate form. As PLT sequences may sometimes be the target of an indirect branch and PLT[0] always is, a static linker may need to generate PLT sequences that contain "bti c" as the first instruction. In effect: bti c adrp x16, page offset to .got.plt ... Instead of: adrp x16, page offset to .got.plt ... At present the PLT decoding assumes the adrp will always be the first instruction. This patch adds support for a single "bti c" to prefix it. A test binary has been uploaded with such a PLT sequence. A forthcoming LLD patch will make heavy use of the PLT decoding code. Differential Revision: https://reviews.llvm.org/D62598 llvm-svn: 362523
* AArch64: support binutils-like things on arm64_32.Tim Northover2019-05-145-0/+34
| | | | | | | | This adds support for the arm64_32 watchOS ABI to LLVM's low level tools, teaching them about the specific MachO choices and constants needed to disassemble things. llvm-svn: 360663
* [BinaryFormat] Update Mach-O ARM64E CPU subtype and dumpingShoaib Meenai2019-04-082-0/+17
| | | | | | | | | The new value is taken from <mach/machine.h> in the MacOSX10.14 SDK from Xcode 10.1. Update llvm-objdump and llvm-readobj accordingly. Differential Revision: https://reviews.llvm.org/D58636 llvm-svn: 357945
* [llvm-objdump] Simplify disassembleObjectFangrui Song2019-04-071-2/+2
| | | | | | | | * Use std::binary_search to replace some std::lower_bound * Use llvm::upper_bound to replace some std::upper_bound * Use format_hex and support::endian::read{16,32} llvm-svn: 357853
* Revert "Revert "[llvm-objdump] Allow short options without arguments to be ↵Matthew Voss2019-02-191-1/+4
| | | | | | | | | | | | grouped"" - Tests that use multiple short switches now test them grouped and ungrouped. - Ensure the output of ungrouped and grouped variants is identical Differential Revision: https://reviews.llvm.org/D57904 llvm-svn: 354375
* [llvm-objdump] Label calls to the PLT.Joel Galenson2018-08-242-0/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D50204 llvm-svn: 340611
* [llvm-objdump] Print "..." instead of random data for virtual sectionsFrancis Visoiu Mistrih2018-04-191-0/+9
| | | | | | | | | | | | | | | | | When disassembling with -D, skip virtual sections by printing "..." for each symbol. This patch also implements `MachOObjectFile::isSectionVirtual`. Test case comes from: ``` .zerofill __DATA,__common,_data64unsigned,472,3 ``` Differential Revision: https://reviews.llvm.org/D45824 llvm-svn: 330342
* [AArch64] Decorate AArch64 instrs with OPERAND_PCRELRafael Auler2018-03-271-0/+3
| | | | | | | | | | | | | | Summary: This is a canonical way to teach objdump to print the target symbols for branches when disassembling AArch64 code. Reviewers: evandro, t.p.northover, espindola Reviewed By: t.p.northover Differential Revision: https://reviews.llvm.org/D44851 llvm-svn: 328638
* llvm-objdump: Add missing requires for the test in r313921Justin Bogner2017-11-161-0/+1
| | | | | | | This test needs an arm backend in addition to the arm64 one that's already checked in the test directory. llvm-svn: 318449
* Fix a bug in llvm-objdump when disassembling using the wrong default CPUKevin Enderby2017-09-212-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | in the second slice of a Mach-O universal file. The code in llvm-objdump in in DisassembleMachO() was getting the default CPU then incorrectly setting into the global variable used for the -mcpu option if that was not set. This caused a second call to DisassembleMachO() to use the wrong default CPU when disassembling the next slice in a Mach-O universal file. And would result in bad disassembly and an error message about an recognized processor for the target: % llvm-objdump -d -m -arch all fat.macho-armv7s-arm64 fat.macho-armv7s-arm64 (architecture armv7s): (__TEXT,__text) section armv7: 0: 60 47 bx r12 fat.macho-armv7s-arm64 (architecture arm64): 'cortex-a7' is not a recognized processor for this target (ignoring processor) 'cortex-a7' is not a recognized processor for this target (ignoring processor) (__TEXT,__text) section ___multc3: 0: .long 0x1e620810 rdar://34439149 llvm-svn: 313921
* [llvm-objdump] Properly print MachO aarch64 addend relocationsMartin Storsjo2017-07-132-0/+6
| | | | | | | | | | Previously such relocations fell into the last case for local symbols, using the relocation addend as symbol index, leading to a crash. Differential Revision: https://reviews.llvm.org/D35239 llvm-svn: 307927
* Updated llvm-objdump for arm64 Mach-O MH_KEXT_BUNDLE file types soKevin Enderby2017-06-222-0/+9
| | | | | | | | | it symbolically disassembles the __text section from the __TEXT_EXEC segment not the usual __TEXT segment by default. rdar://30590208 llvm-svn: 306046
* Yet another fix llvm-objdump so it picks a good CPU based for Mach-O files,Kevin Enderby2017-02-103-1/+4
| | | | | | | | | | | in this case for CPU_SUBTYPE_ARM64_ALL. For this cpusubtype it should default to a cyclone CPU to give proper disassembly without a -mcpu= flag. rdar://27767188 llvm-svn: 294771
* Add support for the ARM_THREAD_STATE64 andKevin Enderby2016-11-032-0/+19
| | | | | | | | | | | | | in llvm-objdump for Mach-O files add the printing of the ARM_THREAD_STATE64 in the same format as otool-classic(1) on darwin. To do this the 64-bit ARM general tread state needed to be defined in include/llvm/Support/MachO.h . rdar://28985800 llvm-svn: 285967
* Update the AArch64ExternalSymbolizer to print literal strings as escaped stringsKevin Enderby2016-06-131-2/+1
| | | | | | | | so it is the same as the MCExternalSymbolizer. rdar://17349181 llvm-svn: 272588
* add support for -print-imm-hex for AArch64Paul Osmialowski2016-05-131-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | Most immediates are printed in Aarch64InstPrinter using 'formatImm' macro, but not all of them. Implementation contains following rules: - floating point immediates are always printed as decimal - signed integer immediates are printed depends on flag settings (for negative values 'formatImm' macro prints the value as i.e -0x01 which may be convenient when imm is an address or offset) - logical immediates are always printed as hex - the 64-bit immediate for advSIMD, encoded in "a:b:c:d:e:f:g:h" is always printed as hex - the 64-bit immedaite in exception generation instructions like: brk, dcps1, dcps2, dcps3, hlt, hvc, smc, svc is always printed as hex - the rest of immediates is printed depends on availability of -print-imm-hex Signed-off-by: Maciej Gabka <maciej.gabka@arm.com> Signed-off-by: Paul Osmialowski <pawel.osmialowski@arm.com> Differential Revision: http://reviews.llvm.org/D16929 llvm-svn: 269446
* Revert r265817Colin LeMahieu2016-04-081-4/+4
| | | | | | lld tests need to be addressed. llvm-svn: 265822
* [llvm-objdump] Printing hex instead of dec by defaultColin LeMahieu2016-04-081-4/+4
| | | | | | Differential Revision: http://reviews.llvm.org/D18770 llvm-svn: 265817
* [PATCH] D13360: [llvm-objdump] Teach -d about AArch64 mapping symbolsDavide Italiano2015-10-011-0/+30
| | | | | | | | | | AArch64 uses $d* and $x* to interleave between text and data. llvm-objdump didn't know about this so it ended up printing garbage. This patch is a first step towards a solution of the problem. Differential Revision: http://reviews.llvm.org/D13360 llvm-svn: 249083
* [Objdump] Pass the correct subtarget to printInst.Akira Hatanaka2015-03-282-0/+3
| | | | | | This fixes a bug I introduced in r233411. llvm-svn: 233484
* dd the option, -link-opt-hints to llvm-objdump used with -macho to print theKevin Enderby2015-01-272-0/+11
| | | | | | Mach-O AArch64 linker optimization hints for ADRP code optimization. llvm-svn: 227246
* Add printing the LC_ENCRYPTION_INFO_64 load command with llvm-objdump’s ↵Kevin Enderby2014-12-171-0/+312
| | | | | | | | -private-headers and add tests for the two AArch64 binaries. llvm-svn: 224400
* Add the code and test cases for 64-bit ARM to llvm-objdump’s Mach-O ↵Kevin Enderby2014-11-146-0/+25
symbolizer. FYI, removed the unused MCInstrAnalysis as it does not exist for 64-bit ARM and was causing a “couldn't initialize disassembler for target” error. llvm-svn: 222045
OpenPOWER on IntegriCloud