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* remove blank linesSanjay Patel2016-05-021-8/+1
| | | | llvm-svn: 268246
* [InstCombine] regenerate checksSanjay Patel2016-05-021-342/+493
| | | | llvm-svn: 268245
* [InstCombine] regenerate checksSanjay Patel2016-05-021-81/+73
| | | | llvm-svn: 268244
* [InstCombine] regenerate checksSanjay Patel2016-05-021-69/+103
| | | | llvm-svn: 268242
* [InstCombine] regenerate checksSanjay Patel2016-05-021-131/+183
| | | | llvm-svn: 268241
* [InstCombine] regenerate checksSanjay Patel2016-05-021-33/+43
| | | | llvm-svn: 268239
* [InstCombine] regenerate checksSanjay Patel2016-05-021-500/+674
| | | | llvm-svn: 268232
* [InstCombine][SSE] Added support to VPERMD/VPERMPS to shuffle combine to ↵Simon Pilgrim2016-05-011-5/+5
| | | | | | accept UNDEF elements. llvm-svn: 268206
* Dropped FIXME commentSimon Pilgrim2016-05-011-1/+1
| | | | llvm-svn: 268205
* [InstCombine][SSE] Added support to VPERMILVAR to shuffle combine to accept ↵Simon Pilgrim2016-05-011-8/+8
| | | | | | UNDEF elements. llvm-svn: 268204
* [InstCombine][AVX] Fixed PERMILVAR identity tests and added additional ↵Simon Pilgrim2016-05-011-13/+47
| | | | | | decode tests llvm-svn: 268203
* [InstCombine][SSE] Added support to PSHUFB to shuffle combine to accept ↵Simon Pilgrim2016-05-011-6/+4
| | | | | | UNDEF elements. llvm-svn: 268202
* [InstCombine][SSE] Regenerate MOVSX/MOVZX testsSimon Pilgrim2016-05-012-114/+116
| | | | llvm-svn: 268201
* [InstCombine][AVX2] Combine VPERMD/VPERMPS intrinsics with constant masks to ↵Simon Pilgrim2016-05-011-15/+13
| | | | | | shufflevector. llvm-svn: 268199
* [InstCombine][AVX2] Added VPERMD/VPERMPS shuffle combining placeholder tests.Simon Pilgrim2016-04-301-0/+87
| | | | | | For future support for VPERMD/VPERMPS to generic shuffles combines llvm-svn: 268166
* [InstCombine][AVX] Split off VPERMILVAR tests and added additional tests for ↵Simon Pilgrim2016-04-302-60/+124
| | | | | | UNDEF mask elements llvm-svn: 268159
* [InstCombine] Determine the result of a select based on a dominating condition.Chad Rosier2016-04-291-0/+103
| | | | | | Differential Revision: http://reviews.llvm.org/D19550 llvm-svn: 268104
* [ValueTracking] matchSelectPattern needs to be more careful around FPDavid Majnemer2016-04-291-0/+26
| | | | | | | | | | | | matchSelectPattern attempts to see through casts which mask min/max patterns from being more obvious. Under certain circumstances, it would misidentify a sequence of instructions as a min/max because it assumed that folding casts would preserve the result. This is not the case for floating point <-> integer casts. This fixes PR27575. llvm-svn: 268086
* auto-generate checksSanjay Patel2016-04-291-43/+40
| | | | llvm-svn: 268061
* [InstCombine][SSE] Added x86 pshufb undef mask testsSimon Pilgrim2016-04-291-1/+37
| | | | | FIXME: We currently don't support folding constant pshufb shuffle masks containing undef elements. llvm-svn: 268016
* [InstCombine][SSE] Regenerated x86 pshufb testsSimon Pilgrim2016-04-291-90/+113
| | | | llvm-svn: 268014
* [InstCombine][SSE] Add MOVMSK support to SimplifyDemandedUseBitsSimon Pilgrim2016-04-281-27/+10
| | | | | | | | | | The MOVMSK instructions copies a vector elements' sign bits to the low bits of a scalar register and zeros the high bits. This patch adds MOVMSK support to SimplifyDemandedUseBits so that its aware that the upper bits are known to be zero. It also removes the call to MOVMSK if none of the lower bits are actually required and just returns zero. Differential Revision: http://reviews.llvm.org/D19614 llvm-svn: 267873
* [InstCombine][AVX2] Add AVX2 per-element vector shift testsSimon Pilgrim2016-04-271-0/+467
| | | | | | At the moment we don't simplify PSRAV/PSRLV/PSLLV intrinsics to generic IR for constant shift amounts, but we could. llvm-svn: 267777
* [InstCombine] Sharpended test case in pr21210.llGerolf Hoflehner2016-04-271-3/+4
| | | | llvm-svn: 267742
* [InstCombine][SSE] Regenerated vector shift testsSimon Pilgrim2016-04-271-356/+505
| | | | llvm-svn: 267699
* [InstCombine][SSE] Added DemandedBits tests for MOVMSK instructionsSimon Pilgrim2016-04-271-0/+137
| | | | | | MOVMSK zeros the upper bits of the gpr - we should be able to use this. llvm-svn: 267686
* Revert "[SimplifyLibCalls] sprintf doesn't copy null bytes"David Majnemer2016-04-261-3/+2
| | | | | | | | | | The destination buffer that sprintf uses is restrict qualified, we do not need to worry about derived pointers referenced via format specifiers. This reverts commit r267580. llvm-svn: 267605
* [SimplifyLibCalls] sprintf doesn't copy null bytesDavid Majnemer2016-04-261-2/+3
| | | | | | | | | | sprintf doesn't read or copy the terminating null byte from it's string operands. sprintf will append it's own after processing all of the format specifiers. This fixes PR27526. llvm-svn: 267580
* Optimize store of "bitcast" from vector to aggregate.Arch D. Robison2016-04-251-0/+74
| | | | | | | | | | | This patch is what was the "instcombine" portion of D14185, with an additional test added (see julia_pseudovec in test/Transforms/InstCombine/insert-val-extract-elem.ll). The patch causes instcombine to replace sequences of extractelement-insertvalue-store that act essentially like a bitcast followed by a store. Differential review: http://reviews.llvm.org/D14260 llvm-svn: 267482
* [InstCombine][SSE] Reduce DIVSS/DIVSD to FDIV if only first element is requiredSimon Pilgrim2016-04-242-10/+4
| | | | | | As discussed on D19318, if we only demand the first element of a DIVSS/DIVSD intrinsic, then reduce to a FDIV call. This matches the existing FADD/FSUB/FMUL patterns. llvm-svn: 267359
* [InstCombine][SSE] Demanded vector elements for scalar intrinsics (Part 2 of 2)Simon Pilgrim2016-04-244-182/+60
| | | | | | | | | | | | | | | | Split from D17490. This patch improves support for determining the demanded vector elements through SSE scalar intrinsics: 1 - demanded vector element support for unary and some extra binary scalar intrinsics (RCP/RSQRT/SQRT/FRCZ and ADD/CMP/DIV/ROUND). 2 - addss/addsd get simplified to a fadd call if we aren't interested in the pass through elements 3 - if we don't need the lowest element of a scalar operation then just use the first argument (the pass through elements) directly We can add support for propagating demanded elements through any equivalent packed SSE intrinsics in a future patch (these wouldn't use the pass through patterns). Differential Revision: http://reviews.llvm.org/D19318 llvm-svn: 267357
* [InstCombine][SSE] Demanded vector elements for scalar intrinsics (Part 1 of 2)Simon Pilgrim2016-04-243-145/+74
| | | | | | | | | | | | This patch improves support for determining the demanded vector elements through SSE scalar intrinsics: 1 - recognise that we only need the lowest element of the second input for binary scalar operations (and all the elements of the first input) 2 - recognise that the roundss/roundsd intrinsics use the lowest element of the second input and the remaining elements from the first input Differential Revision: http://reviews.llvm.org/D17490 llvm-svn: 267356
* Revert r267210, it makes clang assert (PR27490).Nico Weber2016-04-221-39/+0
| | | | llvm-svn: 267232
* [unordered] sink unordered stores at end of blocksPhilip Reames2016-04-221-0/+34
| | | | | | The existing code turned out to be completely correct when auditted. Thus, only minor code changes and adding a couple of tests. llvm-svn: 267215
* Fold compares for distinct allocationsSanjoy Das2016-04-221-0/+50
| | | | | | | | | | | | | | | | Summary: We can fold compares to false when two distinct allocations within a function are compared for equality. Patch by Anna Thomas! Reviewers: majnemer, reames, sanjoy Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D19390 llvm-svn: 267214
* [unordered] Extend load/store type canonicalization to handle unordered ↵Philip Reames2016-04-221-0/+39
| | | | | | | | operations Extend the type canonicalization logic to work for unordered atomic loads and stores. Note that while this change itself is fairly simple and low risk, there's a reasonable chance this will expose problems in the backends by suddenly generating IR they wouldn't have seen before. Anything of this nature will be an existing bug in the backend (you could write an atomic float load), but this will definitely change the frequency with which such cases are encountered. If you see problems, feel free to revert this change, but please make sure you collect a test case. llvm-svn: 267210
* [InstCombine] Preserve fast math flags when combining PHIsSilviu Baranga2016-04-221-0/+89
| | | | | | | | | | | | | | | | | | | | Summary: When optimizing PHIs which have inputs floating point binary operators, we preserve all IR flags except the fast math flags. This change removes the logic which tracked some of the IR flags (no wrap, exact) and replaces it by doing an and on the IR flags of all inputs to the PHI - which will also handle the fast math flags. Reviewers: majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D19370 llvm-svn: 267139
* Folding compares with unescaped allocationsSanjoy Das2016-04-211-0/+42
| | | | | | | | | | | | | | | | Summary: If we know that the pointer allocated within a function does not escape, we can fold away comparisons that are done with global pointers Patch by Anna Thomas! Reviewers: reames, majnemer, sanjoy Subscribers: mgrang, mcrosier, majnemer, llvm-commits Differential Revision: http://reviews.llvm.org/D19276 llvm-svn: 267035
* [instcombine][unordered] Extend load(select) transform to handle unordered loadsPhilip Reames2016-04-211-0/+28
| | | | llvm-svn: 267023
* [unordered] unordered loads from null are still unreachablePhilip Reames2016-04-211-0/+51
| | | | llvm-svn: 267019
* [instcombine][unordered] Implement *-load forwarding for unordered atomicsPhilip Reames2016-04-211-2/+35
| | | | | | This builds on 266999 which made FindAvailableValue do the right thing. Tests included show the newly enabled transforms and those which disabled either due to conservatism or correctness requirements. llvm-svn: 267006
* [unordered] Add tests and conservative handling in support of future changes ↵Philip Reames2016-04-211-1/+47
| | | | | | | | [NFCI] This change adds a couple of test cases to make sure FindAvailableLoadedValue does the right thing. At the moment, the code added is dead, but separating it makes follow on changes far more obvious. llvm-svn: 266999
* [InstCombine][X86] Added extra tests introduced for D17490Simon Pilgrim2016-04-194-0/+578
| | | | llvm-svn: 266732
* [InstCombine][X86] Regenerate SSE combine tests as part of setup for D17490Simon Pilgrim2016-04-196-468/+581
| | | | | | Regenerated with utils/update_test_checks.py llvm-svn: 266731
* Fix a typo in rL265762Sanjoy Das2016-04-171-0/+12
| | | | | | | | | I accidentally replaced `mayBeOverridden` with `!isInterposable`. Remove the negation and add a test case that would've caught this. Many thanks to Håkan Hjort for spotting this! llvm-svn: 266551
* [InstCombine] Don't transform compares of calls to functions named fabs{f,l,}David Majnemer2016-04-151-0/+12
| | | | | | | | InstCombine wants to optimize compares of calls to fabs with zero. However, we didn't have the necessary legality checking to verify that the function call had the same behavior as fabs. llvm-svn: 266452
* [PR27284] Reverse the ownership between DICompileUnit and DISubprogram.Adrian Prantl2016-04-153-9/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently each Function points to a DISubprogram and DISubprogram has a scope field. For member functions the scope is a DICompositeType. DIScopes point to the DICompileUnit to facilitate type uniquing. Distinct DISubprograms (with isDefinition: true) are not part of the type hierarchy and cannot be uniqued. This change removes the subprograms list from DICompileUnit and instead adds a pointer to the owning compile unit to distinct DISubprograms. This would make it easy for ThinLTO to strip unneeded DISubprograms and their transitively referenced debug info. Motivation ---------- Materializing DISubprograms is currently the most expensive operation when doing a ThinLTO build of clang. We want the DISubprogram to be stored in a separate Bitcode block (or the same block as the function body) so we can avoid having to expensively deserialize all DISubprograms together with the global metadata. If a function has been inlined into another subprogram we need to store a reference the block containing the inlined subprogram. Attached to https://llvm.org/bugs/show_bug.cgi?id=27284 is a python script that updates LLVM IR testcases to the new format. http://reviews.llvm.org/D19034 <rdar://problem/25256815> llvm-svn: 266446
* [InstCombine] remove constant by inverting compare + logic (PR27105)Sanjay Patel2016-04-141-0/+23
| | | | | | | | | | | | | | | https://llvm.org/bugs/show_bug.cgi?id=27105 We can check if all bits outside of a constant mask are set with a single constant. As noted in the bug report, although this form should be considered the canonical IR, backends may want to transform this into an 'andn' / 'andc' comparison against zero because that could be a single machine instruction. Differential Revision: http://reviews.llvm.org/D18842 llvm-svn: 266362
* Revert "Support arbitrary addrspace pointers in masked load/store intrinsics"Adam Nemet2016-04-142-22/+22
| | | | | | | | This reverts commit r266086. It breaks the LTO build of gcc in SPEC2000. llvm-svn: 266282
* Simplify strlen to a subtraction for certain cases.David L Kreitzer2016-04-131-7/+5
| | | | | | | | Patch by Li Huang (li1.huang@intel.com) Differential Revision: http://reviews.llvm.org/D18230 llvm-svn: 266200
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