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* Revert r332907 "[GlobalISel] Improving InstructionSelect's performance by ↵Roman Tereshin2018-05-211-658/+730
| | | | | | | | reducing MatchTable..." There is a compile time error I didn't see locally, investigating now. llvm-svn: 332912
* [GlobalISel] Improving InstructionSelect's performance by reducing ↵Roman Tereshin2018-05-211-730/+658
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MatchTable, mostly NFC, perf patch 1 This patch starts a series of patches that decrease time spent by GlobalISel in its InstructionSelect pass by roughly 60% for -O0 builds for large inputs as measured on sqlite3-amalgamation (http://sqlite.org/download.html) targeting AArch64. The performance improvements are achieved solely by reducing the number of matching GIM_* opcodes executed by the MatchTable's interpreter during the selection by approx. a factor of 30, which also brings contribution of this particular part of the selection process to the overall runtime of InstructionSelect pass down from approx. 60-70% to 5-7%, thus making further improvements in this particular direction not very profitable. The improvements described above are expected for any target that doesn't have many complex patterns. The targets that do should strictly benefit from the changes, but by how much exactly is hard to estimate beforehand. It's also likely that such target WILL benefit from further improvements to MatchTable, most likely the ones that bring it closer to a perfect decision tree. This commit specifically is rather large mostly NFC commit that does necessary preparation work and refactoring, there will be a following series of small patches introducing a specific optimization each shortly after. This commit specifically is expected to cause a small compile time regression (around 2.5% of InstructionSelect pass time), which should be fixed by the next commit of the series. Every commit planned shares the same Phabricator Review. Reviewers: qcolombet, dsanders, bogner, aemerson, javed.absar Reviewed By: qcolombet Subscribers: rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D44700 llvm-svn: 332907
* [globalisel] Update GlobalISel emitter to match new representation of ↵Daniel Sanders2018-05-051-43/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | extending loads Summary: Previously, a extending load was represented at (G_*EXT (G_LOAD x)). This had a few drawbacks: * G_LOAD had to be legal for all sizes you could extend from, even if registers didn't naturally hold those sizes. * All sizes you could extend from had to be allocatable just in case the extend went missing (e.g. by optimization). * At minimum, G_*EXT and G_TRUNC had to be legal for these sizes. As we improve optimization of extends and truncates, this legality requirement would spread without considerable care w.r.t when certain combines were permitted. * The SelectionDAG importer required some ugly and fragile pattern rewriting to translate patterns into this style. This patch changes the representation to: * (G_[SZ]EXTLOAD x) * (G_LOAD x) any-extends when MMO.getSize() * 8 < ResultTy.getSizeInBits() which resolves these issues by allowing targets to work entirely in their native register sizes, and by having a more direct translation from SelectionDAG patterns. Each extending load can be lowered by the legalizer into separate extends and loads, however a target that supports s1 will need the any-extending load to extend to at least s8 since LLVM does not represent memory accesses smaller than 8 bit. The legalizer can widenScalar G_LOAD into an any-extending load but sign/zero-extending loads need help from something else like a combiner pass. A follow-up patch that adds combiner helpers for for this will follow. The new representation requires that the MMO correctly reflect the memory access so this has been corrected in a couple tests. I've also moved the extending loads to their own tests since they are (mostly) separate opcodes now. Additionally, the re-write appears to have invalidated two tests from select-with-no-legality-check.mir since the matcher table no longer contains loads that result in s1's and they aren't legal in AArch64 anymore. Depends on D45540 Reviewers: ab, aditya_nandakumar, bogner, rtereshin, volkan, rovka, javed.absar Reviewed By: rtereshin Subscribers: javed.absar, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D45541 llvm-svn: 331601
* [GlobalISel][InstructionSelect] Refactoring out a getMatchTable virtual ↵Roman Tereshin2018-05-021-4/+9
| | | | | | | | | | | | | | | | | | | | | method + other small NFC's The main goal is to share getMatchTable between the Instruction Selector and the Testgen. The commit also contains some NFC only loosely related to refactoring out the getMatchTable, but strongly related to the initial Testgen patch (see https://reviews.llvm.org/D43962) Reviewers: dsanders, aemerson Reviewed By: dsanders Subscribers: rovka, kristof.beyls, llvm-commits, dsanders Differential Revision: https://reviews.llvm.org/D46096 llvm-svn: 331395
* [TableGen] Don't quote variable name when printing !foreach.Simon Tatham2018-05-021-0/+3
| | | | | | | | | | | | | | | | | An input !foreach expression such as !foreach(a, lst, !add(a, 1)) would be re-emitted by llvm-tblgen -print-records with the first argument in quotes, giving !foreach("a", lst, !add(a, 1)), which isn't valid TableGen input syntax. Reviewers: nhaehnle Reviewed By: nhaehnle Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D46352 llvm-svn: 331351
* TableGen: Support Intrinsic values in SearchableTableNicolai Haehnle2018-04-011-0/+85
| | | | | | | | | | | | | | | | | | | | | Summary: We will use this in the AMDGPU backend in a subsequent patch in the stack to lookup target-specific per-intrinsic information. The generic CodeGenIntrinsic machinery is used to ensure that, even though we don't calculate actual enum values here, we do get the intrinsics in the right order for the binary search index. Change-Id: If61cd5587963a4c5a1cc53df1e59c5e4dec1f9dc Reviewers: arsenm, rampitec, b-sumner Subscribers: wdng, tpr, llvm-commits Differential Revision: https://reviews.llvm.org/D44935 llvm-svn: 328937
* TableGen: Streamline how defs are instantiatedNicolai Haehnle2018-03-214-2/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Instantiating def's and defm's needs to perform the following steps: - for defm's, clone multiclass def prototypes and subsitute template args - for def's and defm's, add subclass definitions, substituting template args - clone the record based on foreach loops and substitute loop iteration variables - override record variables based on the global 'let' stack - resolve the record name (this should be simple, but unfortunately it's not due to existing .td files relying on rather silly implementation details) - for def(m)s in multiclasses, add the unresolved record as a multiclass prototype - for top-level def(m)s, resolve all internal variable references and add them to the record keeper and any active defsets This change streamlines how we go through these steps, by having both def's and defm's feed into a single addDef() method that handles foreach, final resolve, and routing the record to the right place. This happens to make foreach inside of multiclasses work, as the new test case demonstrates. Previously, foreach inside multiclasses was not forbidden by the parser, but it was de facto broken. Another side effect is that the order of "instantiated from" notes in error messages is reversed, as the modified test case shows. This is arguably clearer, since the initial error message ends up pointing directly to whatever triggered the error, and subsequent notes will point to increasingly outer layers of multiclasses. This is consistent with how C++ compilers report nested #includes and nested template instantiations. Change-Id: Ica146d0db2bc133dd7ed88054371becf24320447 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D44478 llvm-svn: 328117
* TableGen: Explicitly forbid self-references to field membersNicolai Haehnle2018-03-191-0/+9
| | | | | | | | | | | | | | | | Summary: Otherwise, patterns like in the test case produce cryptic error messages about fields being resolved incompletely. Change-Id: I713c0191f00fe140ad698675803ab1f8823dc5bd Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D44476 llvm-svn: 327850
* TableGen: Check the dynamic type of !cast<Rec>(string)Nicolai Haehnle2018-03-192-1/+32
| | | | | | | | | | | | | | | | | | | | | Summary: The docs already claim that this happens, but so far it hasn't. As a consequence, existing TableGen files get this wrong a lot, but luckily the fixes are all reasonably straightforward. To make this work with all the existing forms of self-references (since the true type of a record is only built up over time), the lookup of self-references in !cast is delayed until the final resolving step. Change-Id: If5923a72a252ba2fbc81a889d59775df0ef31164 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D44475 llvm-svn: 327849
* TableGen: Explicitly test some cases of self-references and !cast errorsNicolai Haehnle2018-03-193-0/+71
| | | | | | | | | | | | | | | | | | | | | | | Summary: These are cases of self-references that exist today in practice. Let's add tests for them to avoid regressions. The self-references in PPCInstrInfo.td can be expressed in a simpler way. Allowing this type of self-reference while at the same time consistently doing late-resolve even for self-references is problematic because there are references to fields that aren't in any class. Since there's no need for this type of self-reference anyway, let's just remove it. Change-Id: I914e0b3e1ae7adae33855fac409b536879bc3f62 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: nemanjai, wdng, kbarton, llvm-commits Differential Revision: https://reviews.llvm.org/D44474 llvm-svn: 327848
* TableGen: Remove the cast-from-string-to-variable-reference featureNicolai Haehnle2018-03-191-1/+1
| | | | | | | | | | | | | | | | | | | Summary: Cast-from-string for records isn't going away, but cast-from-string for variables is a pretty dodgy feature to have, especially when referencing template arguments. It's doubtful that this ever worked in a reliable way, and nobody seems to be using it, so let's get rid of it and get some related cleanups. Change-Id: I395ac8a43fef4cf98e611f2f552300d21e99b66a Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D44195 llvm-svn: 327844
* TableGen: Add !ne, !le, !lt, !ge, and !gt comparisonsNicolai Haehnle2018-03-143-4/+83
| | | | | | | | Change-Id: I8e2ece677268972d578a787467f7ef52a1f33a71 Differential revision: https://reviews.llvm.org/D44114 llvm-svn: 327496
* TableGen: Allow dag operators to be resolved lateNicolai Haehnle2018-03-141-2/+15
| | | | | | | | Change-Id: I51bb80fd5c48c8ac441ab11e43d43c1b91b4b590 Differential revision: https://reviews.llvm.org/D44113 llvm-svn: 327495
* TableGen: Type-check BinOpsNicolai Haehnle2018-03-145-0/+76
| | | | | | | | | | | Additionally, allow more than two operands to !con, !add, !and, !or in the same way as is already allowed for !listconcat and !strconcat. Change-Id: I9659411f554201b90cd8ed7c7e004d381a66fa93 Differential revision: https://reviews.llvm.org/D44112 llvm-svn: 327494
* TableGen: Allow ? in listsNicolai Haehnle2018-03-141-2/+2
| | | | | | | | | | This makes using !dag more convenient in some cases. Change-Id: I0a8c35e15ccd1ecec778fd1c8d64eee38d74517c Differential revision: https://reviews.llvm.org/D44111 llvm-svn: 327493
* TableGen: Add !dag function for constructionNicolai Haehnle2018-03-141-0/+95
| | | | | | | | | | | | | | | This allows constructing DAG nodes with programmatically determined names, and can simplify constructing DAG nodes in other cases as well. Also, add documentation and some very simple tests for the already existing !con. Change-Id: Ida61cd82e99752548d7109ce8da34d29da56a5f7 Differential revision: https://reviews.llvm.org/D44110 llvm-svn: 327492
* TableGen: Add a defset statementNicolai Haehnle2018-03-092-0/+76
| | | | | | | | | | | | | | | | | | | | | | | | Allows capturing a list of concrete instantiated defs. This can be combined with foreach to create parallel sets of def instantiations with less repetition in the source. This purpose is largely also served by multiclasses, but in some cases multiclasses can't be used. The motivating example for this change is having a large set of intrinsics, which are generated from the IntrinsicsBackend.td file included by Intrinsics.td, and a corresponding set of instruction selection patterns, which are generated via the backend's .td files. Multiclasses cannot be used to eliminate the redundancy in this case, because a multiclass cannot span both LLVM's common .td files and the backend .td files at the same time. Change-Id: I879e35042dceea542a5e6776fad23c5e0e69e76b Differential revision: https://reviews.llvm.org/D44109 llvm-svn: 327121
* TableGen: Allow arbitrary list values as ranges of foreachNicolai Haehnle2018-03-091-0/+19
| | | | | | | | | The changes to FieldInit are required to make field references (Def.field) work inside a ForeachDeclaration: previously, Def.field wasn't resolved immediately when Def was already a fully resolved DefInit. Change-Id: I9875baec2fc5aac8c2b249e45b9cf18c65ae699b llvm-svn: 327120
* TableGen: add !isa operationNicolai Haehnle2018-03-091-0/+39
| | | | | | | | Change-Id: Iddb724c3ae706d82933a2d82c91d07e0e36b30e3 Differential revision: https://reviews.llvm.org/D44105 llvm-svn: 327117
* TableGen: Add !foldl operationNicolai Haehnle2018-03-061-0/+71
| | | | | Change-Id: I63d67bf6e0b315e2d3360e47e3b62c9517f38987 llvm-svn: 326790
* TableGen: Delay instantiating inline anonymous recordsNicolai Haehnle2018-03-061-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Only instantiate anonymous records once all variable references in template arguments have been resolved. This allows patterns like the new test case, which in practice can appear in expressions like: class IntrinsicTypeProfile<list<LLVMType> ty, int shift> { list<LLVMType> types = !listconcat(ty, [llvm_any_ty, LLVMMatchType<shift>]); } class FooIntrinsic<IntrinsicTypeProfile P, ...> : Intrinsic<..., P.types, ...>; Without this change, the anonymous LLVMMatchType instantiation would never get resolved. Another consequence of this change is that anonymous inline instantiations are uniqued via the folding set of the newly introduced VarDefInit. Change-Id: I7a7041a20e297cf98c9109b28d85e64e176c932a Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43756 llvm-svn: 326788
* TableGen: Explicitly check whether a record has been resolvedNicolai Haehnle2018-03-062-12/+2
| | | | | | | | | | | | | | | | | | Summary: There are various places where resolving and constant folds can get stuck, especially around casts. We don't always signal an error for those, because in many cases they can legitimately occur without being an error in the "untaken branch" of an !if. Change-Id: I3befc0e4234c8e6cc61190504702918c9f29ce5c Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43754 llvm-svn: 326786
* TableGen: Allow !cast of records, cleanup conversion machineryNicolai Haehnle2018-03-064-8/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Distinguish two relationships between types: is-a and convertible-to. For example, a bit is not an int or vice versa, but they can be converted into each other (with range checks that you can think of as "dynamic": unlike other type checks, those range checks do not happen during parsing, but only once the final values have been established). Actually converting initializers between types is subtle: even when values of type A can be converted to type B (e.g. int into string), it may not be possible to do so with a concrete initializer (e.g., a VarInit that refers to a variable of type int cannot be immediately converted to a string). For this reason, distinguish between getCastTo and convertInitializerTo: the latter implements the actual conversion when appropriate, while the former will first try to do the actual conversion and fall back to introducing a !cast operation so that the conversion will be delayed until variable references have been resolved. To make the approach of adding !cast operations to work, !cast needs to fallback to convertInitializerTo when the special string <-> record logic does not apply. This enables casting records to a subclass, although that new functionality is only truly useful together with !isa, which will be added in a later change. The test is removed because it uses !srl on a bit sequence, which cannot really be supported consistently, but luckily isn't used anywhere either. Change-Id: I98168bf52649176654ed2ec61a29bdb29970cfe7 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43753 llvm-svn: 326785
* TableGen: Simplify BitsInit::resolveReferencesNicolai Haehnle2018-03-061-1/+30
| | | | | | | | | | | | | | | | | | | | Summary: No functional change intended. The removed code has a loop for recursive resolving, which is superseded by the recursive resolving done by the Resolver implementations. Add a test case which was broken by an earlier version of this change. Change-Id: Ib208d037b77a8bbb725977f1388601fc984723d8 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43655 llvm-svn: 326784
* TableGen: Generalize record types to fix typeIsConvertibleTo et al.Nicolai Haehnle2018-03-062-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Allow RecordRecTy to represent the type "subclass of N superclasses", where N may be zero. Furthermore, generate RecordRecTy instances only with actual classes in the list. Keeping track of multiple superclasses is required to resolve the type of a list correctly in some cases. The old code relied on the incorrect behavior of typeIsConvertibleTo, and an earlier version of this change relied on a modified ordering of superclasses (it was committed in r325884 and then reverted because unfortunately some of clang-tblgen's backends depend on the ordering). Previously, the DefInit for each Record would have a RecordRecTy of that Record as its type. Now, all defs with the same superclasses will share the same type. This allows us to be more consistent about type checks involving records: - typeIsConvertibleTo actually requires the LHS to be a subtype of the RHS - resolveTypes will return the least supertype of given record types in all cases - different record types in the two branches of an !if are handled correctly Add a test that used to be accepted without flagging the obvious type error. Change-Id: Ib366db1a4e6a079f1a0851e469b402cddae76714 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43680 llvm-svn: 326783
* TableGen: Resolve all template args simultaneously in AddSubClassNicolai Haehnle2018-03-051-0/+16
| | | | | | | | | | | | | | | | | | | | | | Summary: Use the new resolver interface more explicitly, and avoid traversing all the initializers multiple times. Add a test case for a pattern that was broken by an earlier version of this change. An additional change is that we now remove *all* template arguments after resolving them. Change-Id: I86c828c8cc84c18b052dfe0f64c0d5cbf3c4e13c Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43652 llvm-svn: 326706
* TableGen: Reimplement !foreach using the resolving mechanismNicolai Haehnle2018-03-055-59/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This changes the syntax of !foreach so that the first "parameter" is a new syntactic variable: !foreach(x, lst, expr) will define the variable x within the scope of expr, and evaluation of the !foreach will substitute elements of the given list (or dag) for x in expr. Aside from leading to a nicer syntax, this allows more complex expressions where x is deeply nested, or even constant expressions in which x does not occur at all. !foreach is currently not actually used anywhere in trunk, but I plan to use it in the AMDGPU backend. If out-of-tree targets are using it, they can adjust to the new syntax very easily. Change-Id: Ib966694d8ab6542279d6bc358b6f4d767945a805 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits, tpr Differential Revision: https://reviews.llvm.org/D43651 llvm-svn: 326705
* TableGen: Allow NAME in template arguments in defm in multiclassNicolai Haehnle2018-03-052-0/+82
| | | | | | | | | | | | | | | | | | | | Summary: NAME has already worked for def in a multiclass, since the (protoype) record including its NAME variable is created before parsing the superclasses. Since defm's do not have an associated single record, support for NAME has to be implemented differently here. Original test cases provided by Artem Belevich (tra) Change-Id: I933b74f328c0ff202e7dc23a35b78f3505760cc9 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43656 llvm-svn: 326700
* Revert "TableGen: Fix typeIsConvertibleTo for record types"Nicolai Haehnle2018-02-232-36/+1
| | | | | | | | | | This reverts r325884. Clang's TableGen has dependencies on the exact ordering of superclasses. Revert this change fully for now to fix the build. Change-Id: Ib297f5571cc7809f00838702ad7ab53d47335b26 llvm-svn: 325891
* TableGen: Fix typeIsConvertibleTo for record typesNicolai Haehnle2018-02-232-1/+36
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: Only check whether the left-hand side type is a subclass (or equal to) the right-hand side type. This requires a further fix in handling !if expressions and in type resolution. Furthermore, reverse the order of superclasses so that resolveTypes will find a least common ancestor at least in simple cases. Add a test that used to be accepted without flagging the obvious type error. Change-Id: Ib366db1a4e6a079f1a0851e469b402cddae76714 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43559 llvm-svn: 325884
* TableGen: Add !size operationNicolai Haehnle2018-02-231-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Returns the size of a list. I have found this to be rather useful in some development for the AMDGPU backend where we could simplify our .td files by concatenating list<LLVMType> for complex intrinsics. Doing so requires us to compute the position argument for LLVMMatchType. Basically, the usage is in a pattern that looks somewhat like this: list<LLVMType> argtypes = !listconcat(base, [llvm_any_ty, LLVMMatchType<!size(base)>]); Change-Id: I360a0b000fd488d18bea412228230fd93722bd2c Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits, tpr Differential Revision: https://reviews.llvm.org/D43553 llvm-svn: 325883
* TableGen: Allow implicit casting between string and codeNicolai Haehnle2018-02-221-0/+23
| | | | | | | | | | | | | | | | | | | | | Summary: Perhaps the distinction between the two should be removed entirely in the long term, and the [{ ... }] syntax should just be a convenient way of writing multi-line strings. In the meantime, a lot of existing .td files are quite relaxed about string vs. code, and this change allows switching on more consistent type checks without breaking those. Change-Id: If85e3e04469e41b58e2703b62ac0032d2711713c Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43557 llvm-svn: 325799
* TableGen: Fix type deduction for !foreachNicolai Haehnle2018-02-221-0/+12
| | | | | | | | | | | | | | | | | Summary: In the case of !foreach(id, input-list, transform) where the type of input-list is list<A> and the type of transform is B, we now correctly deduce list<B> as the type of the !foreach. Change-Id: Ia19dd65eecc5991dd648280ba6a15f6a20fd61de Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43555 llvm-svn: 325797
* TableGen: Generalize type deduction for !listconcatNicolai Haehnle2018-02-221-0/+14
| | | | | | | | | | | | | | | Summary: This way, it should work even with complex operands. Change-Id: Iaccf5bbb50bd5882a0ba5d59689e4381315fb361 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43554 llvm-svn: 325796
* [GISel]: Make GlobalISelEmitter rule prioritization compatible with selectionDAGAditya Nandakumar2018-02-161-315/+342
| | | | | | | | | | | | This patch changes GlobalISelEmitter to rank patterns similar to how the DAG does it (ie it computes a score for a pattern and adds the added complexity to it). This is so that the decision tree for GISelSelector remains compatible with that of SelectionDAG. https://reviews.llvm.org/D43270 llvm-svn: 325401
* [tablegen] Fixed few !foreach evaluation issues.Artem Belevich2018-02-091-0/+72
| | | | | | | | | | | | | | * !foreach on lists didn't evaluate operands of the RHS operator. This made nested operators silently fail. * A typo in the code could result in a wrong value substituted for an operation which produced a false '!foreach requires an operator' error. * Keep recursion over the DAG within ForeachHelper. This simplifies things a bit as we no longer need to pass the Type around in order to prevent recursion. Differential Revision: https://reviews.llvm.org/D43083 llvm-svn: 324758
* [TableGen] Make sure !if is evaluated throughout class inheritance.Artem Belevich2018-01-301-0/+17
| | | | | | | | | | | | | | | | Without the patch !if() is only evaluated if it's used directly. If it's passed through more than one level of class inheritance, we end up with a reference to an anonymous record with unresolved references to the original arguments !if may have used. The root cause of the problem is that TernOpInit::isComplete() was always returning false and that prevented use of the folded value of !if() as an initializer for the record at the next level of inheritance. Differential Revision: https://reviews.llvm.org/D42695 llvm-svn: 323807
* [ARM][GISel] PR35965 Constrain RegClasses of nested instructions built from ↵Daniel Sanders2018-01-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Dst Pattern Summary: Apparently, we missed on constraining register classes of VReg-operands of all the instructions built from a destination pattern but the root (top-level) one. The issue exposed itself while selecting G_FPTOSI for armv7: the corresponding pattern generates VTOSIZS wrapped into COPY_TO_REGCLASS, so top-level COPY_TO_REGCLASS gets properly constrained, while nested VTOSIZS (or rather its destination virtual register to be exact) does not. Fixing this by issuing GIR_ConstrainSelectedInstOperands for every nested GIR_BuildMI. https://bugs.llvm.org/show_bug.cgi?id=35965 rdar://problem/36886530 Patch by Roman Tereshin Reviewers: dsanders, qcolombet, rovka, bogner, aditya_nandakumar, volkan Reviewed By: dsanders, qcolombet, rovka Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D42565 llvm-svn: 323692
* [GlobalISel][TableGen] Add support for SDNodeXFormVolkan Keles2018-01-161-16/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch adds CustomRenderer which renders the matched operands to the specified instruction. Targets can enable the matching of SDNodeXForm by adding a definition that inherits from GICustomOperandRenderer and GISDNodeXFormEquiv as follows. def gi_imm8 : GICustomOperandRenderer<"renderImm8”>, GISDNodeXFormEquiv<imm8_xform>; Custom renderer functions should be of the form: void render(MachineInstrBuilder &MIB, const MachineInstr &I); Reviewers: dsanders, ab, rovka Reviewed By: dsanders Subscribers: kristof.beyls, javed.absar, llvm-commits, mgrang, qcolombet Differential Revision: https://reviews.llvm.org/D42012 llvm-svn: 322582
* [mips] Improve diagnostics for instruction mappingAleksandar Beserminji2018-01-081-0/+40
| | | | | | | | | This patch improves diagnostic for case when mapped instruction does not contain a field listed under RowFields. Differential Revision: https://reviews.llvm.org/D41778 llvm-svn: 322004
* TableGen: Allow setting SDNodeProperties on intrinsicsMatt Arsenault2017-12-203-0/+6
| | | | | | | | | | | | | | | | | Allows preserving MachineMemOperands on intrinsics through selection. For reasons I don't understand, this is a static property of the pattern and the selector deliberately goes out of its way to drop if not present. Intrinsics already inherit from SDPatternOperator allowing them to be used directly in instruction patterns. SDPatternOperator has a list of SDNodeProperty, but you currently can't set them on the intrinsic. Without SDNPMemOperand, when the node is selected any memory operands are always dropped. Allowing setting this on the intrinsics avoids needing to introduce another equivalent target node just to have SDNPMemOperand set. llvm-svn: 321212
* [globalisel][tablegen] Allow ImmLeaf predicates to use InstructionSelector ↵Daniel Sanders2017-12-201-16/+37
| | | | | | | | | members NFC for currently supported targets. This resolves a problem encountered by targets such as RISCV that reference `Subtarget` in ImmLeaf predicates. llvm-svn: 321176
* [TableGen][GlobalISel] Optimize MatchTable for faster instruction selectionQuentin Colombet2017-12-181-76/+176
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | *** Context *** Prior to this patchw, the table generated for matching instruction was straight forward but highly inefficient. Basically, each pattern generates its own set of self contained checks and actions. E.g., TableGen generated: // First pattern CheckNumOperand 3 CheckOpcode G_ADD ... Build ADDrr // Second pattern CheckNumOperand 3 CheckOpcode G_ADD ... Build ADDri // Third pattern CheckNumOperand 3 CheckOpcode G_SUB ... Build SUBrr *** Problem *** Because of that generation, a *lot* of check were redundant between each pattern and were checked every single time until we reach the pattern that matches. E.g., Taking the previous table, let say we are matching a G_SUB, that means we were going to check all the rules for G_ADD before looking at the G_SUB rule. In particular we are going to do: check 3 operands; PASS check G_ADD; FAIL ; Next rule check 3 operands; PASS (but we already knew that!) check G_ADD; FAIL (well it is still not true) ; Next rule check 3 operands; PASS (really!!) check G_SUB; PASS (at last :P) *** Proposed Solution *** This patch introduces a concept of group of rules (GroupMatcher) that share some predicates and only get checked once for the whole group. This patch only creates groups with one nesting level. Conceptually there is nothing preventing us for having deeper nest level. However, the current implementation is not smart enough to share the recording (aka capturing) of values. That limits its ability to do more sharing. For the given example the current patch will generate: // First group CheckOpcode G_ADD // First pattern CheckNumOperand 3 ... Build ADDrr // Second pattern CheckNumOperand 3 ... Build ADDri // Second group CheckOpcode G_SUB // Third pattern CheckNumOperand 3 ... Build SUBrr But if we allowed several nesting level, it could create a sub group for the checknumoperand 3. (We would need to call optimizeRules on the rules within a group.) *** Result *** With only one level of nesting, the instruction selection pass is up to 4x faster. For instance, one instruction now takes 500 checks, instead of 24k! With more nesting we could get in the tens I believe. Differential Revision: https://reviews.llvm.org/D39034 rdar://problem/34670699 llvm-svn: 321017
* Add MVT::v128i1, NFCKrzysztof Parzyszek2017-12-141-1/+1
| | | | | | | Hexagon HVX has type v128i8, comparing two vectors of that type will produce v128i1 types in SelectionDAG. llvm-svn: 320732
* [TableGen] Give the option of tolerating duplicate register namesAlex Bradbury2017-12-071-0/+86
| | | | | | | | | | | | | | | | | | A number of architectures re-use the same register names (e.g. for both 32-bit FPRs and 64-bit FPRs). They are currently unable to use the tablegen'erated MatchRegisterName and MatchRegisterAltName, as tablegen (when built with asserts enabled) will fail. When the AllowDuplicateRegisterNames in AsmParser is set, duplicated register names will be tolerated. A backend can then coerce registers to the desired register class by (for instance) implementing validateTargetOperandClass. At least the in-tree Sparc backend could benefit from this, as does RISC-V (single and double precision floating point registers). Differential Revision: https://reviews.llvm.org/D39845 llvm-svn: 320018
* Revert r319691: [globalisel][tablegen] Split atomic load/store into separate ↵Daniel Sanders2017-12-051-0/+2
| | | | | | | | opcode and enable for AArch64. Some concerns were raised with the direction. Revert while we discuss it and look into an alternative llvm-svn: 319739
* [globalisel][tablegen] Split atomic load/store into separate opcode and ↵Daniel Sanders2017-12-041-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable for AArch64. This patch splits atomics out of the generic G_LOAD/G_STORE and into their own G_ATOMIC_LOAD/G_ATOMIC_STORE. This is a pragmatic decision rather than a necessary one. Atomic load/store has little in implementation in common with non-atomic load/store. They tend to be handled very differently throughout the backend. It also has the nice side-effect of slightly improving the common-case performance at ISel since there's no longer a need for an atomicity check in the matcher table. All targets have been updated to remove the atomic load/store check from the G_LOAD/G_STORE path. AArch64 has also been updated to mark G_ATOMIC_LOAD/G_ATOMIC_STORE legal. There is one issue with this patch though which also affects the extending loads and truncating stores. The rules only match when an appropriate G_ANYEXT is present in the MIR. For example, (G_ATOMIC_STORE (G_TRUNC:s16 (G_ANYEXT:s32 (G_ATOMIC_LOAD:s16 X)))) will match but: (G_ATOMIC_STORE (G_ATOMIC_LOAD:s16 X)) will not. This shouldn't be a problem at the moment, but as we get better at eliminating extends/truncates we'll likely start failing to match in some cases. The current plan is to fix this in a patch that changes the representation of extending-load/truncating-store to allow the MMO to describe a different type to the operation. llvm-svn: 319691
* [globalisel][tablegen] Add support for importing G_ATOMIC_CMPXCHG, ↵Daniel Sanders2017-11-281-2/+2
| | | | | | | | | | G_ATOMICRMW_* rules from SelectionDAG. GIM_CheckNonAtomic has been replaced by GIM_CheckAtomicOrdering to allow it to support a wider range of orderings. This has then been used to import patterns using nodes such as atomic_cmp_swap, atomic_swap, and atomic_load_*. llvm-svn: 319232
* [globalisel][tablegen] Generate rule coverage and use it to identify ↵Daniel Sanders2017-11-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | untested rules Summary: This patch adds a LLVM_ENABLE_GISEL_COV which, like LLVM_ENABLE_DAGISEL_COV, causes TableGen to instrument the generated table to collect rule coverage information. However, LLVM_ENABLE_GISEL_COV goes a bit further than LLVM_ENABLE_DAGISEL_COV. The information is written to files (${CMAKE_BINARY_DIR}/gisel-coverage-* by default). These files can then be concatenated into ${LLVM_GISEL_COV_PREFIX}-all after which TableGen will read this information and use it to emit warnings about untested rules. This technique could also be used by SelectionDAG and can be further extended to detect hot rules and give them priority over colder rules. Usage: * Enable LLVM_ENABLE_GISEL_COV in CMake * Build the compiler and run some tests * cat gisel-coverage-[0-9]* > gisel-coverage-all * Delete lib/Target/*/*GenGlobalISel.inc* * Build the compiler Known issues: * ${LLVM_GISEL_COV_PREFIX}-all must be generated as a manual step due to a lack of a portable 'cat' command. It should be the concatenation of all ${LLVM_GISEL_COV_PREFIX}-[0-9]* files. * There's no mechanism to discard coverage information when the ruleset changes Depends on D39742 Reviewers: ab, qcolombet, t.p.northover, aditya_nandakumar, rovka Reviewed By: rovka Subscribers: vsk, arsenm, nhaehnle, mgorny, kristof.beyls, javed.absar, igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D39747 llvm-svn: 318356
* [globalisel][tablegen] Import signextload and zeroextload.Daniel Sanders2017-11-111-2/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | Allow a pattern rewriter to be installed in CodeGenDAGPatterns and use it to correct situations where SelectionDAG and GlobalISel disagree on representation. For example, it would rewrite: (sextload:i32 $ptr)<<unindexedload>><<sextload>><<sextloadi16> to: (sext:i32 (load:i16 $ptr)<<unindexedload>>) I'd have preferred to replace the fragments and have the expansion happen naturally as part of PatFrag expansion but the type inferencing system can't cope with loads of types narrower than those mentioned in register classes. This is because the SDTCisInt's on the sext constrain both the result and operand to the 'legal' integer types (where legal is defined as 'a register class can contain the type') which immediately rules the narrower types out. Several targets (those with only one legal integer type) would then go on to crash on the SDTCisOpSmallerThanOp<> when it removes all the possible types for the result of the extend. Also, improve isObviouslySafeToFold() slightly to automatically return true for neighbouring instructions. There can't be any re-ordering problems if re-ordering isn't happenning. We'll need to improve it further to handle sign/zero-extending loads when the extend and load aren't immediate neighbours though. llvm-svn: 317971
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