summaryrefslogtreecommitdiffstats
path: root/llvm/test/TableGen/MultiClassDefName.td
Commit message (Collapse)AuthorAgeFilesLines
* Allow multiclass def names to contain "#NAME"" where TableGen replacesDavid Greene2009-05-051-0/+12
#NAME# with the name of the defm instantiating the multiclass. This is useful for AVX instruction naming where a "V" prefix is standard throughout the ISA. For example: multiclass SSE_AVX_Inst<...> { def SS : Instr<...>; def SD : Instr<...>; def PS : Instr<...>; def PD : Instr<...>; def V#NAME#SS : Instr<...>; def V#NAME#SD : Instr<...>; def V#NAME#PS : Instr<...>; def V#NAME#PD : Instr<...>; } defm ADD : SSE_AVX_Inst<...>; Results in ADDSS ADDSD ADDPS ADDPD VADDSS VADDSD VADDPS VADDPD llvm-svn: 70979
OpenPOWER on IntegriCloud