summaryrefslogtreecommitdiffstats
path: root/llvm/test/MC
Commit message (Collapse)AuthorAgeFilesLines
...
* [WebAssembly] Exception handling: Switch to the new proposalHeejin Ahn2019-01-302-6/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This switches the EH implementation to the new proposal: https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md (The previous proposal was https://github.com/WebAssembly/exception-handling/blob/master/proposals/old/Exceptions.md) - Instruction changes - Now we have one single `catch` instruction that returns a except_ref value - `throw` now can take variable number of operations - `rethrow` does not have 'depth' argument anymore - `br_on_exn` queries an except_ref to see if it matches the tag and branches to the given label if true. - `extract_exception` is a pseudo instruction that simulates popping values from wasm stack. This is to make `br_on_exn`, a very special instruction, work: `br_on_exn` puts values onto the stack only if it is taken, and the # of values can vay depending on the tag. - Now there's only one `catch` per `try`, this patch removes all special handling for terminate pad with a call to `__clang_call_terminate`. Before it was the only case there are two catch clauses (a normal `catch` and `catch_all` per `try`). - Make `rethrow` act as a terminator like `throw`. This splits BB after `rethrow` in WasmEHPrepare, and deletes an unnecessary `unreachable` after `rethrow` in LateEHPrepare. - Now we stop at all catchpads (because we add wasm `catch` instruction that catches all exceptions), this creates new `findWasmUnwindDestinations` function in SelectionDAGBuilder. - Now we use `br_on_exn` instrution to figure out if an except_ref matches the current tag or not, LateEHPrepare generates this sequence for catch pads: ``` catch block i32 br_on_exn $__cpp_exception end_block extract_exception ``` - Branch analysis for `br_on_exn` in WebAssemblyInstrInfo - Other various misc. changes to switch to the new proposal. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D57134 llvm-svn: 352598
* [DWARF] Emit reasonable debug info for empty .s files.Paul Robinson2019-01-291-0/+6
| | | | llvm-svn: 352541
* [MC] Do not consider .ifdef/.ifndef as a useScott Linder2019-01-282-0/+28
| | | | | | | | This is allowed by GAS and seems correct. Differential Revision: https://reviews.llvm.org/D55439 llvm-svn: 352414
* [llvm-objdump] - Print LMAs when dumping section headers.George Rimar2019-01-281-1/+1
| | | | | | | | | | | | When --section-headers is used, GNU objdump prints both LMA and VMA for sections. llvm-objdump does not do that what makes it's output be slightly inconsistent. Patch teaches llvm-objdump to print LMA/VMA for ELF file formats. The behavior for other formats remains unchanged. Differential revision: https://reviews.llvm.org/D57146 llvm-svn: 352366
* [MC] Teach the MachO object writer about N_FUNC_COLDVedant Kumar2019-01-251-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | N_FUNC_COLD is a new MachO symbol attribute. It's a hint to the linker to order a symbol towards the end of its section, to improve locality. Example: ``` void a1() {} __attribute__((cold)) void a2() {} void a3() {} int main() { a1(); a2(); a3(); return 0; } ``` A linker that supports N_FUNC_COLD will order _a2 to the end of the text section. From `nm -njU` output, we see: ``` _a1 _a3 _main _a2 ``` Differential Revision: https://reviews.llvm.org/D57190 llvm-svn: 352227
* simplify COFF module assembly test and move it to ObjectBob Haarman2019-01-251-21/+0
| | | | | | | | | | Reviewers: pcc, rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D57192 llvm-svn: 352142
* allow COFF .def directive in module assembly when using ThinLTOBob Haarman2019-01-241-0/+21
| | | | | | | | | | | | | | | | | | | | Summary: Using COFF's .def directive in module assembly used to crash ThinLTO with "this directive only supported on COFF targets" when getting symbol information in ModuleSymbolTable. This change allows ModuleSymbolTable to process such code and adds a test to verify that the .def directive has the desired effect on the native object file, with and without ThinLTO. Fixes https://bugs.llvm.org/show_bug.cgi?id=36789 Reviewers: rnk, pcc, vlad.tsyrklevich Subscribers: mehdi_amini, eraman, hiraditya, dexonsmith, llvm-commits Differential Revision: https://reviews.llvm.org/D57073 llvm-svn: 352112
* [X86][AVX512F_SCALAR]: Adding full coverage of MC encoding for the ↵Craig Topper2019-01-222-0/+22392
| | | | | | | | | | | AVX512F_SCALAR isa sets. NFC Adding MC regressions tests to cover the AVX512F_SCALAR isa sets. This patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952 Differential Revision: https://reviews.llvm.org/D41174 llvm-svn: 351874
* [RISCV] Add R_RISCV_RELAX relocation to all possible relax candidates.Kito Cheng2019-01-213-9/+58
| | | | | | | | | | | | Summary: Add R_RISCV_RELAX relocation to all possible relax candidates and update corresponding testcase. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D46677 llvm-svn: 351723
* [AMDGPU][MC][GFX8+][DISASSEMBLER] Corrected 1/2pi value for 64-bit operandsDmitry Preobrazhensky2019-01-182-4/+11
| | | | | | | | | | See bug 39332: https://bugs.llvm.org/show_bug.cgi?id=39332 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D56794 llvm-svn: 351555
* [AMDGPU][MC] Disabled use of 2 different literals with SOP2/SOPC instructionsDmitry Preobrazhensky2019-01-184-0/+30
| | | | | | | | | | See bug 39319: https://bugs.llvm.org/show_bug.cgi?id=39319 Reviewers: artem.tamazov, arsenm, rampitec Differential Revision: https://reviews.llvm.org/D56847 llvm-svn: 351549
* [AVR] Fix the inst-cbr testDylan McKay2019-01-181-4/+4
| | | | | | | | | Now that the CBR alias has lower priority than ANDI, the assembly printer uses ANDI instead. Original broken in r351526. llvm-svn: 351539
* [WebAssembly] Add languages from debug info to producers sectionThomas Lively2019-01-181-1/+1
| | | | | | | | | | Reviewers: aheejin, dschuff, sbc100 Subscribers: aprantl, jgravelle-google, hiraditya, sunfish Differential Revision: https://reviews.llvm.org/D56889 llvm-svn: 351507
* [WebAssembly] Fixed objdump not parsing function headers.Wouter van Oortmerssen2019-01-172-6/+40
| | | | | | | | | | | | | | | | | | | | | | | Summary: objdump was interpreting the function header containing the locals declaration as instructions. To parse these without injecting target specific code in objdump, MCDisassembler::onSymbolStart was added to be implemented by the WebAssembly implemention. WasmObjectFile now returns a code offset for the "address" of a symbol, rather than the index. This is also more in-line with what other targets do. Also ensured that the AsmParser correctly puts each function in its own segment to enable this test case. Reviewers: sbc100, dschuff Subscribers: jgravelle-google, aheejin, sunfish, rupprecht, llvm-commits Differential Revision: https://reviews.llvm.org/D56684 llvm-svn: 351460
* [WebAssembly] Parse llvm.ident into producers sectionThomas Lively2019-01-172-0/+15
| | | | llvm-svn: 351413
* Revert "[WebAssembly] Parse llvm.ident into producers section"Thomas Lively2019-01-172-15/+0
| | | | | | This reverts commit eccdbba3a02a33e13b5262e92200a33e2ead873d. llvm-svn: 351410
* [WebAssembly] Parse llvm.ident into producers sectionThomas Lively2019-01-162-0/+15
| | | | | | | | | | | | | | Summary: Everything before the word "version" is the tool, and everything after the word "version" is the version. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D56742 llvm-svn: 351399
* [WebAssembly] Store section alignment as a power of 2Sam Clegg2019-01-1610-24/+24
| | | | | | | | | | | This change bumps for version number of the wasm object file metadata. See https://github.com/WebAssembly/tool-conventions/pull/92 Differential Revision: https://reviews.llvm.org/D56758 llvm-svn: 351285
* [MSP430] Recognize '{' as a line separatorAnton Korobeynikov2019-01-151-0/+15
| | | | | | | msp430-as supports multiple assembly statements on the same line separated by a '{' character. llvm-svn: 351233
* Remove irrelevant references to legacy git repositories fromJames Y Knight2019-01-151-1/+1
| | | | | | | | | compiler identification lines in test-cases. (Doing so only because it's then easier to search for references which are actually important and need fixing.) llvm-svn: 351200
* [MC][X86] Add test case for invalid use of "(%dx)" operand.Nirav Dave2019-01-141-0/+4
| | | | llvm-svn: 351094
* Replace "no-frame-pointer-*" function attributes with "frame-pointer"Francis Visoiu Mistrih2019-01-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Part of the effort to refactoring frame pointer code generation. We used to use two function attributes "no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" to represent three kinds of frame pointer usage: (all) frames use frame pointer, (non-leaf) frames use frame pointer, (none) frame use frame pointer. This CL makes the idea explicit by using only one enum function attribute "frame-pointer" Option "-frame-pointer=" replaces "-disable-fp-elim" for tools such as llc. "no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" are still supported for easy migration to "frame-pointer". tests are mostly updated with // replace command line args ‘-disable-fp-elim=false’ with ‘-frame-pointer=none’ grep -iIrnl '\-disable-fp-elim=false' * | xargs sed -i '' -e "s/-disable-fp-elim=false/-frame-pointer=none/g" // replace command line args ‘-disable-fp-elim’ with ‘-frame-pointer=all’ grep -iIrnl '\-disable-fp-elim' * | xargs sed -i '' -e "s/-disable-fp-elim/-frame-pointer=all/g" Patch by Yuanfang Chen (tabloid.adroit)! Differential Revision: https://reviews.llvm.org/D56351 llvm-svn: 351049
* [X86] Fix incomplete handling of register-assigned variables in parsing.Nirav Dave2019-01-113-3/+442
| | | | | | | | | | | | | | Teach x86 assembly operand parsing to distinguish between assembler variable assigned to named registers and those assigned to immediate values. Reviewers: rnk, nickdesaulniers, void Subscribers: hiraditya, jyknight, llvm-commits Differential Revision: https://reviews.llvm.org/D56287 llvm-svn: 350966
* [MSP430] Minor fixes/improvements for assembler/disassemblerAnton Korobeynikov2019-01-103-1/+15
| | | | | | | | | | | | | * Teach AsmParser to recognize @rn in distination operand as 0(rn). * Do not allow Disassembler decoding instructions that have size more than a number of input bytes. * Fix UB in MSP430MCCodeEmitter. Patch by Kristina Bessonova! Differential Revision: https://reviews.llvm.org/D56547 llvm-svn: 350903
* [MSP430] Add missing instruction formsAnton Korobeynikov2019-01-103-9/+65
| | | | | | | | | | | * Add missing mm, [r|m]n, [r|m]p instruction forms. * Fix bit16mc instruction. Patch by Kristina Bessonova! Differential Revision: https://reviews.llvm.org/D56546 llvm-svn: 350902
* [WebAssembly] Add unimplemented-simd128 subtarget featureThomas Lively2019-01-103-4/+4
| | | | | | | | | | | | | | Summary: This is a third attempt, but this time we have vetted it on Windows first. The previous errors were due to an uninitialized class member. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D56560 llvm-svn: 350901
* [RISCV][MC] Add support for evaluating constant symbols as immediatesAlex Bradbury2019-01-104-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | This further improves compatibility with GNU as, allowing input such as the following to be assembled: .equ CONST, 0x123456 li a0, CONST addi a0, a0, %lo(CONST) .equ CONST, 1 slli a0, a0, CONST Note that we don't have perfect compatibility with gas, as it will avoid emitting a relocation in this case: addi a0, a0, %lo(CONST2) .equ CONST2, 0x123456 Thanks to Shiva Chen for suggesting a better way to approach this during review. Differential Revision: https://reviews.llvm.org/D52298 llvm-svn: 350831
* [llvm-objdump] - Implement -z/--disassemble-zeroes.George Rimar2019-01-103-4/+85
| | | | | | | | | | | | | | This is https://bugs.llvm.org/show_bug.cgi?id=37151, GNU objdump spec says that "Normally the disassembly output will skip blocks of zeroes.", but currently, llvm-objdump prints them. The patch implements the -z/--disassemble-zeroes option and switches the default to always skip blocks of zeroes. Differential revision: https://reviews.llvm.org/D56083 llvm-svn: 350823
* Revert "[WebAssembly] Add simd128-unimplemented subtarget feature"Thomas Lively2019-01-103-4/+4
| | | | | | This reverts rL350791. llvm-svn: 350795
* [WebAssembly] Add simd128-unimplemented subtarget featureThomas Lively2019-01-103-4/+4
| | | | | | | | | | This is a second attempt at r350778, which was reverted in r350789. The only change is that the unimplemented-simd128 feature has been renamed simd128-unimplemented, since naming it unimplemented-simd128 somehow made the simd128 feature flag enable the unimplemented-simd128 feature on Windows. llvm-svn: 350791
* Revert "[WebAssembly] Add unimplemented-simd128 subtarget feature"Thomas Lively2019-01-103-4/+4
| | | | | | This reverts L350778. llvm-svn: 350789
* [WebAssembly] Add unimplemented-simd128 subtarget featureThomas Lively2019-01-093-4/+4
| | | | | | | | | | | | | | | Summary: This replaces the old ad-hoc -wasm-enable-unimplemented-simd flag. Also makes the new unimplemented-simd128 feature imply the simd128 feature. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits, alexcrichton Differential Revision: https://reviews.llvm.org/D56501 llvm-svn: 350778
* [mips][micrompis] Emit 16bit NOPs by defaultAleksandar Beserminji2019-01-095-36/+29
| | | | | | | | | Emit 16bit NOPs by default. Use 32bit NOPs in delay slots where necessary. Differential https://reviews.llvm.org/D55323 llvm-svn: 350733
* [AArch64] Move feature predctrl to predresDiogo N. Sampaio2019-01-093-8/+8
| | | | | | | | | | | Follow up patch of rL350385, for adding predres command line option. This patch renames the feature as to keep it aligned with the option passed by/to clang Differential Revision: https://reviews.llvm.org/D56484 llvm-svn: 350702
* [X86][Darwin] Emit compact-unwind for register-sized stack adjustmentsFrancis Visoiu Mistrih2019-01-081-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For stack frames on the size of a register in x86, a code size optimization emits "push rax/eax" instead of "sub" for stack allocation. For example: foo: .cfi_startproc BB#0: pushq %rax Ltmp0: .cfi_def_cfa_offset 16 ... .cfi_endproc However, we are falling back to DWARF in this case because we cannot encode %rax as a saved register. This requirement is wrong, since we don't care about the contents of %rax, it is the equivalent of a sub. In order to specify that we care about the contents of %rax, we would need a .cfi_offset %rax, <offset>. It's also overzealous in the case where there are pushes for callee saved registers followed by a "push rax/eax" instead of "sub", in which case we should also be able to encode the callee saved regs and everything else using compact unwind. Patch authored by Bruno Cardoso Lopes. Differential Revision: https://reviews.llvm.org/D13793 llvm-svn: 350623
* [WebAssembly] Massive instruction renamingThomas Lively2019-01-087-44/+44
| | | | | | | | | | | | | | | Summary: An automated renaming of all the instructions listed at https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329 as well as some similarly-named identifiers. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D56338 llvm-svn: 350609
* [MC] [AArch64] Support resolving signed fixups for :abs_g0_s: etc.Mandeep Singh Grang2019-01-082-1/+48
| | | | | | | | | | | | | | Summary: This patch is a follow-up to D55896. Reviewers: efriedma, mstorsjo Reviewed By: efriedma Subscribers: javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D56029 llvm-svn: 350606
* [WebAssembly] Fixed disassembler not knowing about new brlist operandWouter van Oortmerssen2019-01-031-0/+4
| | | | | | | | | | | | | | Summary: The previously introduced new operand type for br_table didn't have a disassembler implementation, causing an assert. Reviewers: dschuff, aheejin Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D56227 llvm-svn: 350366
* [WebAssembly] Made InstPrinter more robustWouter van Oortmerssen2019-01-031-0/+9
| | | | | | | | | | | | | | | | | | | Summary: Instead of asserting on certain kinds of malformed instructions, it now still print, but instead adds an annotation indicating the problem, and/or indicates invalid_type etc. We're using the InstPrinter from many contexts that can't always guarantee values are within range (e.g. the disassembler), where having output is more valueable than asserting. Reviewers: dschuff, aheejin Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D56223 llvm-svn: 350365
* [RISCV][MC] Accept %lo and %pcrel_lo on operands to liAlex Bradbury2019-01-032-4/+30
| | | | | | This matches GNU assembler behaviour. llvm-svn: 350321
* Python compat - print statementSerge Guelton2019-01-031-0/+2
| | | | | | | | | Make sure all print statements are compatible with Python 2 and Python3 using the `from __future__ import print_function` statement. Differential Revision: https://reviews.llvm.org/D56249 llvm-svn: 350307
* [NFC] Fix missing testfile change of rL350299Diogo N. Sampaio2019-01-031-2/+2
| | | | | | This file was missing on the patch llvm-svn: 350302
* [ARM] Add command-line option for SBDiogo N. Sampaio2019-01-038-35/+35
| | | | | | | | | | | | | | | SB (Speculative Barrier) is only mandatory from 8.5 onwards but is optional from Armv8.0-A. This patch adds a command line option to enable SB, as it was previously only possible to enable by selecting -march=armv8.5-a. This patch also renames FeatureSpecRestrict to FeatureSB. Reviewed By: olista01, LukeCheeseman Differential Revision: https://reviews.llvm.org/D55990 llvm-svn: 350299
* [llvm-readobj] [COFF] Print the symbol index for relocationsMartin Storsjo2019-01-031-0/+4
| | | | | | | | | | There can be multiple local symbols with the same name (for e.g. comdat sections), and thus the symbol name itself isn't enough to disambiguate symbols. Differential Revision: https://reviews.llvm.org/D56140 llvm-svn: 350288
* [WebAssembly] made assembler parse block_typeWouter van Oortmerssen2019-01-022-25/+23
| | | | | | | | | | | | | | | Summary: This was previously ignored and an incorrect value generated. Also fixed Disassembler's handling of block_type. Reviewers: dschuff, aheejin Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D56092 llvm-svn: 350270
* [X86] Adding full coverage of MC encoding for the XOP and LWP ISAs.Craig Topper2019-01-024-0/+6946
| | | | | | | | | Adding MC regressions tests to cover the XOP isa set. This patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952 Differential Revision: https://reviews.llvm.org/D41392 llvm-svn: 350237
* [AArch64] Accept "sve" as arch feature in assemblerMartin Storsjo2018-12-311-0/+6
| | | | | | Differential Revision: https://reviews.llvm.org/D56128 llvm-svn: 350174
* [AArch64] Implement the .arch_extension directiveMartin Storsjo2018-12-302-0/+12
| | | | | | Differential Revision: https://reviews.llvm.org/D56131 llvm-svn: 350169
* [mips] Show an error on attempt to use 64-bit PC-relative relocationSimon Atanasyan2018-12-291-0/+2
| | | | | | | | | | | | The following code requests 64-bit PC-relative relocations unsupported by MIPS ABI. Now it triggers an assertion. It's better to show an error message. ``` foo: .quad bar - foo ``` llvm-svn: 350152
* [mips] Show a regular error message on attempt to use one byte relocationSimon Atanasyan2018-12-291-4/+4
| | | | llvm-svn: 350151
OpenPOWER on IntegriCloud