summaryrefslogtreecommitdiffstats
path: root/llvm/test/MC/X86
Commit message (Collapse)AuthorAgeFilesLines
...
* comment out line that is causing UBSAN bot failuresSanjay Patel2016-05-191-2/+4
| | | | | | | Patch is awaiting review here: http://reviews.llvm.org/D20434 llvm-svn: 270128
* [x86] add test for immediate comment formattingSanjay Patel2016-05-181-0/+26
| | | | llvm-svn: 269977
* [AVX512] VPACKUSWB/VPACKSSWB should not be encoded with EVEX.W=1. While ↵Craig Topper2016-05-012-198/+198
| | | | | | there fix the execution domain for VPACKSSDW/VPACKUSDW. llvm-svn: 268200
* [PR27284] Reverse the ownership between DICompileUnit and DISubprogram.Adrian Prantl2016-04-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently each Function points to a DISubprogram and DISubprogram has a scope field. For member functions the scope is a DICompositeType. DIScopes point to the DICompileUnit to facilitate type uniquing. Distinct DISubprograms (with isDefinition: true) are not part of the type hierarchy and cannot be uniqued. This change removes the subprograms list from DICompileUnit and instead adds a pointer to the owning compile unit to distinct DISubprograms. This would make it easy for ThinLTO to strip unneeded DISubprograms and their transitively referenced debug info. Motivation ---------- Materializing DISubprograms is currently the most expensive operation when doing a ThinLTO build of clang. We want the DISubprogram to be stored in a separate Bitcode block (or the same block as the function body) so we can avoid having to expensively deserialize all DISubprograms together with the global metadata. If a function has been inlined into another subprogram we need to store a reference the block containing the inlined subprogram. Attached to https://llvm.org/bugs/show_bug.cgi?id=27284 is a python script that updates LLVM IR testcases to the new format. http://reviews.llvm.org/D19034 <rdar://problem/25256815> llvm-svn: 266446
* [X86] Restrict max long nop length for Lakemont.Andrey Turetskiy2016-04-111-9/+11
| | | | | | | | | Restrict the max length of long nops for Lakemont to 7. Experiments on MCU benchmarks (Dhrystone, Coremark) show that this is the most optimal length. Differential Revision: http://reviews.llvm.org/D18897 llvm-svn: 265924
* Revert r265817Colin LeMahieu2016-04-087-13/+13
| | | | | | lld tests need to be addressed. llvm-svn: 265822
* [llvm-objdump] Printing hex instead of dec by defaultColin LeMahieu2016-04-087-13/+13
| | | | | | Differential Revision: http://reviews.llvm.org/D18770 llvm-svn: 265817
* testcase gardening: update the emissionKind enum to the new syntax. (NFC)Adrian Prantl2016-04-011-1/+1
| | | | llvm-svn: 265081
* [llvm-objdump] Print <unknown> in place of instruction text if it couldn't ↵Colin LeMahieu2016-03-181-0/+4
| | | | | | be disassembled. llvm-svn: 263793
* [X86] Make X86MCCodeEmitter::DetermineREXPrefix locate operands more like ↵Craig Topper2016-03-021-0/+4
| | | | | | how VEX prefix handling does. llvm-svn: 262467
* [X86] Move an encoding test from CodeGen to MC. NFC.Ahmed Bougacha2016-02-261-0/+32
| | | | llvm-svn: 262089
* [X86] Add test cases for r261977 and fix a grammatical error.Craig Topper2016-02-261-0/+4
| | | | llvm-svn: 261983
* AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . ↵Igor Breger2016-02-254-2/+1411
| | | | | | | | Change memory operand parser handling. Differential Revision: http://reviews.llvm.org/D17564 llvm-svn: 261862
* AVX512F: Add assembler Intel syntax tests for knl, fix minor bugs.Igor Breger2016-02-221-13/+37557
| | | | | | Differential Revision: http://reviews.llvm.org/D17498 llvm-svn: 261521
* AVX512: Fix scalar mem operands.Igor Breger2016-02-221-54/+54
| | | | | | Differential Revision: http://reviews.llvm.org/D17500 llvm-svn: 261520
* Revert r253557 "Alternative to long nops for X86 CPUs, by Andrey Turetsky"Hans Wennborg2016-02-191-1/+7
| | | | | | Turns out the new nop sequences aren't actually nops on x86_64 (PR26554). llvm-svn: 261365
* [X86] Change FeatureIFMA string to 'avx512ifma'. Matches gcc and fixes PR26461.Craig Topper2016-02-082-2/+2
| | | | llvm-svn: 260069
* [MC] Add support for encoding CodeView variable definition rangesDavid Majnemer2016-02-051-2/+2
| | | | | | | | | | | | | | | | | | | CodeView, like most other debug formats, represents the live range of a variable so that debuggers might print them out. They use a variety of records to represent how a particular variable might be available (in a register, in a frame pointer, etc.) along with a set of ranges where this debug information is relevant. However, the format only allows us to use ranges which are limited to a maximum of 0xF000 in size. This means that we need to split our debug information into chunks of 0xF000. Because the layout of code is not known until *very* late, we must use a new fragment to record the information we need until we can know *exactly* what the range is. llvm-svn: 259868
* [MC] Enable eip-relative addressing on x86-64 for X32 ABIDerek Schuff2016-02-021-0/+34
| | | | | | | | | | | | | | | | | Summary: Enables eip-based addressing, e.g., lea constant(%eip), %rax lea constant(%eip), %eax in MC, (used for the x32 ABI). EIP-base addressing is also valid in x86_64, it is left enabled for that architecture as well. Patch by João Porto Differential Revision: http://reviews.llvm.org/D16581 llvm-svn: 259528
* [X86][AVX512VBMI] add encoding and intrinsics for MultishiftAsaf Badouh2016-02-011-0/+181
| | | | | | Differential Revision: http://reviews.llvm.org/D16399 llvm-svn: 259363
* [X86][IFMA] adding intrinsics and encoding for multiply and add of unsigned ↵Asaf Badouh2016-01-252-0/+419
| | | | | | | | | | | 52bit integer VPMADD52LUQ - Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Qword Accumulators VPMADD52HUQ - Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to 64-bit Accumulators Differential Revision: http://reviews.llvm.org/D16407 llvm-svn: 258680
* [AVX512] [CMPPS ][ CMPPD ] Adding full Comparison Predicate names Michael Zuckerman2016-01-251-0/+208
| | | | | | | | | | | X86AsmParser.cpp is missing full comparison predicate names for CMPPD and CMPPS Instructions. X86AsmParser.cpp defines only the short names of the Comparison predicate that you can find in the following pdf: https://software.intel.com/sites/default/files/managed/07/b7/319433-023.pdf Page 5-61 table 5-3 Differential Revision: http://reviews.llvm.org/D16518 llvm-svn: 258671
* [X86] - Removing warning on legal cases caused by commit r258132Marina Yatsina2016-01-211-1/+16
| | | | | | | | | | | | | There's an overloading of the "movsd" and "cmpsd" instructions, e.g. movsd can be either "Move Data from String to String" or "Move or Merge Scalar Double-Precision Floating-Point Value". The former should produce warnings when parsing a memory operand that is not ESI/EDI, but the latter should not. Fixed the code to produce warnings only after making sure we're dealing with the first case. Expanded the tests of the produced warnings + fixed RUN line of the test so that it would check both stdout and stderr Differential Revision: http://reviews.llvm.org/D16359 llvm-svn: 258393
* [MC, COFF] Add .reloc support for WinCOFFDavid Majnemer2016-01-191-0/+40
| | | | | | | This adds rudimentary support for a few relocations that we will use for the CodeView debug format. llvm-svn: 258216
* [AVX512] Adding VPERMT2B and VPERMI2B instruction .Michael Zuckerman2016-01-191-0/+239
| | | | | | Differential Revision: http://reviews.llvm.org/D16297 llvm-svn: 258161
* [AVX512] Adding VPERMB instructionMichael Zuckerman2016-01-191-0/+123
| | | | | | Differential Revision: http://reviews.llvm.org/D16294 llvm-svn: 258144
* [X86] Add support for "xlat m8"Marina Yatsina2016-01-191-0/+4
| | | | | | | | According to x86 spec "xlat m8" is a legal instruction and it is equivalent to "xlatb". Differential Revision: http://reviews.llvm.org/D15150 llvm-svn: 258135
* [X86] Adding support for missing variations of X86 string related instructionsMarina Yatsina2016-01-192-0/+40
| | | | | | | | | | | | | | | The following are legal according to X86 spec: ins mem, DX outs DX, mem lods mem stos mem scas mem cmps mem, mem movs mem, mem Differential Revision: http://reviews.llvm.org/D14827 llvm-svn: 258132
* Add a triple to the test.Rafael Espindola2016-01-131-1/+1
| | | | | | Sorry for forgetting it the first time. llvm-svn: 257705
* Convert a few assert failures into proper errors.Rafael Espindola2016-01-131-0/+21
| | | | | | Fixes PR25944. llvm-svn: 257697
* [AVX-512] Remove another extra space from the Intel syntax asm strings.Craig Topper2016-01-111-32/+32
| | | | llvm-svn: 257304
* [AVX-512] Remove unused Round and Itinerary from the maskable_cmp ↵Craig Topper2016-01-112-82/+82
| | | | | | multiclasses. They weren't used and there were extra spaces in the asm string to prepare for the concatenations of the round string that wasn't ever used. llvm-svn: 257300
* [AVX-512] Make spacing between comma and {sae} operand consistent in asm ↵Craig Topper2016-01-113-60/+60
| | | | | | strings. llvm-svn: 257299
* Fix several accidental DOS line endings in source filesDimitry Andric2016-01-031-7/+7
| | | | | | | | | | | | | | | Summary: There are a number of files in the tree which have been accidentally checked in with DOS line endings. Convert these to native line endings. There are also a few files which have DOS line endings on purpose, and I have set the svn:eol-style property to 'CRLF' on those. Reviewers: joerg, aaron.ballman Subscribers: aaron.ballman, sanjoy, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15848 llvm-svn: 256707
* [AVX512] Bring vmovq instructions names into alignment with the AVX and SSE ↵Craig Topper2015-12-281-12/+12
| | | | | | | | names. Add a missing encoding to disassembler and assembler. I believe this also fixes a case where a 64-bit memory form that is documented as being unsupported in 32-bit mode was able to be selected there. llvm-svn: 256483
* [X86][PKU] Add {RD,WR}PKRU encodingAsaf Badouh2015-12-241-0/+8
| | | | | | Differential Revision: http://reviews.llvm.org/D15711 llvm-svn: 256366
* I Added a triple flag for x86-evenDirective test.Michael Zuckerman2015-12-131-1/+1
| | | | | | | | Continue of rL255461 Differential Revision: http://reviews.llvm.org/D15413 llvm-svn: 255469
* [X86][inline asm] support even directive Michael Zuckerman2015-12-131-0/+47
| | | | | | | | | | | The .even directive aligns content to an evan-numbered address. In at&t syntax .even In Microsoft syntax even (without the dot). Differential Revision: http://reviews.llvm.org/D15413 llvm-svn: 255462
* X86: produce more friendly errors during MachO relocation handlingTim Northover2015-12-082-0/+34
| | | | llvm-svn: 255036
* dding test for fnstswMichael Zuckerman2015-12-081-0/+2
| | | | | | | | | | continue of Wrong FNSTSW size operator url: http://reviews.llvm.org/D14953 Differential Revision: http://reviews.llvm.org/D15155 llvm-svn: 255007
* [X86] Adding support for FWORD type for MS inline asmMarina Yatsina2015-12-071-0/+3
| | | | | | | | Adding support for FWORD type for MS inline asm. Differential Revision: http://reviews.llvm.org/D15268 llvm-svn: 254904
* [X86] Add support for loopz, loopnz for Intel syntaxMarina Yatsina2015-12-061-0/+5
| | | | | | | | According to x86 spec, loopz and loopnz should be supported for Intel syntax, where loopz is equivalent to loope and loopnz is equivalent to loopne. Differential Revision: http://reviews.llvm.org/D15148 llvm-svn: 254877
* [X86][AVX512] add vmovss/sd missing encoding Asaf Badouh2015-12-062-0/+143
| | | | | | Differential Revision: http://reviews.llvm.org/D14701 llvm-svn: 254875
* [X86] MS inline asm: produce error when encountering "<type> ptr <reg name>"Marina Yatsina2015-12-031-0/+12
| | | | | | | | | | | | | Currently "<type> ptr <reg name>" treated as <reg name> in MS inline asm, ignoring the "<type> ptr" completely and possibly ignoring the intention of the user. Fixed llvm to produce an error when encountering "<type> ptr <reg name>" operands. For example: andpd xmm1,xmmword ptr xmm1 --> andpd xmm1, xmm1 though andpd has 2 possible matching formats - andpd xmm, xmm/m128 Patch by: ziv.izhar@intel.com Differential Revision: http://reviews.llvm.org/D14607 llvm-svn: 254607
* [X86] Add support for fcomip, fucomip for Intel syntaxMarina Yatsina2015-12-031-0/+5
| | | | | | | | According to x86 spec, fcomip and fucomip should be supported for Intel syntax. Differential Revision: http://reviews.llvm.org/D15104 llvm-svn: 254595
* [X86][AVX512] add comi with SaeAsaf Badouh2015-12-021-0/+127
| | | | | | | | add builtin_ia32_vcomisd and builtin_ia32_vcomisd Differential Revision: http://reviews.llvm.org/D14331 llvm-svn: 254493
* AVX512:Implemented encoding for the vmovq.s instruction.Igor Breger2015-11-291-0/+16
| | | | | | Differential Revision: http://reviews.llvm.org/D14810 llvm-svn: 254248
* Alternative to long nops for X86 CPUs, by Andrey TuretskyAlexey Bataev2015-11-191-7/+1
| | | | | | | Make X86AsmBackend generate smarter nops instead of a bunch of 0x90 for code alignment for CPUs which don't support long nop instructions. Differential Revision: http://reviews.llvm.org/D14178 llvm-svn: 253557
* AVX512: Implemented encoding, intrinsics and DAG lowering for VMOVDDUP ↵Igor Breger2015-11-192-0/+108
| | | | | | | | instructions. Differential Revision: http://reviews.llvm.org/D14702 llvm-svn: 253548
* AVX512: Implemented encoding for the vmovss.s and vmovsd.s instructions.Igor Breger2015-11-191-0/+96
| | | | | | Differential Revision: http://reviews.llvm.org/D14771 llvm-svn: 253547
OpenPOWER on IntegriCloud