Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | Port more encoding tests over to Thumb2 decoding tests. | Owen Anderson | 2011-09-06 | 1 | -0/+222 | |
| | | | | llvm-svn: 139171 | |||||
* | Fix issues with disassembly of IT instructions involving condition codes ↵ | Owen Anderson | 2011-08-30 | 1 | -0/+12 | |
| | | | | | | other the EQ/NE. Discovered by roundtrip testing. llvm-svn: 138840 | |||||
* | Port Thumb2 assembler tests over to disassembler tests. | Owen Anderson | 2011-08-30 | 1 | -0/+41 | |
| | | | | llvm-svn: 138822 | |||||
* | Improve encoding support for BLX with immediat eoperands, and fix a BLX ↵ | Owen Anderson | 2011-08-26 | 1 | -0/+9 | |
| | | | | | | decoding bug this uncovered. llvm-svn: 138675 | |||||
* | invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We ↵ | Owen Anderson | 2011-08-26 | 1 | -1/+1 | |
| | | | | | | were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure. llvm-svn: 138653 | |||||
* | Support an extension of ARM asm syntax to allow immediate operands to ADR ↵ | Owen Anderson | 2011-08-26 | 2 | -0/+14 | |
| | | | | | | instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here. llvm-svn: 138635 | |||||
* | Add a testcase for r138625. | Owen Anderson | 2011-08-26 | 1 | -0/+3 | |
| | | | | llvm-svn: 138626 | |||||
* | Port over additional encoding tests to decoding tests, and fix an operand ↵ | Owen Anderson | 2011-08-25 | 1 | -0/+31 | |
| | | | | | | ordering bug this exposed. llvm-svn: 138575 | |||||
* | Port over more encoding tests to decoding tests. | Owen Anderson | 2011-08-24 | 1 | -0/+148 | |
| | | | | llvm-svn: 138441 | |||||
* | Fix decoding of Thumb2 prefetch instructions, which account for all the ↵ | Owen Anderson | 2011-08-23 | 1 | -0/+3 | |
| | | | | | | remaining Thumb2 decoding failures found by randomized testing so far. llvm-svn: 138341 | |||||
* | Fix two more instances of mis-matched operand names breaking disassembly. ↵ | Owen Anderson | 2011-08-23 | 1 | -0/+6 | |
| | | | | | | Found by randomized testing. llvm-svn: 138337 | |||||
* | Port more assemble tests over to disassembly tests. | Owen Anderson | 2011-08-23 | 1 | -0/+59 | |
| | | | | llvm-svn: 138336 | |||||
* | t2SMLAD is a four-register instruction, not a three-register one. | Owen Anderson | 2011-08-22 | 1 | -0/+3 | |
| | | | | llvm-svn: 138301 | |||||
* | Correct operand naming of t2USAT16 to allow proper decoding. | Owen Anderson | 2011-08-22 | 1 | -0/+3 | |
| | | | | llvm-svn: 138300 | |||||
* | Match operand naming to allow correct decoding of t2LDRSH_POST. | Owen Anderson | 2011-08-22 | 1 | -0/+3 | |
| | | | | llvm-svn: 138298 | |||||
* | Provide a correct decoder hook for Thumb2 shifted registers. Found by ↵ | Owen Anderson | 2011-08-22 | 1 | -0/+3 | |
| | | | | | | randomized testing. llvm-svn: 138292 | |||||
* | Provide operand encoding information for half-precision VCVT instructions. ↵ | Owen Anderson | 2011-08-22 | 1 | -0/+3 | |
| | | | | | | Found by randomized testing. llvm-svn: 138273 | |||||
* | Fix decoding of VMOVSRR and VMOVRRS, which account for the overwhelming ↵ | Owen Anderson | 2011-08-22 | 1 | -0/+2 | |
| | | | | | | majority of decoder crashes detected by randomized testing. llvm-svn: 138269 | |||||
* | Fix another batch of VLD/VST decoding crashes discovered by randomized testing. | Owen Anderson | 2011-08-22 | 1 | -0/+2 | |
| | | | | llvm-svn: 138255 | |||||
* | Correct writeback handling of duplicating VLD instructions. Discovered by ↵ | Owen Anderson | 2011-08-22 | 1 | -0/+4 | |
| | | | | | | randomized testing. llvm-svn: 138251 | |||||
* | Port another swathe of Thumb1 encoding tests over to decoding tests. | Owen Anderson | 2011-08-22 | 1 | -0/+153 | |
| | | | | llvm-svn: 138250 | |||||
* | Fix an incorrect shift when decoding SP-relative stores in Thumb1-mode. Add ↵ | Owen Anderson | 2011-08-22 | 1 | -0/+30 | |
| | | | | | | more tests. llvm-svn: 138246 | |||||
* | STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST ↵ | Owen Anderson | 2011-08-18 | 1 | -0/+3 | |
| | | | | | | | | for the purposes of decoding all operands except the predicate. Found by randomized testing. llvm-svn: 138003 | |||||
* | Fix the decoding of RFE instruction. RFEs have the load bit set, while SRSs ↵ | Owen Anderson | 2011-08-18 | 1 | -0/+3 | |
| | | | | | | have it unset. llvm-svn: 138000 | |||||
* | Improve handling of failure and unpredictable cases for CPS, STR, and SMLA ↵ | Owen Anderson | 2011-08-18 | 1 | -1/+1 | |
| | | | | | | | | instructions. Fixes a large class of disassembler crashes found by randomized testing. llvm-svn: 137995 | |||||
* | Thumb assembly parsing and encoding for LDM instruction. | Jim Grosbach | 2011-08-18 | 1 | -5/+5 | |
| | | | | | | | | Fix base register type and canonicallize to the "ldm" spelling rather than "ldmia." Add diagnostics for incorrect writeback token and out-of-range registers. llvm-svn: 137986 | |||||
* | More Thumb1 decoding tests. | Owen Anderson | 2011-08-18 | 1 | -0/+25 | |
| | | | | llvm-svn: 137974 | |||||
* | Test commit; adding test for invalid LDRD which was part of the patch for ↵ | James Molloy | 2011-08-18 | 1 | -0/+10 | |
| | | | | | | r137647 but seemingly didn't get svn add'ed. llvm-svn: 137960 | |||||
* | Port over BL/BLX to disassembly tests. | Owen Anderson | 2011-08-18 | 1 | -3/+14 | |
| | | | | llvm-svn: 137954 | |||||
* | Port new Thumb1 encoding tests over to decoding tests. | Owen Anderson | 2011-08-17 | 1 | -0/+37 | |
| | | | | llvm-svn: 137902 | |||||
* | Start building a Thumb1 decoding test file based on the Thumb1 ↵ | Owen Anderson | 2011-08-17 | 1 | -0/+30 | |
| | | | | | | parsing/encoding test file. llvm-svn: 137840 | |||||
* | Allow the MCDisassembler to return a "soft fail" status code, indicating an ↵ | Owen Anderson | 2011-08-17 | 1 | -1/+1 | |
| | | | | | | | | instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment. Patch by James Molloy. llvm-svn: 137830 | |||||
* | Add a test file for Thumb2 NEON. | Owen Anderson | 2011-08-15 | 1 | -0/+1586 | |
| | | | | llvm-svn: 137687 | |||||
* | Add some more comprehensive VFP decoding tests. | Owen Anderson | 2011-08-15 | 1 | -0/+213 | |
| | | | | llvm-svn: 137657 | |||||
* | Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM ↵ | Owen Anderson | 2011-08-15 | 1 | -33/+32 | |
| | | | | | | | | mode. Update tests to reflect this fact. Patch by James Molloy. llvm-svn: 137647 | |||||
* | Add a test for Thumb1 LDRSH decoding. | Owen Anderson | 2011-08-15 | 1 | -0/+3 | |
| | | | | llvm-svn: 137645 | |||||
* | Add testcase for STRH. Patch by James Molloy. | Owen Anderson | 2011-08-15 | 1 | -0/+3 | |
| | | | | llvm-svn: 137644 | |||||
* | Fix incorrect encoding of UMAAL and friends. Patch by James Molloy. | Owen Anderson | 2011-08-15 | 1 | -2/+2 | |
| | | | | llvm-svn: 137641 | |||||
* | Fix decoding LDRSB and LDRSH in Thumb1 mode. Patch by James Molloy. | Owen Anderson | 2011-08-15 | 1 | -0/+3 | |
| | | | | llvm-svn: 137636 | |||||
* | Fix problems decoding the to/from-lane NEON memory instructions, and add a ↵ | Owen Anderson | 2011-08-15 | 1 | -0/+1847 | |
| | | | | | | comprehensive NEON decoding testcase. llvm-svn: 137635 | |||||
* | Fix some remaining issues with decoding ARM-mode memory instructions, and ↵ | Owen Anderson | 2011-08-12 | 1 | -0/+471 | |
| | | | | | | add another batch of tests. llvm-svn: 137502 | |||||
* | Port over the basic ARM encodings test file to a decoding test file. ↵ | Owen Anderson | 2011-08-12 | 1 | -0/+2345 | |
| | | | | | | Greatly increases our test coverage of basic ARM-mode instructions. llvm-svn: 137495 | |||||
* | Fix decoding for indexed STRB and LDRB. Fixes <rdar://problem/9926161>. | Owen Anderson | 2011-08-11 | 1 | -0/+3 | |
| | | | | llvm-svn: 137347 | |||||
* | Improve operand validation for Thumb2 addressing modes. | Owen Anderson | 2011-08-11 | 3 | -9/+6 | |
| | | | | llvm-svn: 137344 | |||||
* | Continue to tighten decoding by performing more operand validation. | Owen Anderson | 2011-08-11 | 3 | -8/+5 | |
| | | | | llvm-svn: 137340 | |||||
* | Tighten decoding of addrmode2 instructions to reject more UNPREDICTABLE cases. | Owen Anderson | 2011-08-11 | 1 | -3/+2 | |
| | | | | llvm-svn: 137325 | |||||
* | Tighten operand decoding of addrmode2 instruction. The offset register ↵ | Owen Anderson | 2011-08-11 | 1 | -3/+2 | |
| | | | | | | cannot be PC. llvm-svn: 137323 | |||||
* | Correct immediate range for shifter operands. Patch by James Molloy, with ↵ | Owen Anderson | 2011-08-11 | 1 | -0/+3 | |
| | | | | | | additional encoding fixes added by me. llvm-svn: 137322 | |||||
* | Improve error checking in the new ARM disassembler. Patch by James Molloy. | Owen Anderson | 2011-08-11 | 1 | -1/+0 | |
| | | | | llvm-svn: 137320 | |||||
* | Add initial support for decoding NEON instructions in Thumb2 mode. | Owen Anderson | 2011-08-10 | 1 | -0/+3 | |
| | | | | llvm-svn: 137236 |