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* Added soft fail checks for the disassembler when decoding some corner cases ↵Silviu Baranga2012-03-223-2/+21
| | | | | | of the STRD, STRH, LDRD, LDRH, LDRSH and LDRSB instructions on ARM. llvm-svn: 153252
* Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or ↵Silviu Baranga2012-03-221-0/+22
| | | | | | LDRSHT instruction on ARM llvm-svn: 153251
* Added soft fail cases for the disassembler when decoding MUL instructions on ↵Silviu Baranga2012-03-221-0/+17
| | | | | | ARM. llvm-svn: 153250
* Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add testKevin Enderby2012-03-212-0/+368
| | | | | | case for all opcodes handed by DecodeVSTInstruction() in ARMDisassembler.cpp . llvm-svn: 153218
* The ARM instructions that have an unpredictable behavior when the pc ↵Silviu Baranga2012-03-205-5/+17
| | | | | | register operand is given now fail with soft fail. Modified the regression tests to reflect this. llvm-svn: 153089
* Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction.Kevin Enderby2012-03-062-0/+14
| | | | llvm-svn: 152127
* Change ARMInstPrinter::printPredicateOperand() so it will not abort if itKevin Enderby2012-03-011-0/+18
| | | | | | runs into the undefined 15 condition code value. llvm-svn: 151844
* Replace all instances of dg.exp file with lit.local.cfg, since all tests are ↵Eli Bendersky2012-02-162-6/+13
| | | | | | | | run with LIT now and now Dejagnu. dg.exp is no longer needed. Patch reviewed by Daniel Dunbar. It will be followed by additional cleanup patches. llvm-svn: 150664
* Teach the MC and disassembler about SoftFail, and hook it up to ↵James Molloy2012-02-091-0/+5
| | | | | | UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage. llvm-svn: 150169
* ARM NEON VST2 assembly parsing and encoding.Jim Grosbach2011-12-141-1/+1
| | | | | | | | Work in progress. Parsing for non-writeback, single spaced register lists works now. The rest have the representations better factored, but still need more to be able to parse properly. llvm-svn: 146579
* Fix an ambiguous decoding where we failed to properly decode VMOVv2f32 and ↵Owen Anderson2011-11-151-0/+6
| | | | | | VMOVv4f32. llvm-svn: 144683
* ARM VLDR/VSTR instructions don't need a size suffix.Jim Grosbach2011-11-142-17/+17
| | | | | | | Canonicallize on the non-suffixed form, but continue to accept assembly that has any correctly sized type suffix. llvm-svn: 144583
* Simplify some uses of utohexstr.Benjamin Kramer2011-11-073-23/+23
| | | | | | As a side effect hex is printed lowercase instead of uppercase now. llvm-svn: 144013
* Fix the issue that r143552 was trying to address the _right_ way. ↵Owen Anderson2011-11-021-0/+4
| | | | | | One-register lists are legal on LDM/STM instructions, but we should not print the PUSH/POP aliases when they appear. This fixes round tripping on this instruction. llvm-svn: 143557
* Fix disassembly of some VST1 instructions.Owen Anderson2011-11-011-1/+2
| | | | llvm-svn: 143507
* More not-crashing NEON disassembly updates for the vld refactoring.Owen Anderson2011-10-311-0/+2
| | | | llvm-svn: 143351
* Fix illegal disassembly testcase.Owen Anderson2011-10-281-2/+2
| | | | llvm-svn: 143231
* Reapply r143202, with a manual decoding hook for SWP. This change ↵Owen Anderson2011-10-281-1/+1
| | | | | | inadvertantly exposed a decoding ambiguity between SWP and CPS that the auto-generated decoder can't handle. llvm-svn: 143208
* Add testcase for r143162.Owen Anderson2011-10-271-0/+4
| | | | llvm-svn: 143163
* Fix a NEON disassembly case that was broken in the recent refactorings. As ↵Owen Anderson2011-10-241-0/+4
| | | | | | more of this code gets refactored, a lot of these manual decoding hooks should get smaller and/or go away entirely. llvm-svn: 142817
* Revert r142618, r142622, and r142624, which were based on an incorrect ↵Owen Anderson2011-10-202-5/+55
| | | | | | reading of the ARMv7 docs. llvm-svn: 142626
* Fix decoding tests for fixed MSR encodings.Owen Anderson2011-10-202-55/+5
| | | | llvm-svn: 142624
* Thumb2 assembly parsing and encoding for LDC/STC.Jim Grosbach2011-10-121-1/+1
| | | | llvm-svn: 141811
* Update test for r141704.Jim Grosbach2011-10-111-3/+3
| | | | llvm-svn: 141705
* Check in a patch that has already been code reviewed by Owen that I'd ↵James Molloy2011-09-282-0/+13
| | | | | | | | | | | | forgotten to commit. Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format. Add decoder and disassembler tests. Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT. llvm-svn: 140696
* Fix an incorrect decoder test.Owen Anderson2011-09-261-2/+2
| | | | llvm-svn: 140579
* Fix incorrect disassembly test.Owen Anderson2011-09-231-1/+1
| | | | llvm-svn: 140423
* Post-index loads/stores in still need to print the post-indexed immediate, ↵Owen Anderson2011-09-231-0/+7
| | | | | | even if it's zero, to distinguish them from non-post-indexed instructions. llvm-svn: 140420
* Reapply r140412 (Thumb2 reg-reg loads cannot target SP or PC), with invalid ↵Owen Anderson2011-09-231-2/+2
| | | | | | testcases updated. llvm-svn: 140415
* Print out immediate offset versions of PC-relative load/store instructions ↵Owen Anderson2011-09-212-1/+3
| | | | | | as [pc, #123] rather than simply #123. llvm-svn: 140283
* Port over more Thumb2 encoding tests to decoding tests.Owen Anderson2011-09-201-0/+608
| | | | llvm-svn: 140152
* Handle STRT (and friends) like LDRT (and friends) for decoding purposes. ↵Owen Anderson2011-09-191-0/+150
| | | | | | Port over additional encoding tests to decoding tests. llvm-svn: 140032
* Add a testcase for another corner-case decoding.Owen Anderson2011-09-161-0/+2
| | | | llvm-svn: 139970
* Fix disassembly of Thumb2 BFI instructions with bit range of [0, 32).Owen Anderson2011-09-161-0/+2
| | | | llvm-svn: 139964
* Add fixed bits to correctly distinguish Thumb2 SSAT/SSAT16's.Owen Anderson2011-09-161-0/+7
| | | | llvm-svn: 139958
* Fix disassembly of Thumb2 LDRSH with a #-0 offset.Owen Anderson2011-09-161-1/+2
| | | | llvm-svn: 139943
* Port over more Thumb2 assembly tests to disassembly tests.Owen Anderson2011-09-161-0/+95
| | | | llvm-svn: 139915
* Port over more Thumb2 assembly tests to disassembly tests.Owen Anderson2011-09-161-22/+748
| | | | llvm-svn: 139912
* Make use of Eli's FileCheck sorcery to improve this test.Owen Anderson2011-09-131-1/+1
| | | | llvm-svn: 139645
* Correct disassembly printing of Thumb2 post-incremented LDRD and STRD.Owen Anderson2011-09-131-0/+11
| | | | llvm-svn: 139639
* Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP ↵Owen Anderson2011-09-121-0/+5
| | | | | | either. llvm-svn: 139542
* Port more encoding tests to decoding tests, and correct an improper Thumb2 ↵Owen Anderson2011-09-121-0/+509
| | | | | | pre-indexed load decoding this uncovered. llvm-svn: 139522
* LDM writeback is not allowed if Rn is in the target register list.Owen Anderson2011-09-091-0/+5
| | | | llvm-svn: 139432
* Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands.Owen Anderson2011-09-091-1/+6
| | | | llvm-svn: 139422
* Soft fail CBZ/CBNZ in the disassembler if they appear inside an IT block.Owen Anderson2011-09-081-0/+5
| | | | llvm-svn: 139328
* Thumb2 assembly parsing and encoding for LDRD(immediate).Jim Grosbach2011-09-081-1/+0
| | | | | | Refactor operand handling for STRD as well. Tests for that forthcoming. llvm-svn: 139322
* Create Thumb2 versions of STC/LDC, and reenable the relevant tests.Owen Anderson2011-09-071-5/+2
| | | | llvm-svn: 139256
* Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds ↵James Molloy2011-09-0713-15/+18
| | | | | | predicate checking to the Disassembler. llvm-svn: 139250
* Update test for 139243Jim Grosbach2011-09-071-1/+1
| | | | llvm-svn: 139244
* Port more assembler tests over to disassembler tests, and fix a minor logic ↵Owen Anderson2011-09-071-0/+158
| | | | | | error that exposed. llvm-svn: 139240
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