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* Rematerialization logic was overly conservative when it comes to loads from ↵Evan Cheng2008-02-231-0/+49
| | | | | | fixed stack slots. llvm-svn: 47529
* Update test.Evan Cheng2008-02-231-11/+13
| | | | llvm-svn: 47527
* Remat of pic loads are now on by default.Evan Cheng2008-02-231-1/+1
| | | | llvm-svn: 47525
* Really. Why doesn't every arch support MMX?Evan Cheng2008-02-231-1/+1
| | | | llvm-svn: 47513
* Test case for PR2082.Evan Cheng2008-02-221-0/+55
| | | | llvm-svn: 47501
* Allow re-materialization of pic load (controlled by -remat-pic-load for now).Evan Cheng2008-02-221-0/+45
| | | | llvm-svn: 47476
* copy mmx values from/to memory with GPRs on x86-32 Chris Lattner2008-02-221-2/+3
| | | | | | | | instead of with mmx registers. This horribleness is apparently done by gcc to avoid having to insert emms in places that really should have it. This is the second half of rdar://5741668. llvm-svn: 47474
* Start using GPR's to copy around mmx value instead of mmx regs.Chris Lattner2008-02-221-0/+14
| | | | | | | | | | GCC apparently does this, and code depends on not having to do emms when this happens. This is x86-64 only so far, second half should handle x86-32. rdar://5741668 llvm-svn: 47470
* Treat clobber operands like early clobbers: if we haveChris Lattner2008-02-211-2/+11
| | | | | | | | | any, we force sdisel to do all regalloc for an asm. This leads to gross but correct codegen. This fixes the rest of PR2078. llvm-svn: 47454
* Remove llvm-upgrade and update tests.Tanya Lattner2008-02-2190-1460/+1482
| | | | llvm-svn: 47432
* testcase for PR1133Chris Lattner2008-02-211-0/+9
| | | | llvm-svn: 47427
* Fix a (harmless) but where vregs were added to the used reg lists for Chris Lattner2008-02-211-0/+15
| | | | | | | | | | inline asms. Fix PR2078 by marking aliases of registers used when a register is marked used. This prevents EAX from being allocated when AX is listed in the clobber set for the asm. llvm-svn: 47426
* XFAIL this for now.Evan Cheng2008-02-201-0/+1
| | | | llvm-svn: 47355
* this test requires sse2Chris Lattner2008-02-191-1/+1
| | | | llvm-svn: 47331
* Don't fold and's into test instructions if they have multiple uses.Chris Lattner2008-02-191-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | This compiles test-nofold.ll into: _test: movl $15, %ecx andl 4(%esp), %ecx testl %ecx, %ecx movl $42, %eax cmove %ecx, %eax ret instead of: _test: movl 4(%esp), %eax movl %eax, %ecx andl $15, %ecx testl $15, %eax movl $42, %eax cmove %ecx, %eax ret llvm-svn: 47330
* rename tests to avoid a test- prefix when they aren't related to the test ↵Chris Lattner2008-02-1910-0/+0
| | | | | | instruction. llvm-svn: 47329
* Remove llvm-upgrade and update tests.Tanya Lattner2008-02-1951-1306/+1302
| | | | llvm-svn: 47325
* Don't spew stats to stderr.Nick Lewycky2008-02-191-1/+1
| | | | llvm-svn: 47308
* Fix up the run line for this new test.Nick Lewycky2008-02-191-1/+1
| | | | | | llc: for the -info-output-file option: requires a value! llvm-svn: 47306
* New test.Evan Cheng2008-02-191-0/+219
| | | | llvm-svn: 47302
* Remove llvm-upgrade and update tests.Tanya Lattner2008-02-19162-3373/+3173
| | | | llvm-svn: 47296
* - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should ↵Evan Cheng2008-02-181-0/+17
| | | | | | | | check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type. - X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC. llvm-svn: 47290
* Don't mark scalar integer multiplication as Expand on x86, since x86Dan Gohman2008-02-181-0/+8
| | | | | | | | | | | | | has plain one-result scalar integer multiplication instructions. This avoids expanding such instructions into MUL_LOHI sequences that must be special-cased at isel time, and avoids the problem with that code that provented memory operands from being folded. This fixes PR1874, addressesing the most common case. The uncommon cases of optimizing multiply-high operations will require work in DAGCombiner. llvm-svn: 47277
* Remove llvm-upgrade.Tanya Lattner2008-02-1750-906/+906
| | | | llvm-svn: 47238
* llvm.memory.barrier, and impl for x86 and alphaAndrew Lenharth2008-02-166-0/+79
| | | | llvm-svn: 47204
* This test is not interesting.Evan Cheng2008-02-151-21/+0
| | | | llvm-svn: 47189
* Fix a miscompilation from Dan's recent apintification.Chris Lattner2008-02-141-0/+8
| | | | llvm-svn: 47128
* This readme entry is done, testcase here: CodeGen/X86/zero-remat.llChris Lattner2008-02-141-0/+2
| | | | llvm-svn: 47106
* Fix test.Evan Cheng2008-02-141-1/+1
| | | | llvm-svn: 47102
* Teach LegalizeTypes how to expand and promote CTLZ,Duncan Sands2008-02-131-12/+11
| | | | | | | | | | | | | | | | | | CTTZ and CTPOP. The expansion code differs from that in LegalizeDAG in that it chooses to take the CTLZ/CTTZ count from the Hi/Lo part depending on whether the Hi/Lo value is zero, not on whether CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the width of the type is) for it. I made this change because the optimizers may well know that Hi/Lo is zero and exploit it. The promotion code for CTTZ also differs from that in LegalizeDAG: it uses an "or" to get the right result when the original value is zero, rather than using a compare and select. This also means the value doesn't need to be zero extended. llvm-svn: 47075
* In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower thisChris Lattner2008-02-131-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | node as soon as we create it in SDISel. Previously we would lower it in legalize. The problem with this is that it only exposes the argument loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2 can hack on them. This causes us to miss some optimizations because datatype expansion also happens here. Exposing the loads early allows us to do optimizations on them. For example we now compile arg-cast.ll to: _foo: movl $2147483647, %eax andl 8(%esp), %eax ret where we previously produced: _foo: subl $12, %esp movsd 16(%esp), %xmm0 movsd %xmm0, (%esp) movl $2147483647, %eax andl 4(%esp), %eax addl $12, %esp ret It might also make sense to do this for ISD::CALL nodes, which have implicit stores on many targets. llvm-svn: 47054
* Add testcase for recent legalizer changeNate Begeman2008-02-131-0/+8
| | | | llvm-svn: 47049
* New tests.Evan Cheng2008-02-133-0/+71
| | | | llvm-svn: 47047
* Don't mask the isel bug.Evan Cheng2008-02-123-3/+3
| | | | llvm-svn: 47018
* This test assumes no SSE4.1.Evan Cheng2008-02-121-1/+1
| | | | llvm-svn: 47017
* Fix some test cases.Evan Cheng2008-02-123-3/+3
| | | | llvm-svn: 46998
* Determine whether a spill kills the register it's spilling before insertion ↵Evan Cheng2008-02-111-0/+10
| | | | | | rather than trying to undo the kill marker afterwards. llvm-svn: 46953
* Alignment of struct containing vectors depends onDale Johannesen2008-02-091-1/+1
| | | | | | | whether SSE is present, on Darwin anyway. Make it explicit. llvm-svn: 46909
* It's not always safe to fold movsd into xorpd, etc. Check the alignment of ↵Evan Cheng2008-02-081-0/+99
| | | | | | the load address first to make sure it's 16 byte aligned. llvm-svn: 46893
* Added missing entries in X86 load / store folding tables.Evan Cheng2008-02-081-0/+20
| | | | llvm-svn: 46866
* Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing ↵Evan Cheng2008-02-072-33/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax llvm-svn: 46850
* It's PR1925, not PR1609.Evan Cheng2008-02-061-1/+1
| | | | llvm-svn: 46825
* Fix a number of local register allocator issues: PR1609.Evan Cheng2008-02-061-0/+19
| | | | llvm-svn: 46821
* Fix PR1975: dag isel emitter produces patterns that isel wrong flag result.Evan Cheng2008-02-051-0/+12
| | | | llvm-svn: 46776
* If a vr is already marked alive in a bb, then it has PHI uses that are ↵Evan Cheng2008-02-051-0/+67
| | | | | | visited earlier, then it is not killed in the def block (i.e. not dead). llvm-svn: 46763
* Crashes LegalizeTypes with "Do not know how toDuncan Sands2008-02-041-0/+22
| | | | | | expand the result of this operator!" (node: ctlz). llvm-svn: 46713
* Crashes LegalizeTypes with "Do not know how to splitDuncan Sands2008-02-041-0/+14
| | | | | | this operator's operand" (node: extract_subvector). llvm-svn: 46712
* remove target triple to make this test more "generic"Chris Lattner2008-02-041-2/+0
| | | | llvm-svn: 46711
* Crashed the new type legalizer. Not likely to catchDuncan Sands2008-02-041-0/+21
| | | | | | | | | any bugs in the future since to get the crash you also need hacked in fake libcall support (which creates odd but legal trees), but since adding it doesn't hurt... Thanks to Chris for this ultimately reduced version. llvm-svn: 46706
* CBackend: Implement unaligned load/store.Lauro Ramos Venancio2008-02-011-0/+15
| | | | llvm-svn: 46646
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