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* Relax expressions and add explicit triplets -linux and -win32.NAKAMURA Takumi2011-02-221-11/+12
| | | | llvm-svn: 126203
* Relax expressions and add explicit triplets -linux and -win32.NAKAMURA Takumi2011-02-221-8/+9
| | | | llvm-svn: 126202
* Relax expressions and add explicit triplets -linux and -win32.NAKAMURA Takumi2011-02-221-3/+4
| | | | llvm-svn: 126201
* Relax expressions and add explicit triplets -linux and -win32.NAKAMURA Takumi2011-02-221-2/+2
| | | | llvm-svn: 126200
* Relax expressions and add explicit triplets -linux and -win32.NAKAMURA Takumi2011-02-221-3/+4
| | | | llvm-svn: 126199
* Relax expressions and add explicit triplets -linux and -win32.NAKAMURA Takumi2011-02-221-2/+3
| | | | llvm-svn: 126198
* Relax expressions and add explicit triplets -linux and -win32.NAKAMURA Takumi2011-02-221-7/+8
| | | | llvm-svn: 126197
* Relax expressions and add explicit triplets -linux and -win32.NAKAMURA Takumi2011-02-221-6/+7
| | | | llvm-svn: 126196
* test/CodeGen/X86/vec_cast.ll: Mark as XFAIL: migw,win32 for workaround of ↵NAKAMURA Takumi2011-02-221-1/+2
| | | | | | PR8311. llvm-svn: 126195
* test/CodeGen/X86/red-zone.ll: Add explicit -mtriple=x86_64-linux.NAKAMURA Takumi2011-02-221-1/+1
| | | | | | Redzone is not applicable on Win64. llvm-svn: 126194
* available_externally (hidden or not) GVs are always accessed via stubs. ↵Evan Cheng2011-02-221-0/+16
| | | | | | rdar://9027648. llvm-svn: 126191
* VirtRegRewriter assertion fix.Andrew Trick2011-02-221-0/+50
| | | | | | | Apparently it's ok for multiple operands to "kill" the same register. Fixes PR9237. llvm-svn: 126190
* Roll out r126169 and r126170 in an attempt to fix the selfhost bot.Cameron Zwarich2011-02-221-35/+0
| | | | llvm-svn: 126185
* Merge information about the number of zero, one, and sign bits of live-out ↵Cameron Zwarich2011-02-221-0/+35
| | | | | | | | | registers at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine phase. This fixes <rdar://problem/8760114>. llvm-svn: 126170
* Revert r125960, it's breaking darwin10 bootstrap.Eric Christopher2011-02-211-24/+0
| | | | llvm-svn: 126163
* Revert r124611 - "Keep track of incoming argument's location while emitting ↵Devang Patel2011-02-211-84/+0
| | | | | | | | | | | LiveIns." In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body. This requires some coordination with debugger to get this working. - The debugger needs to be aware of prolog_end attribute attached with line table entries. - The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+) llvm-svn: 126155
* Add XCore intrinsics for various instructions on ports.Richard Osborne2011-02-211-0/+40
| | | | llvm-svn: 126132
* Target/X86/X86FastISel: [PR6275] Fix Win32's dllimport function with fastisel.NAKAMURA Takumi2011-02-211-0/+5
| | | | | | | "dllimport" function must not be GlobalVariable, but Function. It is enough to check with GlobalValue. test/CodeGen/X86/dll-linkage.ll is updated to check llc -O0. llvm-svn: 126110
* Generate correct Sparc32 ABI compliant code for functions that return a struct.Venkatraman Govindaraju2011-02-212-4/+5
| | | | llvm-svn: 126108
* The signed version of our "magic number" computation for the integer ↵Cameron Zwarich2011-02-211-1/+1
| | | | | | | | | | | | | approximation of a constant had a minor typo introduced when copying it from the book, which caused it to favor negative approximations over positive approximations in many cases. Positive approximations require fewer operations beyond the multiplication. In the case of division by 3, we still generate code that is a single instruction larger than GCC's code. llvm-svn: 126097
* Make RecursivelyDeleteDeadPHINode delete a phi node that has no users and add aNick Lewycky2011-02-201-43/+0
| | | | | | | | | test for that. With this change, test/CodeGen/X86/codegen-dce.ll no longer finds any instructions to DCE, so delete the test. Also renamed J and JP to I and IP in RecursivelyDeleteDeadPHINode. llvm-svn: 126088
* Fix 9267; Add vector zext support.Nadav Rotem2011-02-201-0/+69
| | | | | | | | The DAGCombiner folds the zext into complex load instructions. This patch prevents this optimization on vectors since none of the supported targets knows how to perform load+vector_zext in one instruction. llvm-svn: 126080
* DIE numbers do not add any value in this test. Devang Patel2011-02-191-5/+5
| | | | llvm-svn: 126008
* Do not lose debug info of an inlined function argument even if the argument ↵Devang Patel2011-02-181-0/+86
| | | | | | | | is only used through GEPs. This time with a fix that avoids using invalidated DenseMap iterator. llvm-svn: 125984
* Reapply r114997 now that the buildbots have been updated.Bill Wendling2011-02-181-0/+24
| | | | llvm-svn: 125960
* Roll out r125794 to help diagnose the llvm-gcc-i386-linux-selfhost failure.Cameron Zwarich2011-02-181-86/+0
| | | | llvm-svn: 125830
* Do not lose debug info of an inlined function argument even if the argument ↵Devang Patel2011-02-171-0/+86
| | | | | | is only used through GEPs. llvm-svn: 125794
* Triple::MinGW64 is deprecated and removed. We can use Triple::MinGW32 generally.NAKAMURA Takumi2011-02-172-2/+2
| | | | | | No one uses *-mingw64. mingw-w64 is represented as {i686|x86_64}-w64-mingw32. In llvm side, i686 and x64 can be treated as similar way. llvm-svn: 125747
* The change for PR9190 wasn't quite right. We need to avoid making theEric Christopher2011-02-161-0/+41
| | | | | | | | | transformation if we can't legally create a build vector of the correct type. Check that we can make the transformation first, and add a TODO to refactor this code with similar cases. Fixes: PR9223 and rdar://9000350 llvm-svn: 125631
* Add testcase for PR9190.Eric Christopher2011-02-161-0/+35
| | | | llvm-svn: 125630
* Ignore DBG_VALUE machine instructions while constructing instruction ranges ↵Devang Patel2011-02-151-2/+2
| | | | | | | | based on location info. Machine instruction range consisting of only DBG_VALUE MIs only contributes consecutive labels in assembly output, which is harmless, and empty scope entry in DebugInfo, which confuses debugger tools. llvm-svn: 125577
* Switch llvm to using comdats. For now always use groups with a singleRafael Espindola2011-02-142-3/+3
| | | | | | section. llvm-svn: 125526
* PR9139: Specify ARM/Darwin triple for vector-DAGCombine.ll test.Bob Wilson2011-02-141-2/+2
| | | | | | | The i64_buildvector test in this file relies on the alignment of i64 and f64 types being the same, which is true for Darwin but not AAPCS. llvm-svn: 125525
* fix PR9210 by implementing some type legalization logic for Chris Lattner2011-02-141-0/+8
| | | | | | vector fp conversions. llvm-svn: 125482
* Enhance ComputeMaskedBits to know that aligned frameindexesChris Lattner2011-02-132-4/+15
| | | | | | | | | | | | | | | | | have their low bits set to zero. This allows us to optimize out explicit stack alignment code like in stack-align.ll:test4 when it is redundant. Doing this causes the code generator to start turning FI+cst into FI|cst all over the place, which is general goodness (that is the canonical form) except that various pieces of the code generator don't handle OR aggressively. Fix this by introducing a new SelectionDAG::isBaseWithConstantOffset predicate, and using it in places that are looking for ADD(X,CST). The ARM backend in particular was missing a lot of addressing mode folding opportunities around OR. llvm-svn: 125470
* when legalizing extremely wide shifts, make sure that Chris Lattner2011-02-131-0/+12
| | | | | | | | | the shift amounts are in a suitably wide type so that we don't generate out of range constant shift amounts. This fixes PR9028. llvm-svn: 125458
* fix visitShift to properly zero extend the shift amount if the provided operandChris Lattner2011-02-132-3/+1
| | | | | | | is narrower than the shift register. Doing an anyext provides undefined bits in the top part of the register. llvm-svn: 125457
* Prevent IMPLICIT_DEF/KILL to become a delay filler instruction in SPARC backend.Venkatraman Govindaraju2011-02-121-0/+13
| | | | llvm-svn: 125444
* A fix for 9165.Nadav Rotem2011-02-121-0/+32
| | | | | | | | The DAGCombiner created illegal BUILD_VECTOR operations. The patch added a check that either illegal operations are allowed or that the created operation is legal. llvm-svn: 125435
* Implement sdiv & udiv for <4 x i16> and <8 x i8> NEON vector types.Nate Begeman2011-02-111-0/+48
| | | | | | This avoids moving each element to the integer register file and calling __divsi3 etc. on it. llvm-svn: 125402
* Disable this test for now...Daniel Dunbar2011-02-111-0/+3
| | | | llvm-svn: 125361
* Fix buggy fcopysign lowering.Evan Cheng2011-02-111-13/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This define float @foo(float %x, float %y) nounwind readnone { entry: %0 = tail call float @copysignf(float %x, float %y) nounwind readnone ret float %0 } Was compiled to: vmov s0, r1 bic r0, r0, #-2147483648 vmov s1, r0 vcmpe.f32 s0, #0 vmrs apsr_nzcv, fpscr it lt vneglt.f32 s1, s1 vmov r0, s1 bx lr This fails to copy the sign of -0.0f because it's lost during the float to int conversion. Also, it's sub-optimal when the inputs are in GPR registers. Now it uses integer and + or operations when it's profitable. And it's correct! lsrs r1, r1, #31 bfi r0, r1, #31, #1 bx lr rdar://8984306 llvm-svn: 125357
* Add mips o32 tests again with the hope that the buildbot won't complaint againBruno Cardoso Lopes2011-02-101-0/+322
| | | | llvm-svn: 125316
* Remove the test to silence the buildbot, will check it in again with a ↵Bruno Cardoso Lopes2011-02-101-321/+0
| | | | | | proper fix soon llvm-svn: 125305
* Fix a lot of o32 CC issues and add a bunch of tests. Patch by Akira Hatanaka ↵Bruno Cardoso Lopes2011-02-101-0/+321
| | | | | | with some small modifications by me. llvm-svn: 125292
* ptx: add passing parameter to kernel functionsChe-Liang Chiou2011-02-101-1/+8
| | | | llvm-svn: 125279
* After 3-addressifying a two-address instruction, update the register maps; ↵Evan Cheng2011-02-101-10/+22
| | | | | | add a missing check when considering whether it's profitable to commute. rdar://8977508. llvm-svn: 125259
* Add intrinsic for setc instruction on the XCore.Richard Osborne2011-02-091-0/+14
| | | | llvm-svn: 125186
* PostRA antidependence breaker unit test for PR8986.Andrew Trick2011-02-081-0/+89
| | | | llvm-svn: 125091
* PostRA antidependence breaker unit test for rdar://8959122.Andrew Trick2011-02-081-0/+128
| | | | llvm-svn: 125090
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