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* Fix a batch of x86 tests to be coalescer independent.Jakob Stoklund Olesen2011-05-047-29/+38
| | | | | | | | Most of these tests require a single mov instruction that can come either before or after a 2-addr instruction. -join-physregs changes the behavior, but the results are equivalent. llvm-svn: 130891
* Give this test an explicit register allocator, so that it can work even ifDan Gohman2011-05-041-1/+1
| | | | | | the default register allocator is changed. llvm-svn: 130883
* SjLj EH could produce a machine basic block that legitimately has more than oneBill Wendling2011-05-041-0/+93
| | | | | | | | | | | | | landing pad as its successor. SjLj exception handling jumps to the correct landing pad via a switch statement that's generated right before code-gen. Loosen the constraint in the machine instruction verifier to allow for this. Note, this isn't the most rigorous check since we cannot determine where that switch statement came from. But it's marginally better than turning this check off when SjLj exceptions are used. <rdar://problem/9187612> llvm-svn: 130881
* Re-commit r130862 with a minor change to avoid an iterator running off the ↵Eli Friedman2011-05-042-2/+24
| | | | | | | | | | edge in some cases. Original message: Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 . llvm-svn: 130877
* This test fails on ARM. The test shouldn't explicitly specify alignment (and ↵Galina Kistanova2011-05-041-4/+4
| | | | | | alignment 4 is wrong) and requires hard-float. llvm-svn: 130875
* Back out r130862; it appears to be breaking bootstrap.Eli Friedman2011-05-042-24/+2
| | | | llvm-svn: 130867
* Teach MachineCSE how to do simple cross-block CSE involving physregs. This ↵Eli Friedman2011-05-042-2/+24
| | | | | | allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 . llvm-svn: 130862
* Fix more register and coalescing dependencies.Jakob Stoklund Olesen2011-05-044-9/+7
| | | | llvm-svn: 130859
* Explicitly request physreg coalesing for a bunch of Thumb2 unit tests.Jakob Stoklund Olesen2011-05-047-7/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | These tests all follow the same pattern: mov r2, r0 movs r0, #0 $CMP r2, r1 it eq moveq r0, #1 bx lr The first 'mov' can be eliminated by rematerializing 'movs r0, #0' below the test instruction: $CMP r0, r1 mov.w r0, #0 it eq moveq r0, #1 bx lr So far, only physreg coalescing can do that. The register allocators won't yet split live ranges just to eliminate copies. They can learn, but this particular problem is not likely to show up in real code. It only appears because r0 is used for both the function argument and return value. llvm-svn: 130858
* FileCheckize and break dependence on coalescing order.Jakob Stoklund Olesen2011-05-041-8/+6
| | | | llvm-svn: 130856
* Explicitly request -join-physregs for some tests that depend on it.Jakob Stoklund Olesen2011-05-041-1/+1
| | | | llvm-svn: 130855
* Do not emit location expression size twice.Devang Patel2011-05-041-0/+59
| | | | llvm-svn: 130854
* Remove LLVM IR metadata in test case committed in r130847.Akira Hatanaka2011-05-041-6/+3
| | | | llvm-svn: 130849
* Prevent instructions using $gp from being placed between a jalr and the ↵Akira Hatanaka2011-05-042-1/+36
| | | | | | instruction that restores the clobbered $gp. llvm-svn: 130847
* Don't depend on the physreg coalescing order.Jakob Stoklund Olesen2011-05-042-5/+4
| | | | llvm-svn: 130818
* Don't run this test through -regalloc=basic.Jakob Stoklund Olesen2011-05-041-1/+0
| | | | | | | The basic allocator is really bad about hinting, so it doesn't eliminate all copies when physreg joining is disabled. llvm-svn: 130817
* Fix register-dependent XCore testsJakob Stoklund Olesen2011-05-041-6/+3
| | | | llvm-svn: 130816
* Fix register-dependent test in MSP430.Jakob Stoklund Olesen2011-05-041-1/+1
| | | | llvm-svn: 130815
* Fix a bunch of ARM tests to be register allocation independent.Jakob Stoklund Olesen2011-05-038-30/+30
| | | | llvm-svn: 130800
* Replace the "movnt" intrinsics with a native store + nontemporal metadata bit.Bill Wendling2011-05-031-0/+19
| | | | | | <rdar://problem/8460511> llvm-svn: 130791
* Make the test less likely to fail with minor changes.Evan Cheng2011-05-031-1/+1
| | | | llvm-svn: 130778
* Remove test for iOS divmod function, since that is disabled for now.Bob Wilson2011-05-031-58/+0
| | | | llvm-svn: 130769
* Add a few ARM coprocessor intrinsics. Testcases includedBruno Cardoso Lopes2011-05-031-0/+39
| | | | llvm-svn: 130763
* Add an unfolded offset field to LSR's Formula record. This is used toDan Gohman2011-05-031-0/+80
| | | | | | | | model constants which can be added to base registers via add-immediate instructions which don't require an additional register to materialize the immediate. llvm-svn: 130743
* Add 130690 back.Rafael Espindola2011-05-022-4/+2
| | | | llvm-svn: 130693
* Revert while I debug the tests that use march but not mtriple.Rafael Espindola2011-05-022-2/+4
| | | | llvm-svn: 130691
* Move ppc OS X to cfi too. I am building it on an old ppc mini, but it will ↵Rafael Espindola2011-05-022-4/+2
| | | | | | take some time. llvm-svn: 130690
* Add r130623 back now that ELF has been fixed to work with -fno-dwarf2-cfi-asm.Rafael Espindola2011-05-016-16/+20
| | | | llvm-svn: 130658
* GCC uses a different encoding of pointers in the FDE when usingRafael Espindola2011-05-011-0/+38
| | | | | | -fno-dwarf2-cfi-asm. Implement the same behavior. llvm-svn: 130637
* Revert the previous patch while I figure out how to make llvm-gccRafael Espindola2011-04-306-20/+16
| | | | | | less agressive about disabling cfi on linux :-( llvm-svn: 130626
* Enable CFI on OS X.Rafael Espindola2011-04-306-16/+20
| | | | | | | | | | | | | | | Currently the output should be almost identical to the one produced by CodeGen to make the transition easier. The only two differences I know of are: * Some files get an extra advance loc of size 0. This will be fixed when relaxations are enabled. * The optimization of declaring an EH symbol as an external variable is not implemented. This is a subset of adding the nounwind attribute, so we if really this at -O0 we should probably do it at the IL level. llvm-svn: 130623
* Allow folded spills in test.Jakob Stoklund Olesen2011-04-301-2/+2
| | | | llvm-svn: 130599
* Weekly fix of register allocation dependent unit tests.Jakob Stoklund Olesen2011-04-307-33/+40
| | | | llvm-svn: 130567
* Make FastEmit_ri_ try a bit harder to succeed for supported operations; ↵Eli Friedman2011-04-291-2/+10
| | | | | | FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM. llvm-svn: 130560
* Switch to ImmLeaf (which can be used by FastISel) for a few more common ↵Eli Friedman2011-04-291-5/+29
| | | | | | ARM/Thumb2 patterns. llvm-svn: 130552
* Fix run-line, again. :(Eli Friedman2011-04-291-1/+1
| | | | llvm-svn: 130540
* Re-committing r130454, which does not in fact break anything.Eli Friedman2011-04-291-0/+11
| | | | | | | Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. rdar://problem/9338332 . llvm-svn: 130539
* Add trunc->branch support, this won't help with clang's i8->i1 truncationsEric Christopher2011-04-291-1/+16
| | | | | | for bools, but is a start. llvm-svn: 130534
* Change DwarfCFIException's member variables to track what it actuallyRafael Espindola2011-04-291-1/+1
| | | | | | emmits: .cfi_personality, .cfi_lsda and the moves. llvm-svn: 130503
* Teach Thumb2 isel to fold and->rotr ==> ROR.Andrew Trick2011-04-291-2/+4
| | | | | | Generalization of Nate Begeman's patch! llvm-svn: 130502
* Combine thumb2-ror tests.Andrew Trick2011-04-292-13/+13
| | | | llvm-svn: 130498
* Revert r130454; apparently this doesn't actually work.Eli Friedman2011-04-281-11/+0
| | | | llvm-svn: 130462
* Fix runline.Eli Friedman2011-04-281-1/+1
| | | | llvm-svn: 130455
* Fix a rather obscure crash caused by ARM fast-isel generating code which ↵Eli Friedman2011-04-281-0/+11
| | | | | | | | redefines a register. rdar://problem/9338332 . llvm-svn: 130454
* fast-isel sret calls, try 2. We actually do need to do something on x86-32. ↵Eli Friedman2011-04-282-0/+28
| | | | | | rdar://problem/9303592 . llvm-svn: 130429
* Actually revert r130348 correctly.Eli Friedman2011-04-281-27/+1
| | | | llvm-svn: 130418
* Revert r130348; causing buildbot issues on x86-32.Eli Friedman2011-04-281-0/+13
| | | | llvm-svn: 130412
* Teach dwarf writer to handle complex address expression for .debug_loc entries.Devang Patel2011-04-282-4/+4
| | | | | | | This fixes clang generated blocks' variables' debug info. Radar 9279956. llvm-svn: 130373
* Fix a silly mistake in r130338.Eli Friedman2011-04-281-0/+9
| | | | llvm-svn: 130360
* PTX: support for bitwise operations on predicatesJustin Holewinski2011-04-281-0/+24
| | | | | | | | | - selection of bitwise preds (AND, OR, XOR) - new bitwise.ll test Patch by Dan Bailey llvm-svn: 130353
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