| Commit message (Collapse) | Author | Age | Files | Lines |
| |
|
|
|
|
|
|
|
|
| |
verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.
Also, factor out the relevant code out of all the targets and into
target-independent code.
llvm-svn: 83392
|
| |
|
|
|
|
| |
specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string.
llvm-svn: 83215
|
| |
|
|
|
|
| |
not use that scheduler.
llvm-svn: 83128
|
| |
|
|
| |
llvm-svn: 83009
|
| |
|
|
|
|
|
|
|
|
|
| |
physical registers. This is especially critical for the later two since they
start the live interval of a super-register. e.g.
%DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
If this instruction is eliminated, the register scavenger will not be happy as
D0 is not defined previously.
This fixes PR5055.
llvm-svn: 82968
|
| |
|
|
|
|
|
|
|
|
| |
allows matching and remembering a string and then matching and
verifying that the string occurs later in the file.
Change X86/xor.ll to use this in some cases where the test was
checking for an arbitrary register allocation decision.
llvm-svn: 82891
|
| |
|
|
|
|
| |
where FCMP_OEQ is not legal and FCMP_OGE is, such as x86.
llvm-svn: 82861
|
| |
|
|
| |
llvm-svn: 82825
|
| |
|
|
|
|
|
|
| |
which have no defs anywhere in the function. In particular, this fixes sinking
of instructions that reference RIP on x86-64, which is currently being modeled
as a register.
llvm-svn: 82815
|
| |
|
|
| |
llvm-svn: 82803
|
| |
|
|
|
|
| |
being checked aren't valid without it.
llvm-svn: 82786
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
regex and matching it instead of trying to match chunks at a time.
Matching chunks at a time broke with check lines like
CHECK: foo {{.*}}bar
because the .* would eat the entire rest of the line and bar would
never match.
Now we just escape the fixed strings for the user, so that something
like:
CHECK: a() {{.*}}???
is matched as:
CHECK: {{a\(\) .*\?\?\?}}
transparently "under the covers".
llvm-svn: 82779
|
| |
|
|
| |
llvm-svn: 82759
|
| |
|
|
| |
llvm-svn: 82756
|
| |
|
|
|
|
| |
kills. This also eliminate the horrible check which scan forward to the end of the basic block. It should be faster and more accurate.
llvm-svn: 82676
|
| |
|
|
| |
llvm-svn: 82637
|
| |
|
|
| |
llvm-svn: 82610
|
| |
|
|
| |
llvm-svn: 82505
|
| |
|
|
|
|
|
|
|
|
| |
variable increment / decrement slighter high priority.
This has major impact on some micro-benchmarks. On MultiSource/Applications
and spec tests, it's a minor win. It also reduce 256.bzip instruction count
by 8%, 55 on 164.gzip on i386 / Darwin.
llvm-svn: 82485
|
| |
|
|
| |
llvm-svn: 82471
|
| |
|
|
|
|
| |
loads in order to reduce register pressure.
llvm-svn: 82470
|
| |
|
|
|
|
|
|
|
|
| |
And fix a bug with the behavior of min/max instructions formed from
fcmp uge comparisons.
Also, use FiniteOnlyFPMath() for this code instead of UnsafeFPMath,
as it is more specific.
llvm-svn: 82466
|
| |
|
|
|
|
|
|
|
|
| |
we pushed the beginning of the interval back 1, so the
interval would overlap with inputs that die. We were
also pushing the end of the interval back 1, though,
which means the earlyclobber didn't overlap with other
output operands. Don't do this. PR 4964.
llvm-svn: 82342
|
| |
|
|
|
|
| |
blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks.
llvm-svn: 82311
|
| |
|
|
| |
llvm-svn: 82276
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
getSymbolForDwarfGlobalReference is smart enough to know that it
needs to register the stub it references with MachineModuleInfoMachO,
so that it gets emitted at the end of the file.
Move stub emission from X86ATTAsmPrinter::doFinalization to the
new X86ATTAsmPrinter::EmitEndOfAsmFile asmprinter hook. The important
thing here is that EmitEndOfAsmFile is called *after* the ehframes are
emitted, so we get all the stubs.
This allows us to remove a gross hack from the asmprinter where it would
"just know" that it needed to output stubs for personality functions.
Now this is all driven from a consistent interface.
The testcase change is just reordering the expected output now that the
stubs come out after the ehframe instead of before.
This also unblocks other changes that Bill wants to make.
llvm-svn: 82269
|
| |
|
|
|
|
|
| |
on x86, to avoid explicit test instructions. A few existing tests changed
due to arbitrary register allocation differences.
llvm-svn: 82263
|
| |
|
|
| |
llvm-svn: 82182
|
| |
|
|
| |
llvm-svn: 82181
|
| |
|
|
| |
llvm-svn: 82179
|
| |
|
|
| |
llvm-svn: 82178
|
| |
|
|
| |
llvm-svn: 82130
|
| |
|
|
|
|
| |
liveness is being shortened, the sub-registers were not. The symptom is the register allocator could not find a free register for this particular test.
llvm-svn: 82108
|
| |
|
|
|
|
|
|
| |
displacement
values to machineinstrs.
llvm-svn: 81886
|
| |
|
|
| |
llvm-svn: 81884
|
| |
|
|
| |
llvm-svn: 81882
|
| |
|
|
| |
llvm-svn: 81857
|
| |
|
|
| |
llvm-svn: 81833
|
| |
|
|
| |
llvm-svn: 81824
|
| |
|
|
| |
llvm-svn: 81823
|
| |
|
|
| |
llvm-svn: 81822
|
| |
|
|
|
|
|
|
|
| |
has multiple uses, as one of the other uses may be on a path
to a different node above the callseq_start, because that
leads to a cyclic graph. This problem is exposed when
-combiner-global-alias-analysis is used. This fixes PR4880.
llvm-svn: 81821
|
| |
|
|
|
|
| |
its result if the condition is false.
llvm-svn: 81814
|
| |
|
|
|
|
|
| |
Change the picbase symbol on non-darwin systems from ".Lllvm$4.$piclabel" to
".L4$pb". The actual name doesn't matter and the darwin name is shorter.
llvm-svn: 81688
|
| |
|
|
|
|
|
| |
sse, this code falls back to SelectionDAG isel which uses an x87
instruction, which is fine, but not what this test is testing for.
llvm-svn: 81656
|
| |
|
|
| |
llvm-svn: 81545
|
| |
|
|
|
|
|
|
| |
input filename so that opt doesn't print the input filename in the
output so that grep lines in the tests don't unintentionally match
strings in the input filename.
llvm-svn: 81537
|
| |
|
|
| |
llvm-svn: 81532
|
| |
|
|
|
|
| |
change the destination register to a 32-bit one or add a sub-register index.
llvm-svn: 81496
|
| |
|
|
|
|
|
|
|
|
|
|
| |
instruction. If done, the instruction does a 64-bit load and that's not
safe. This can happen we a subreg_to_reg 0 has been coalesced. One
exception is when the instruction that folds the load is a move, then we
can simply turn it into a 32-bit load from the stack slot.
rdar://7170444
llvm-svn: 81494
|