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path: root/llvm/test/CodeGen/X86/vec_shift5.ll
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* [X86][SSE] Add support for constant folding vector logical shift by immediatesSimon Pilgrim2017-01-241-8/+4
| | | | llvm-svn: 292915
* [X86][SSE] Regenerate vector shift testsSimon Pilgrim2016-07-091-66/+151
| | | | llvm-svn: 274987
* fixed test to use SSE2 attributeSanjay Patel2015-03-061-1/+1
| | | | llvm-svn: 231510
* [X86] Teach the backend how to fold target specific dag node for packedAndrea Di Biagio2013-12-281-0/+160
vector shift by immedate count (VSHLI/VSRLI/VSRAI) into a build_vector when the vector in input to the shift is a build_vector of all constants or UNDEFs. Target specific nodes for packed shifts by immediate count are in general introduced by function 'getTargetVShiftByConstNode' (in X86ISelLowering.cpp) when lowering shift operations, SSE/AVX immediate shift intrinsics and (only in very few cases) SIGN_EXTEND_INREG dag nodes. This patch adds extra rules for simplifying vector shifts inside function 'getTargetVShiftByConstNode'. Added file test/CodeGen/X86/vec_shift5.ll to verify that packed shifts by immediate are correctly folded into a build_vector when the input vector to the shift dag node is a vector of constants or undefs. llvm-svn: 198113
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