| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [X86][SSE] Fix domains for VZEXT_LOAD type instructions | Simon Pilgrim | 2016-12-15 | 1 | -1/+1 |
| | | | | | | | | | Add the missing domain equivalences for movss, movsd, movd and movq zero extending loading instructions. Differential Revision: https://reviews.llvm.org/D27684 llvm-svn: 289825 | ||||
| * | [X86][SSE] Regenerated the vec_set tests. | Simon Pilgrim | 2016-04-01 | 1 | -6/+9 |
| | | | | | | | Replaced lots of dodgy greps with actual codegen llvm-svn: 265163 | ||||
| * | More rewrites of x86 codegen regression tests with FileCheck | Michael Liao | 2013-05-01 | 1 | -1/+3 |
| | | | | | llvm-svn: 180837 | ||||
| * | Eliminate more uses of llvm-as and llvm-dis. | Dan Gohman | 2009-09-08 | 1 | -1/+1 |
| | | | | | llvm-svn: 81290 | ||||
| * | Handle vector move / load which zero the destination register top bits (i.e. ↵ | Evan Cheng | 2008-05-08 | 1 | -0/+7 |
| movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine. llvm-svn: 50838 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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