| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [DAG] vector div/rem with any zero element in divisor is undef | Sanjay Patel | 2017-03-14 | 1 | -13/+1 |
| * | [DAGCombiner] simplify div/rem-by-0 | Sanjay Patel | 2017-03-06 | 1 | -89/+14 |
| * | [X86][SSE] Regenerated vector sdiv to shifts tests | Simon Pilgrim | 2016-04-01 | 1 | -46/+239 |
| * | [X86] Do not lower scalar sdiv/udiv to a shifts + mul sequence when optimizin... | Michael Kuperstein | 2015-08-19 | 1 | -0/+13 |
| * | Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging.... | Stephen Lin | 2013-07-13 | 1 | -1/+1 |
| * | Optimized integer vector multiplication operation by replacing it with shift/... | Elena Demikhovsky | 2013-06-26 | 1 | -0/+8 |
| * | Test case hygiene. | Benjamin Kramer | 2013-03-09 | 1 | -1/+1 |
| * | add -march to the test | Nadav Rotem | 2013-01-09 | 1 | -1/+1 |
| * | Efficient lowering of vector sdiv when the divisor is a splatted power of two... | Nadav Rotem | 2013-01-09 | 1 | -0/+72 |

