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path: root/llvm/test/CodeGen/X86/vec_sdiv_to_shift.ll
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* [DAG] vector div/rem with any zero element in divisor is undefSanjay Patel2017-03-141-13/+1
* [DAGCombiner] simplify div/rem-by-0Sanjay Patel2017-03-061-89/+14
* [X86][SSE] Regenerated vector sdiv to shifts testsSimon Pilgrim2016-04-011-46/+239
* [X86] Do not lower scalar sdiv/udiv to a shifts + mul sequence when optimizin...Michael Kuperstein2015-08-191-0/+13
* Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging....Stephen Lin2013-07-131-1/+1
* Optimized integer vector multiplication operation by replacing it with shift/...Elena Demikhovsky2013-06-261-0/+8
* Test case hygiene.Benjamin Kramer2013-03-091-1/+1
* add -march to the testNadav Rotem2013-01-091-1/+1
* Efficient lowering of vector sdiv when the divisor is a splatted power of two...Nadav Rotem2013-01-091-0/+72
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