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path: root/llvm/test/CodeGen/X86/vec_insert-mmx.ll
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* [X86][MMX] Support MMX build vectors to avoid SSE usage (PR29222)Simon Pilgrim2018-03-111-6/+3
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-1/+1
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-1/+1
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-8/+8
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-2/+2
* [X86][SSE2] Fix asm string for movq (Move Quadword) instruction.Ayman Musa2017-04-261-1/+1
* [X86][SSE] Fix domains for VZEXT_LOAD type instructionsSimon Pilgrim2016-12-151-2/+2
* VirtRegMap: Replace some identity copies with KILL instructions.Matthias Braun2016-07-091-0/+1
* [X86][SSE] Regenerated the vec_insert tests.Simon Pilgrim2016-04-011-27/+62
* [X86] add an exedepfix entry for movq == movlps == movlpdSanjay Patel2015-04-151-1/+1
* [DAGCombiner] Combine shuffles of BUILD_VECTOR and SCALAR_TO_VECTORSimon Pilgrim2015-04-031-1/+1
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-2/+2
* [X86][MMX] Cleanup shuffle, bitcast and insert element testsBruno Cardoso Lopes2015-02-021-0/+58
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