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* [X86][SSE] Fix domains for VZEXT_LOAD type instructionsSimon Pilgrim2016-12-151-2/+2
| | | | | | | | Add the missing domain equivalences for movss, movsd, movd and movq zero extending loading instructions. Differential Revision: https://reviews.llvm.org/D27684 llvm-svn: 289825
* [X86][SSE] Regenerate scalar i64 uitofp testSimon Pilgrim2016-10-111-16/+41
| | | | | | Added 32-bit target test llvm-svn: 283883
* Recommit 'Remove the restriction that MachineSinking is now stopped byWei Mi2016-08-121-2/+4
| | | | | | | | | | | | | | | | "insert_subreg, subreg_to_reg, and reg_sequence" instructions' after adjusting some unittest checks. This is to solve PR28852. The restriction was added at 2010 to make better register coalescing. We assumed that it was not necessary any more. Testing results on x86 supported the assumption. We will look closely to any performance impact it will bring and will be prepared to help analyzing performance problem found on other architectures. Differential Revision: https://reviews.llvm.org/D23210 llvm-svn: 278466
* [X86] Don't use GR64 register 'and with immediate' instructions if the ↵Craig Topper2015-04-041-2/+2
| | | | | | | | | | immediate is zero in the upper 33-bits or upper 57-bits. Use GR32 instructions instead. Previously the patterns didn't have high enough priority and we would only use the GR32 form if the only the upper 32 or 56 bits were zero. Fixes PR23100. llvm-svn: 234075
* Flip the new block-placement pass to be on by default.Chandler Carruth2012-04-161-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | This is mostly to test the waters. I'd like to get results from FNT build bots and other bots running on non-x86 platforms. This feature has been pretty heavily tested over the last few months by me, and it fixes several of the execution time regressions caused by the inlining work by preventing inlining decisions from radically impacting block layout. I've seen very large improvements in yacr2 and ackermann benchmarks, along with the expected noise across all of the benchmark suite whenever code layout changes. I've analyzed all of the regressions and fixed them, or found them to be impossible to fix. See my email to llvmdev for more details. I'd like for this to be in 3.1 as it complements the inliner changes, but if any failures are showing up or anyone has concerns, it is just a flag flip and so can be easily turned off. I'm switching it on tonight to try and get at least one run through various folks' performance suites in case SPEC or something else has serious issues with it. I'll watch bots and revert if anything shows up. llvm-svn: 154816
* Use –mcpu=generic, so that the test will not fail when run on an Intel AtomBill Wendling2012-02-161-1/+1
| | | | | | | | processor, due to the Atom scheduler producing an instruction sequence that is different from that which is expected. Patch by Michael Spencer! llvm-svn: 150736
* Set EFLAGS correctly in EmitLoweredSelect on X86.Lang Hames2012-02-021-29/+4
| | | | llvm-svn: 149597
* Revert r144611 and r144613.Jakob Stoklund Olesen2011-11-151-1/+1
| | | | | | | | These tests are actually correct, clang was miscompiling ExeDepsFix::processUses. Evan fixed the miscompilation in r144628. llvm-svn: 144630
* Allow for depencendy-breaking instructions before cvt*.Jakob Stoklund Olesen2011-11-151-1/+1
| | | | | | | This should unbreak clang-x86_64-darwin10-RA, but I can't actually reproduce the failure. llvm-svn: 144611
* Update live-in lists when splitting critical edges.Jakob Stoklund Olesen2011-10-141-4/+29
| | | | | | Fixes PR10814. Patch by Jan Sjödin! llvm-svn: 141960
* Use a more efficient lowering of uint64_t --> float that can take advantage ↵Owen Anderson2010-10-051-0/+21
of hardware signed integer conversion without having to do a double cast (uint64_t --> double --> float). This is based on the algorithm from compiler_rt's __floatundisf for X86-64. llvm-svn: 115634
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