| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [x86] enable machine combiner reassociations for 256-bit vector logical ↵ | Sanjay Patel | 2015-09-30 | 1 | -2/+46 |
| | | | | | | | integer insts llvm-svn: 248955 | ||||
| * | [x86] enable machine combiner reassociations for 128-bit vector logical ↵ | Sanjay Patel | 2015-09-12 | 1 | -0/+68 |
| | | | | | | | | | | | integer insts (2nd try) The changes in: test/CodeGen/X86/machine-cp.ll are just due to scheduling differences after some logic instructions were reassociated. llvm-svn: 247516 | ||||
| * | revert r247506; need to verify changes in existing tests | Sanjay Patel | 2015-09-12 | 1 | -68/+0 |
| | | | | | llvm-svn: 247507 | ||||
| * | [x86] enable machine combiner reassociations for 128-bit vector logical ↵ | Sanjay Patel | 2015-09-12 | 1 | -0/+68 |
| integer insts llvm-svn: 247506 | |||||

