| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [ELF] Fix large code model MIR verifier errors | Reid Kleckner | 2018-10-24 | 1 | -42/+42 |
| | | | | | | | | | | | | Instead of using the MOVGOT64r pseudo, use the existing MO_PIC_BASE_OFFSET support on symbol operands. Now I don't have to create a "scratch register operand" for the pseudo to use, and the register allocator can make better decisions. Fixes some X86 verifier errors tracked in PR27481. llvm-svn: 345219 | ||||
| * | Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code ↵ | Reid Kleckner | 2018-07-23 | 1 | -0/+384 |
| models" Don't try to generate large PIC code for non-ELF targets. Neither COFF nor MachO have relocations for large position independent code, and users have been using "large PIC" code models to JIT 64-bit code for a while now. With this change, if they are generating ELF code, their JITed code will truly be PIC, but if they target MachO or COFF, it will contain 64-bit immediates that directly reference external symbols. For a JIT, that's perfectly fine. llvm-svn: 337740 | |||||

