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* Fix patterns for 64-bit pointers.Jakob Stoklund Olesen2013-04-141-0/+9
| | | | | | This fixes the pic32 code model for SPARC v9. llvm-svn: 179469
* Define SPARC code models.Jakob Stoklund Olesen2013-04-131-0/+23
| | | | | | | Currently, only abs32 and pic32 are implemented. Add a test case for abs32 with 64-bit code. 64-bit PIC code is currently broken. llvm-svn: 179463
* Compute correct frame sizes for SPARC v9 64-bit frames.Jakob Stoklund Olesen2013-04-091-0/+16
| | | | | | | | | | The save area is twice as big and there is no struct return slot. The stack pointer is always 16-byte aligned (after adding the bias). Also eliminate the stack adjustment instructions around calls when the function has a reserved stack frame. llvm-svn: 179083
* Implement LowerCall_64 for the SPARC v9 64-bit ABI.Jakob Stoklund Olesen2013-04-071-3/+147
| | | | | | | There is still no support for byval arguments (which I don't think are needed) and varargs. llvm-svn: 178993
* Implement LowerReturn_64 for SPARC v9.Jakob Stoklund Olesen2013-04-061-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Integer return values are sign or zero extended by the callee, and structs up to 32 bytes in size can be returned in registers. The CC_Sparc64 CallingConv definition is shared between LowerFormalArguments_64 and LowerReturn_64. Function arguments and return values are passed in the same registers. The inreg flag is also used for return values. This is required to handle C functions returning structs containing floats and ints: struct ifp { int i; float f; }; struct ifp f(void); LLVM IR: define inreg { i32, float } @f() { ... ret { i32, float } %retval } The ABI requires that %retval.i is returned in the high bits of %i0 while %retval.f goes in %f1. Without the inreg return value attribute, %retval.i would go in %i0 and %retval.f would go in %f3 which is a more efficient way of returning %multiple values, but it is not ABI compliant for returning C structs. llvm-svn: 178966
* SPARC v9 stack pointer bias.Jakob Stoklund Olesen2013-04-061-7/+5
| | | | | | | | | | | 64-bit SPARC v9 processes use biased stack and frame pointers, so the current function's stack frame is located at %sp+BIAS .. %fp+BIAS where BIAS = 2047. This makes more local variables directly accessible via [%fp+simm13] addressing. llvm-svn: 178965
* Complete formal arguments for the SPARC v9 64-bit ABI.Jakob Stoklund Olesen2013-04-061-0/+136
| | | | | | | | | | | | | | | | | | | | | | | | All arguments are formally assigned to stack positions and then promoted to floating point and integer registers. Since there are more floating point registers than integer registers, this can cause situations where floating point arguments are assigned to registers after integer arguments that where assigned to the stack. Use the inreg flag to indicate 32-bit fragments of structs containing both float and int members. The three-way shadowing between stack, integer, and floating point registers requires custom argument lowering. The good news is that return values are passed in the exact same way, and we can share the code. Still missing: - Update LowerReturn to handle structs returned in registers. - LowerCall. - Variadic functions. llvm-svn: 178958
* Add SPARC v9 support for select on 64-bit compares.Jakob Stoklund Olesen2013-04-041-0/+22
| | | | | | | | | | | This requires v9 cmov instructions using the %xcc flags instead of the %icc flags. Still missing: - Select floats on %xcc flags. - Select i64 on %fcc flags. llvm-svn: 178737
* Add 64-bit compare + branch for SPARC v9.Jakob Stoklund Olesen2013-04-031-0/+34
| | | | | | | | | | The same compare instruction is used for 32-bit and 64-bit compares. It sets two different sets of flags: icc and xcc. This patch adds a conditional branch instruction using the xcc flags for 64-bit compares. llvm-svn: 178621
* Add 64-bit load and store instructions.Jakob Stoklund Olesen2013-04-021-0/+58
| | | | | | There is only a few new instructions, the rest is handled with patterns. llvm-svn: 178528
* Basic 64-bit ALU operations.Jakob Stoklund Olesen2013-04-021-0/+21
| | | | | | | SPARC v9 extends all ALU instructions to 64 bits, so we simply need to add patterns to use them for both i32 and i64 values. llvm-svn: 178527
* Materialize 64-bit immediates.Jakob Stoklund Olesen2013-04-021-0/+46
| | | | | | | The last resort pattern produces 6 instructions, and there are still opportunities for materializing some immediates in fewer instructions. llvm-svn: 178526
* Add 64-bit shift instructions.Jakob Stoklund Olesen2013-04-021-0/+14
| | | | | | | | | | | SPARC v9 defines new 64-bit shift instructions. The 32-bit shift right instructions are still usable as zero and sign extensions. This adds new F3_Sr and F3_Si instruction formats that probably should be used for the 32-bit shifts as well. They don't really encode an simm13 field. llvm-svn: 178525
* Add support for 64-bit calling convention.Jakob Stoklund Olesen2013-04-022-1/+8
| | | | | | | | | | | | This is far from complete, but it is enough to make it possible to write test cases using i64 arguments. Missing features: - Floating point arguments. - Receiving arguments on the stack. - Calls. llvm-svn: 178523
* Remove unnecessary leading comment characters in lit-only fileDavid Blaikie2013-03-181-1/+1
| | | | llvm-svn: 177327
* Include '.test' suffix in target specific lit configs that need itDavid Blaikie2013-03-181-1/+1
| | | | | | | | | | Apparently my final cleanup to use a relevant suffix for these tests before committing r176831 caused them to stop running since lit wasn't configured to run tests with that suffix in those directories (why don't we just have a global suffix list?). So, add the suffix to the relevant directories & fix the test that has bitrotted over the last week due to my debug info schema changes. llvm-svn: 177315
* Remove duplicate test contents.David Blaikie2013-03-112-28/+1
| | | | llvm-svn: 176831
* Use TargetTransformInfo to control switch-to-lookup table transformationHans Wennborg2012-10-301-84/+0
| | | | | | | | | | | | | | When the switch-to-lookup tables transform landed in SimplifyCFG, it was pointed out that this could be inappropriate for some targets. Since there was no way at the time for the pass to know anything about the target, an awkward reverse-transform was added in CodeGenPrepare that turned lookup tables back into switches for some targets. This patch uses the new TargetTransformInfo to determine if a switch should be transformed, and removes CodeGenPrepare::ConvertLoadToSwitch. llvm-svn: 167011
* Fix broken tests.Benjamin Kramer2012-10-021-1/+1
| | | | llvm-svn: 165019
* Move load_to_switch.ll to test/CodeGen/SPARC/Hans Wennborg2012-09-191-0/+84
| | | | | | | Because the test invokes llc -march=sparc, it needs to be in a directory which is only run when the sparc target is built. llvm-svn: 164211
* test/CodeGen/SPARC/private.ll: Fixup. Forgot to prune old RUN lines.NAKAMURA Takumi2012-07-031-4/+0
| | | | llvm-svn: 159643
* test/CodeGen/SPARC/private.ll: FileCheck-ize.NAKAMURA Takumi2012-07-031-1/+7
| | | | llvm-svn: 159642
* Regression test for PR2960.Jay Foad2012-05-011-0/+13
| | | | llvm-svn: 155912
* Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnuEli Bendersky2012-03-251-8/+1
| | | | | | | | | | | | | | * Removed test/lib/llvm.exp - it is no longer needed * Deleted the dg.exp reading code from test/lit.cfg. There are no dg.exp files left in the test suite so this code is no longer required. test/lit.cfg is now much shorter and clearer * Removed a lot of duplicate code in lit.local.cfg files that need access to the root configuration, by adding a "root" attribute to the TestingConfig object. This attribute is dynamically computed to provide the same information as was previously provided by the custom getRoot functions. * Documented the config.root attribute in docs/CommandGuide/lit.pod llvm-svn: 153408
* Replace all instances of dg.exp file with lit.local.cfg, since all tests are ↵Eli Bendersky2012-02-162-5/+13
| | | | | | | | run with LIT now and now Dejagnu. dg.exp is no longer needed. Patch reviewed by Daniel Dunbar. It will be followed by additional cleanup patches. llvm-svn: 150664
* Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() sinceVenkatraman Govindaraju2011-12-031-0/+25
| | | | | | AnalyzeBranch doesn't change the successor, just the order. llvm-svn: 145779
* make the asmparser reject function and type redefinitions. 'Merging' hasn't ↵Chris Lattner2011-06-171-2/+0
| | | | | | | | been needed since llvm-gcc 3.4 days. llvm-svn: 133248
* Fix more register and coalescing dependencies.Jakob Stoklund Olesen2011-05-041-1/+0
| | | | llvm-svn: 130859
* These tests no longer require linear scan because reserved register ↵Jakob Stoklund Olesen2011-04-051-4/+4
| | | | | | coalescing is now universal. llvm-svn: 128936
* Fix Mips, Sparc, and XCore tests that were dependent on register allocation.Jakob Stoklund Olesen2011-03-311-2/+4
| | | | | | Add an extra run with -regalloc=basic to keep them honest. llvm-svn: 128654
* Generate correct Sparc32 ABI compliant code for functions that return a struct.Venkatraman Govindaraju2011-02-212-4/+5
| | | | llvm-svn: 126108
* Prevent IMPLICIT_DEF/KILL to become a delay filler instruction in SPARC backend.Venkatraman Govindaraju2011-02-121-0/+13
| | | | llvm-svn: 125444
* Pass sret arguments through the stack instead of through registers in Sparc ↵Venkatraman Govindaraju2011-01-221-0/+36
| | | | | | backend. It makes the code generated more compliant with the sparc32 ABI. llvm-svn: 124030
* Added ICC, FCC as uses of movcc instruction to generate correct code when ↵Venkatraman Govindaraju2011-01-221-22/+51
| | | | | | -mattr=v9 is used. llvm-svn: 124027
* Sparc backend: Venkatraman Govindaraju2011-01-211-16/+34
| | | | | | | Rename FLUSH to FLUSHW. Output "ta 3" instead of a "flushw" instruction if v8 instruction set is used. llvm-svn: 123997
* Implement support for byval arguments in Sparc backend.Venkatraman Govindaraju2011-01-211-0/+18
| | | | llvm-svn: 123974
* Sparc backend: Implements a delay slot filler that attempt to fill delay slotsVenkatraman Govindaraju2011-01-201-0/+77
| | | | | | with useful instructions. llvm-svn: 123884
* Implement AnalyzeBranch in Sparc Backend.Venkatraman Govindaraju2011-01-161-7/+7
| | | | llvm-svn: 123561
* Implement RETURNADDR and FRAMEADDR lowering in SPARC backend.Venkatraman Govindaraju2011-01-121-0/+46
| | | | llvm-svn: 123310
* Fix SPARC backend call instruction so that arguments passed through registersVenkatraman Govindaraju2011-01-121-0/+13
| | | | | | | are correctly marked as used instead of passing all possible argument registers as used. llvm-svn: 123301
* SPARC backend: correct ICC/FCC uses for ADDX and SELECT_CCVenkatraman Govindaraju2011-01-111-0/+76
| | | | llvm-svn: 123281
* If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG ↵Devang Patel2010-12-061-24/+19
| | | | | | message instead of creating DBG_VALUE for undefined value in reg0. llvm-svn: 121059
* filecheckizeChris Lattner2010-11-232-17/+22
| | | | llvm-svn: 119987
* Inline asm mult-alt constraint tests.John Thompson2010-11-021-0/+323
| | | | llvm-svn: 118107
* Split big test into multiple directories to cater toDale Johannesen2010-04-071-0/+33
| | | | | | those who don't build all targets. llvm-svn: 100688
* add support for the sparcv9-*-* target triple to turn onChris Lattner2010-02-041-4/+2
| | | | | | 64-bit sparc codegen. Patch by Nathan Keynes! llvm-svn: 95293
* Delete useless trailing semicolons.Dan Gohman2010-01-051-1/+1
| | | | llvm-svn: 92740
* Eliminate some redundant llvm-as calls.Benjamin Kramer2009-10-122-2/+2
| | | | llvm-svn: 83837
* several major improvements to the sparc backend: support for weak linkageChris Lattner2009-09-152-0/+15
| | | | | | and PIC codegen. Patch by Venkatraman Govindaraju! llvm-svn: 81877
* Convert more tests to avoid llvm-as.Dan Gohman2009-09-111-4/+2
| | | | llvm-svn: 81545
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