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* [Sparc] Implements exception handling in SPARC with DwarfCFI.Venkatraman Govindaraju2013-09-261-0/+112
| | | | llvm-svn: 191432
* [Sparc] Add support for TLS in sparc.Venkatraman Govindaraju2013-09-221-0/+73
| | | | llvm-svn: 191164
* [SPARC] Make functions with GLOBAL_OFFSET_TABLE access as non-leaf functions.Venkatraman Govindaraju2013-09-222-6/+12
| | | | llvm-svn: 191160
* [Sparc] Emit .register directive to declare the use of global registers %g2, ↵Venkatraman Govindaraju2013-09-221-0/+16
| | | | | | %g4, %g6 and %g7. llvm-svn: 191158
* [Sparc] Fix lowering FABS on fp128 (long double) on pre-v9 targets.Venkatraman Govindaraju2013-09-211-0/+17
| | | | llvm-svn: 191154
* [Sparc] Correctly handle call to functions with ReturnsTwice attribute.Venkatraman Govindaraju2013-09-051-0/+70
| | | | | | | | | | | | In sparc, setjmp stores only the registers %fp, %sp, %i7 and %o7. longjmp restores the stack, and the callee-saved registers (all local/in registers: %i0-%i7, %l0-%l7) using the stored %fp and register windows. However, this does not guarantee that the longjmp will restore the registers, as they were when the setjmp was called. This is because these registers may be clobbered after returning from setjmp, but before calling longjmp. This patch prevents the registers %i0-%i5, %l0-l7 to live across the setjmp call using the register mask. llvm-svn: 190033
* [Sparc] Fix an assertion failure while lowering fcmp on long double.Venkatraman Govindaraju2013-09-041-0/+20
| | | | | | | This assertion is triggered because an integer constant is created with wrong type. llvm-svn: 189948
* [Sparc] Add support for soft long double (fp128).Venkatraman Govindaraju2013-09-031-19/+55
| | | | llvm-svn: 189780
* [Sparc] Implement spill and load for long double(f128) registers.Venkatraman Govindaraju2013-09-021-0/+15
| | | | llvm-svn: 189768
* [Sparc] Add long double (f128) instructions to sparc backend. Venkatraman Govindaraju2013-08-251-0/+27
| | | | llvm-svn: 189198
* [Sparc] Added V9's extra floating point registers and their aliases.Venkatraman Govindaraju2013-08-251-0/+23
| | | | llvm-svn: 189195
* [tests] Cleanup initialization of test suffixes.Daniel Dunbar2013-08-161-2/+0
| | | | | | | | | | | | | | | | | - Instead of setting the suffixes in a bunch of places, just set one master list in the top-level config. We now only modify the suffix list in a few suites that have one particular unique suffix (.ml, .mc, .yaml, .td, .py). - Aside from removing the need for a bunch of lit.local.cfg files, this enables 4 tests that were inadvertently being skipped (one in Transforms/BranchFolding, a .s file each in DebugInfo/AArch64 and CodeGen/PowerPC, and one in CodeGen/SI which is now failing and has been XFAILED). - This commit also fixes a bunch of config files to use config.root instead of older copy-pasted code. llvm-svn: 188513
* Allocate local registers in order for optimal coloring.Andrew Trick2013-07-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also avoid locals evicting locals just because they want a cheaper register. Problem: MI Sched knows exactly how many registers we have and assumes they can be colored. In cases where we have large blocks, usually from unrolled loops, greedy coloring fails. This is a source of "regressions" from the MI Scheduler on x86. I noticed this issue on x86 where we have long chains of two-address defs in the same live range. It's easy to see this in matrix multiplication benchmarks like IRSmk and even the unit test misched-matmul.ll. A fundamental difference between the LLVM register allocator and conventional graph coloring is that in our model a live range can't discover its neighbors, it can only verify its neighbors. That's why we initially went for greedy coloring and added eviction to deal with the hard cases. However, for singly defined and two-address live ranges, we can optimally color without visiting neighbors simply by processing the live ranges in instruction order. Other beneficial side effects: It is much easier to understand and debug regalloc for large blocks when the live ranges are allocated in order. Yes, global allocation is still very confusing, but it's nice to be able to comprehend what happened locally. Heuristics could be added to bias register assignment based on instruction locality (think late register pairing, banks...). Intuituvely this will make some test cases that are on the threshold of register pressure more stable. llvm-svn: 187139
* Update to more CodeGen tests to use CHECK-LABEL for labels corresponding to ↵Stephen Lin2013-07-185-25/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | function definitions for more informative error messages. No functionality change. All changes were made by the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" grep -q "^; *RUN: *llc.*debug" $NAME && continue grep -q "^; *RUN:.*llvm-objdump" $NAME && continue grep -q "^; *RUN: *opt.*" $NAME && continue TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\([A-Za-z0-9_-]*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC[:]* *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME done This script catches a superset of the cases caught by the script associated with commit r186280. It initially found some false positives due to unusual constructs in a minority of tests; all such cases were disambiguated first in commit r186621. llvm-svn: 186624
* Disambiguate function names in some CodeGen tests. (Some tests were using ↵Stephen Lin2013-07-182-3/+3
| | | | | | function names that also were names of instructions and/or doing other unusual things that were making the test not amenable to otherwise scriptable pattern matching.) No functionality change. llvm-svn: 186621
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to ↵Stephen Lin2013-07-146-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
* Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier ↵Stephen Lin2013-07-132-7/+7
| | | | | | | | | | debugging. No functionality change and all tests pass after conversion. This was done with the following sed invocation to catch label lines demarking function boundaries: sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct. llvm-svn: 186258
* Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.Benjamin Kramer2013-06-171-1/+1
| | | | | | | | | | | | | | | | | | The main advantages here are way better heuristics, taking into account not just loop depth but also __builtin_expect and other static heuristics and will eventually learn how to use profile info. Most of the work in this patch is pushing the MachineBlockFrequencyInfo analysis into the right places. This is good for a 5% speedup on zlib's deflate (x86_64), there were some very unfortunate spilling decisions in its hottest loop in longest_match(). Other benchmarks I tried were mostly neutral. This changes register allocation in subtle ways, update the tests for it. 2012-02-20-MachineCPBug.ll was deleted as it's very fragile and the instruction it looked for was gone already (but the FileCheck pattern picked up unrelated stuff). llvm-svn: 184105
* [Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc ↵Venkatraman Govindaraju2013-06-081-0/+47
| | | | | | backend. llvm-svn: 183613
* Add missing zextloadi1 to i64 patterns. PR16721.Jakob Stoklund Olesen2013-06-071-0/+8
| | | | llvm-svn: 183587
* Fix a typo in asm string of BP* family of instructions. With this fixRoman Divacky2013-06-071-2/+2
| | | | | | I am able to compile/assemble/link/run /bin/echo from FreeBSD. llvm-svn: 183537
* [Sparc]: Use cmp instruction instead of subcc to compare integers.Venkatraman Govindaraju2013-06-074-17/+17
| | | | llvm-svn: 183463
* Sparc: Add support for indirect branch and blockaddress in Sparc backend.Venkatraman Govindaraju2013-06-031-0/+77
| | | | llvm-svn: 183094
* Sparc: When storing 0, use %g0 directly in the store instruction instead ofVenkatraman Govindaraju2013-06-032-0/+27
| | | | | | using two instructions (sethi and store). llvm-svn: 183090
* Sparc: Combine add/or/sethi instruction with restore if possible.Venkatraman Govindaraju2013-06-024-8/+125
| | | | llvm-svn: 183088
* Sparc: Perform leaf procedure optimization by defaultVenkatraman Govindaraju2013-06-029-34/+36
| | | | llvm-svn: 183083
* Sparc: Mark functions calling llvm.vastart and llvm.returnaddress intrinsics ↵Venkatraman Govindaraju2013-06-012-0/+24
| | | | | | as non-leaf functions. llvm-svn: 183079
* [Sparc] Generate correct code for leaf functions with stack objects Venkatraman Govindaraju2013-06-011-0/+23
| | | | llvm-svn: 183067
* [Sparc] Add support for leaf functions in sparc backend. Venkatraman Govindaraju2013-05-291-0/+57
| | | | llvm-svn: 182822
* Also expand 64-bit bitcasts.Jakob Stoklund Olesen2013-05-201-0/+16
| | | | llvm-svn: 182229
* Implement spill and fill of I64Regs.Jakob Stoklund Olesen2013-05-201-0/+8
| | | | llvm-svn: 182228
* Mark i64 SETCC as expand so it is turned into a SELECT_CC.Jakob Stoklund Olesen2013-05-201-0/+10
| | | | llvm-svn: 182227
* Don't use %g0 to materialize 0 directly.Jakob Stoklund Olesen2013-05-192-1/+12
| | | | | | | | The wired physreg doesn't work on tied operands like on MOVXCC. Add a README note to fix this later. llvm-svn: 182225
* Select i64 values with %icc conditions.Jakob Stoklund Olesen2013-05-191-0/+11
| | | | llvm-svn: 182224
* Add floating point selects on %xcc predicates.Jakob Stoklund Olesen2013-05-191-0/+22
| | | | llvm-svn: 182222
* Implement SPselectfcc for i64 operands.Jakob Stoklund Olesen2013-05-191-0/+11
| | | | | | | Also clean up the arguments to all the MOVCC instructions so the operands always are (true-val, false-val, cond-code). llvm-svn: 182221
* [Sparc] Rearrange integer registers' allocation order so that register ↵Venkatraman Govindaraju2013-05-191-1/+1
| | | | | | | | allocator will use I and G registers before using L and O registers. Also, enable registers %g2-%g4 to be used in application and %g5 in 64 bit mode. llvm-svn: 182219
* Handle i64 FrameIndex nodes in SPARC v9 mode.Jakob Stoklund Olesen2013-05-191-0/+10
| | | | llvm-svn: 182216
* [Sparc] Implements hasReservedCallFrame and hasFP.Venkatraman Govindaraju2013-05-171-0/+16
| | | | | | | This is to generate correct framesetup code when the function has variable sized allocas. llvm-svn: 182108
* [Sparc] Prevent instructions that defines or uses %o7 to be in call's delay ↵Venkatraman Govindaraju2013-05-161-0/+17
| | | | | | slot. llvm-svn: 182063
* Recognize sparc64 as an alias for sparcv9 triples.Jakob Stoklund Olesen2013-05-141-2/+2
| | | | | | Patch by Brad Smith! llvm-svn: 181808
* Cleanup: test source files do not need to be executableArnaud A. de Grandmaison2013-04-221-0/+0
| | | | llvm-svn: 180003
* Passing arguments to varags functions under the SPARC v9 ABI.Jakob Stoklund Olesen2013-04-211-0/+13
| | | | | | | Arguments after the fixed arguments never use the floating point registers. llvm-svn: 179987
* Fix the SETHIimm pattern for 64-bit code.Jakob Stoklund Olesen2013-04-211-0/+6
| | | | | | Don't ignore the high 32 bits of the immediate. llvm-svn: 179985
* Compile varargs functions for SPARCv9.Jakob Stoklund Olesen2013-04-201-0/+62
| | | | | | | | | | | | With a little help from the frontend, it looks like the standard va_* intrinsics can do the job. Also clean up an old bitcast hack in LowerVAARG that dealt with unaligned double loads. Load SDNodes can specify an alignment now. Still missing: Calling varargs functions with float arguments. llvm-svn: 179961
* Add 64-bit multiply and divide instructions for SPARC v9.Jakob Stoklund Olesen2013-04-161-0/+21
| | | | llvm-svn: 179582
* Use i32 for all SPARC shift amounts, even in 64-bit mode.Jakob Stoklund Olesen2013-04-141-0/+10
| | | | | | Test case by llvm-stress. llvm-svn: 179477
* Add support for the abs64 SPARC v9 code model.Jakob Stoklund Olesen2013-04-142-0/+20
| | | | | | For when 16 TB just isn't enough. llvm-svn: 179474
* Add support for the SPARC v9 abs44 code model.Jakob Stoklund Olesen2013-04-142-0/+16
| | | | | | | This is the default model for non-PIC 64-bit code. It supports text+data+bss linked anywhere in the low 16 TB of the address space. llvm-svn: 179473
* Also put target flags on SPARC constant pool references.Jakob Stoklund Olesen2013-04-141-0/+30
| | | | | | | Constant pool entries are accessed exactly the same way as global variables. llvm-svn: 179471
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