| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/R... | Alex Bradbury | 2019-05-23 | 1 | -1/+1 |
| * | [RISCV] Expand codegen -> compression sanity checks and move to a single file | Alex Bradbury | 2018-04-18 | 1 | -33/+0 |
| * | [RISCV] Tablegen-driven Instruction Compression. | Sameer AbuAsal | 2018-04-06 | 1 | -0/+32 |
| * | [RISCV] Implement frame pointer elimination | Alex Bradbury | 2018-01-18 | 1 | -7/+0 |
| * | [RISCV] Implement branch analysis | Alex Bradbury | 2018-01-10 | 1 | -22/+11 |
| * | [RISCV] Enable emission of alias instructions by default | Alex Bradbury | 2017-12-15 | 1 | -13/+13 |
| * | [RISCV] Implement prolog and epilog insertion | Alex Bradbury | 2017-12-11 | 1 | -0/+7 |
| * | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -1/+1 |
| * | [RISCV] Codegen for conditional branches | Alex Bradbury | 2017-11-08 | 1 | -0/+121 |
 |
index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
| summaryrefslogtreecommitdiffstats |
|