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* R600 -> AMDGPU renameTom Stellard2015-06-131-92/+0
| | | | llvm-svn: 239657
* R600/SI: Enable all tests that pass on VI without changesMarek Olsak2015-01-271-0/+2
| | | | llvm-svn: 227214
* R600/SI: Add a stub GCNTargetMachineTom Stellard2015-01-061-2/+2
| | | | | | | | | | | | This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. llvm-svn: 225277
* R600/SI: Change all instruction assembly names to lowercase.Tom Stellard2014-11-051-29/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This matches the format produced by the AMD proprietary driver. //==================================================================// // Shell script for converting .ll test cases: (Pass the .ll files you want to convert to this script as arguments). //==================================================================// ; This was necessary on my system so that A-Z in sed would match only ; upper case. I'm not sure why. export LC_ALL='C' TEST_FILES="$*" MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r` for f in $TEST_FILES; do # Check that there are SI tests: grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f if [ $? -eq 0 ]; then for match in $MATCHES; do sed -i -e "s/\([ :]$match\)/\L\1/" $f done # Try to get check lines with partial instruction names sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f fi done sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll //==================================================================// // Shell script for converting .td files (run this last) //==================================================================// export LC_ALL='C' sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td llvm-svn: 221350
* R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol ↵Tom Stellard2014-10-011-4/+4
| | | | | | table llvm-svn: 218776
* R600/SI: Change formatting of printed FP immediatesMatt Arsenault2014-09-171-3/+3
| | | | | | | | | | Only 1 decimal place should be printed for inline immediates. Other constants should be hex constants. Does not include f64 tests because folding those inline immediates currently does not work. llvm-svn: 217964
* Fix interference caused by fmul 2, x -> fadd x, xMatt Arsenault2014-09-021-40/+71
| | | | | | | | If an fmul was introduced by lowering, it wouldn't be folded into a multiply by a constant since the earlier combine would have replaced the fmul with the fadd. llvm-svn: 216932
* R600/SI: implement range reduction for sin/cosMatt Arsenault2014-07-191-2/+20
| | | | | | | | | | | | | | | | These instructions can only take a limited input range, and return the constant value 1 out of range. We should do range reduction to be able to process arbitrary values. Use a FRACT instruction after normalization to achieve this. Also add a test for constant folding with the lowered code with unsafe-fp-math enabled. v2: use DAG lowering instead of intrinsic, adapt test v3: calculate constant, fold pattern into instruction definition v4: misc style fixes, add sin-fold testcase, cosmetics Patch by Grigori Goronzy llvm-svn: 213458
* R600: Expand vector sin and cos.Tom Stellard2014-05-021-11/+33
| | | | | | | | v2: move code to AMDGPUISelLowering.cpp squash with tests (both EG and SI) Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> llvm-svn: 207845
* R600: Use function inputs to represent data stored in gprVincent Lejeune2013-11-111-6/+6
| | | | llvm-svn: 194425
* R600: Use DAG lowering pass to handle fcos/fsinVincent Lejeune2013-07-091-0/+3
| | | | | NOTE: This is a candidate for the stable branch. llvm-svn: 185940
* R600: Support schedule and packetization of trans-only instVincent Lejeune2013-06-291-1/+1
| | | | llvm-svn: 185268
* R600: Prettier asmPrint of AluVincent Lejeune2013-05-021-1/+1
| | | | llvm-svn: 180956
* Add R600 backendTom Stellard2012-12-111-0/+16
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX llvm-svn: 169915
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